<JIRA ID: ODUHIGH-368 : Slice information associated during PDU session establishment...

[o-du/l2.git] / src / 5gnrsch / sch.h

diff --git a/src/5gnrsch/sch.h b/src/5gnrsch/sch.h
index 9bfc6ed..65c2a25 100644 (file)
--- a/src/5gnrsch/sch.h
+++ b/src/5gnrsch/sch.h
@@ -41,6 +41,7 @@
 #define BO_DELTA 1
 #define RAR_DELAY   2
 #define MSG4_DELAY  1
+#define PDSCH_START_RB 10
 #define PUSCH_START_RB 15
 #define PUCCH_NUM_PRB_FORMAT_0_1_4 1  /* number of PRBs in freq domain, spec 38.213 - 9.2.1 */
 #define SI_RNTI 0xFFFF
@@ -50,6 +51,7 @@
 #define DMRS_ADDITIONAL_POS 0
 #define SCH_DEFAULT_K1 1
 #define SCH_TQ_SIZE 10
+#define SSB_IDX_SUPPORTED 1
 
 #define CRC_FAILED 0
 #define CRC_PASSED 1
@@ -81,6 +83,13 @@ typedef enum
    SCH_LC_STATE_ACTIVE
 }SchLcState;
 
+typedef enum
+{
+   WINDOW_YET_TO_START,
+   WITHIN_WINDOW,
+   WINDOW_EXPIRED
+}RaRspWindowStatus;
+
 /**
  * @brief
  * Structure holding LTE MAC's General Configuration information.
@@ -110,8 +119,8 @@ typedef struct schDlSlotInfo
    uint8_t   ssbIdxSupported;                   /*!< Max SSB index */
    SsbInfo   ssbInfo[MAX_SSB_IDX];              /*!< SSB info */
    bool      sib1Pres;                          /*!< Flag to determine if SIB1 is present in this slot */
-   RarInfo   *rarInfo;                          /*!< RAR info */
-   DlMsgInfo *dlMsgInfo;                       /*!< DL dedicated Msg info */
+   RarAlloc  *rarAlloc;                         /*!< RAR allocation */
+   DlMsgInfo *dlMsgInfo;                        /*!< DL dedicated Msg info */
 }SchDlSlotInfo;
 
 typedef struct schRaCb
@@ -151,6 +160,8 @@ typedef struct schLcCtxt
    uint8_t lcp;      // logical Channel Prioritization
    SchLcState lcState;
    uint32_t bo;
+   uint16_t   pduSessionId; /*Pdu Session Id*/
+   SchSnssai  *snssai;      /*S-NSSAI assoc with LCID*/
 }SchDlLcCtxt;
 
 typedef struct schDlCb
@@ -168,6 +179,8 @@ typedef struct schUlLcCtxt
    uint8_t schReqId;
    uint8_t pbr;        // prioritisedBitRate
    uint8_t bsd;        // bucketSizeDuration
+   uint16_t   pduSessionId; /*Pdu Session Id*/
+   SchSnssai  *snssai;      /*S-NSSAI assoc with LCID*/
 }SchUlLcCtxt;
 
 typedef struct schUlCb
@@ -208,6 +221,18 @@ typedef struct schUeCb
    SchDlCb    dlInfo;
 }SchUeCb;
 
+/**
+ * @brief
+ * RA Request Info
+ */
+typedef struct schRaReq
+{
+   uint32_t        raRnti;
+   RachIndInfo     *rachInd;
+   SlotTimingInfo  winStartTime;
+   SlotTimingInfo  winEndTime;
+}SchRaReq;
+
 /**
  * @brief
  * Cell Control block per cell.
@@ -218,14 +243,15 @@ typedef struct schCellCb
    Inst          instIdx;                           /*!< Index of the scheduler instance */
    Inst          macInst;                           /*!< Index of the MAC instance */
    uint8_t       numSlots;                          /*!< Number of slots in current frame */
-   SlotIndInfo   slotInfo;                          /*!< SFN, Slot info being processed*/
+   SlotTimingInfo   slotInfo;                          /*!< SFN, Slot info being processed*/
    SchDlSlotInfo **schDlSlotInfo;                   /*!< SCH resource allocations in DL */
    SchUlSlotInfo **schUlSlotInfo;                   /*!< SCH resource allocations in UL */
    SchCellCfg    cellCfg;                           /*!< Cell ocnfiguration */
    bool          firstSsbTransmitted;
    bool          firstSib1Transmitted;
    uint8_t       ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!<start symbol per SSB beam */
-   SchRaCb       raCb[MAX_NUM_UE];                  /*!< Rach Cb */
+   SchRaReq      *raReq[MAX_NUM_UE];                /*!< Pending RA request */
+   SchRaCb       raCb[MAX_NUM_UE];                  /*!< RA Cb */
    uint16_t      numActvUe;                         /*!<Number of active UEs */
    uint32_t      actvUeBitMap;                      /*!<Bit map to find active UEs */
    uint32_t      boIndBitMap;                       /*!<Bit map to indicate UEs that have recevied BO */
@@ -254,11 +280,15 @@ typedef struct schCb
 SchCb schCb[SCH_MAX_INST];
 
 /* function declarations */
+SchUeCb* schGetUeCb(SchCellCb *cellCb, uint16_t crnti);
+void schInitUlSlot(SchUlSlotInfo *schUlSlotInfo);
+void schInitDlSlot(SchDlSlotInfo *schDlSlotInfo);
+uint8_t SchSendCfgCfm(Pst *pst, RgMngmt *cfm);
 short int schActvTmr(Ent ent,Inst inst);
 uint8_t schBroadcastAlloc(SchCellCb *cell, DlBrdcstAlloc *dlBrdcstAlloc,uint16_t slot);
-uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst inst);
+uint8_t schProcessSlotInd(SlotTimingInfo *slotInd, Inst inst);
 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst);
-uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot);
+uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot, bool ssbPresent, bool sib1Present);
 uint16_t schCalcTbSize(uint32_t payLoadSize);
 uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols);
 uint16_t schAllocPucchResource(SchCellCb *cell, uint16_t crnti, uint16_t slot);
@@ -268,6 +298,17 @@ uint8_t schFillPuschAlloc(SchUeCb *ueCb, uint16_t pdcchSlot, uint32_t dataVol, S
 uint8_t schDlRsrcAllocDlMsg(DlMsgAlloc *dlMsgAlloc, SchCellCb *cell, uint16_t crnti,
    uint32_t *accumalatedSize, uint16_t slot);
 uint16_t schAccumalateLcBoSize(SchCellCb *cell, uint16_t ueIdx);
+uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA, \
+    uint8_t k0Index, bool ssbPresent, bool sib1Present);
+void schProcessRaReq(SlotTimingInfo currTime, SchCellCb *cellCb);
+
+void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, \
+SchPdschCfgCmn pdschCmnCfg,SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl);
+void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], \
+uint16_t puschSymTblSize, SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl);
+
+PduTxOccsaion schCheckSsbOcc(SlotTimingInfo slotTime, SchCellCb *cell);
+PduTxOccsaion schCheckSib1Occ(SlotTimingInfo slotTime, SchCellCb *cell);
 
 /**********************************************************************
   End of file