#define SCH_MU3_NUM_SLOTS 40
#define SCH_MU4_NUM_SLOTS 50
#define SCH_MAX_SFN 1024
-#ifdef NR_TDD
-#define MAX_NUM_RB 275 /* value for numerology 1, 100 MHz */
-#else
-#define MAX_NUM_RB 106 /* value for numerology 0, 20 MHz */
-#endif
#define SCH_MIB_TRANS 8 /* MIB transmission as per 38.331 is every 80 ms */
#define SCH_SIB1_TRANS 16 /* SIB1 transmission as per 38.331 is every 160 ms */
#define SCH_NUM_SC_PRB 12 /* number of SCs in a PRB */
typedef enum
{
SCH_UE_STATE_INACTIVE,
- SCH_UE_STATE_ACTIVE
+ SCH_UE_STATE_ACTIVE,
+ SCH_UE_HANDIN_IN_PROGRESS
}SchUeState;
typedef enum
uint8_t ssbIdxSupported; /*!< Max SSB index */
SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */
bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */
- RarAlloc *rarAlloc; /*!< RAR allocation */
- DlMsgInfo *dlMsgInfo; /*!< DL dedicated Msg info */
+ uint8_t pdcchUe; /*!< UE for which PDCCH is scheduled in this slot */
+ uint8_t pdschUe; /*!< UE for which PDSCH is scheduled in this slot */
+ RarAlloc *rarAlloc[MAX_NUM_UE]; /*!< RAR allocation per UE*/
+ DciInfo *ulGrant;
+ DlMsgAlloc *dlMsgAlloc[MAX_NUM_UE]; /*!< Dl msg allocation per UE*/
}SchDlSlotInfo;
typedef struct schRaCb
{
- uint16_t tcrnti;
+ bool msg4recvd;
+ uint16_t tcrnti;
+ uint16_t dlMsgPduLen;
}SchRaCb;
/**
*/
typedef struct schUlSlotInfo
{
- SchPrbAlloc prbAlloc; /*!< PRB allocated/available per symbol */
- uint8_t puschCurrentPrb; /* Current PRB for PUSCH allocation */
- bool puschPres; /*!< PUSCH presence field */
- SchPuschInfo *schPuschInfo; /*!< PUSCH info */
- bool pucchPres; /*!< PUCCH presence field */
- SchPucchInfo schPucchInfo; /*!< PUCCH info */
+ SchPrbAlloc prbAlloc; /*!< PRB allocated/available per symbol */
+ uint8_t puschCurrentPrb; /*!< Current PRB for PUSCH allocation */
+ bool puschPres; /*!< PUSCH presence field */
+ SchPuschInfo *schPuschInfo; /*!< PUSCH info */
+ bool pucchPres; /*!< PUCCH presence field */
+ SchPucchInfo schPucchInfo; /*!< PUCCH info */
+ uint8_t pucchUe; /*!< Store UE id for which PUCCH is scheduled */
+ uint8_t puschUe; /*!< Store UE id for which PUSCH is scheduled */
}SchUlSlotInfo;
/**
uint32_t bo;
uint16_t pduSessionId; /*Pdu Session Id*/
Snssai *snssai; /*S-NSSAI assoc with LCID*/
+ bool isDedicated; /*Flag containing Dedicated S-NSSAI or not*/
}SchDlLcCtxt;
typedef struct schDlCb
{
- uint8_t numDlLc;
SchDlLcCtxt dlLcCtxt[MAX_NUM_LC];
}SchDlCb;
uint8_t bsd; // bucketSizeDuration
uint16_t pduSessionId; /*Pdu Session Id*/
Snssai *snssai; /*S-NSSAI assoc with LCID*/
+ bool isDedicated; /*Flag containing Dedicated S-NSSAI or not*/
}SchUlLcCtxt;
typedef struct schUlCb
{
- uint8_t numUlLc;
SchUlLcCtxt ulLcCtxt[MAX_NUM_LC];
}SchUlCb;
typedef struct schUeCfgCb
{
uint16_t cellId;
+ uint8_t ueId;
uint16_t crnti;
bool macCellGrpCfgPres;
SchMacCellGrpCfg macCellGrpCfg;
SchAmbrCfg *ambrCfg;
SchModulationInfo dlModInfo;
SchModulationInfo ulModInfo;
+ SchDataTransmission dataTransmissionAction;
}SchUeCfgCb;
+/*Following structures to keep record and estimations of PRB allocated for each
+ * LC taking into consideration the RRM policies*/
+typedef struct lcInfo
+{
+ uint8_t lcId; /*LCID for which BO are getting recorded*/
+ uint32_t reqBO; /*Size of the BO requested/to be allocated for this LC*/
+ uint32_t allocBO; /*TBS/BO Size which is actually allocated*/
+ uint8_t allocPRB; /*PRB count which is allocated based on RRM policy/FreePRB*/
+}LcInfo;
+
+typedef struct dedicatedLCInfo
+{
+ CmLListCp dedLcList; /*Linklist of LC assoc with RRMPolicyMemberList*/
+ uint16_t rsvdDedicatedPRB; /*Number of PRB reserved for this Dedicated S-NSSAI*/
+}DedicatedLCInfo;
+
+typedef struct schLcPrbEstimate
+{
+ /* TODO: For Multiple RRMPolicies, Make DedicatedLcInfo as array/Double Pointer
+ * and have separate DedLCInfo for each RRMPolcyMemberList*/
+ /* Dedicated LC List will be allocated, if any available*/
+ DedicatedLCInfo *dedLcInfo; /*Contain LCInfo per RRMPolicy*/
+
+ CmLListCp defLcList; /*Linklist of LC assoc with Default S-NSSAI(s)*/
+
+ /* SharedPRB number can be used by any LC.
+ * Need to calculate in every Slot based on PRB availability*/
+ uint16_t sharedNumPrb;
+}SchLcPrbEstimate;
+
/**
* @brief
* UE control block
*/
typedef struct schUeCb
{
- uint16_t ueIdx;
+ uint16_t ueId;
uint16_t crnti;
SchUeCfgCb ueCfg;
SchUeState state;
SchCellCb *cellCb;
+ SchCfraResource cfraResource;
bool srRcvd;
+ bool bsrRcvd;
BsrInfo bsrInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS];
SchUlCb ulInfo;
SchDlCb dlInfo;
+ SchLcPrbEstimate dlLcPrbEst; /*DL PRB Alloc Estimate among different LC*/
+ SchLcPrbEstimate ulLcPrbEst; /*UL PRB Alloc Estimate among different LC*/
}SchUeCb;
/**
{
uint32_t raRnti;
RachIndInfo *rachInd;
+ bool isCFRA;
+ SchUeCb *ueCb; /* Filled only if isCFRA = true */
SlotTimingInfo winStartTime;
SlotTimingInfo winEndTime;
}SchRaReq;
+typedef struct schPageInfo
+{
+ uint16_t pf; /*Value of Paging Frame received from DUAPP*/
+ uint8_t i_s; /*Value of Paging Occ Index received from DUAPP*/
+ SlotTimingInfo pageTxTime; /*Start Paging window*/
+ uint8_t mcs; /*MCS index*/
+ uint16_t msgLen; /*Pdu length */
+ uint8_t *pagePdu; /*RRC Page PDU bit string*/
+}SchPageInfo;
+
+typedef struct schPagingOcc
+{
+ uint8_t frameOffset;
+ uint8_t pagingOccSlot;
+}SchPagingOcc;
+
+typedef struct schPageCb
+{
+ CmLListCp pageIndInfoRecord[MAX_SFN]; /*List of Page Records received which are stored per sfn*/
+ SchPagingOcc pagMonOcc[MAX_PO_PER_PF]; /*Paging Occasion Slot/FrameOffset are stored*/
+}SchPageCb;
+
/**
* @brief
* Cell Control block per cell.
SchCellCfg cellCfg; /*!< Cell ocnfiguration */
bool firstSsbTransmitted;
bool firstSib1Transmitted;
- uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!<start symbol per SSB beam */
+ uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!< start symbol per SSB beam */
+ uint64_t dedPreambleBitMap; /*!< Bit map to find used/free preambles index */
SchRaReq *raReq[MAX_NUM_UE]; /*!< Pending RA request */
SchRaCb raCb[MAX_NUM_UE]; /*!< RA Cb */
- uint16_t numActvUe; /*!<Number of active UEs */
- uint32_t actvUeBitMap; /*!<Bit map to find active UEs */
- uint32_t boIndBitMap; /*!<Bit map to indicate UEs that have recevied BO */
- SchUeCb ueCb[MAX_NUM_UE]; /*!<Pointer to UE contexts of this cell */
+ uint16_t numActvUe; /*!< Number of active UEs */
+ uint32_t actvUeBitMap; /*!< Bit map to find active UEs */
+ uint32_t boIndBitMap; /*!< Bit map to indicate UEs that have recevied BO */
+ SchUeCb ueCb[MAX_NUM_UE]; /*!< Pointer to UE contexts of this cell */
+ CmLListCp ueToBeScheduled; /*!< Linked list to store UEs pending to be scheduled, */
+ SchPageCb pageCb; /*!< Page Record at Schedular*/
#ifdef NR_TDD
uint8_t numSlotsInPeriodicity; /*!< number of slots in configured periodicity and SCS */
uint32_t slotFrmtBitMap; /*!< 2 bits must be read together to determine D/U/S slots. 00-D, 01-U, 10-S */
#endif
}SchCellCb;
+
+typedef struct schSliceCfg
+{
+ uint8_t numOfSliceConfigured;
+ SchRrmPolicyOfSlice **listOfConfirguration;
+}SchSliceCfg;
+
/**
* @brief
* Control block for sch
SchGenCb genCfg; /*!< General Config info */
CmTqCp tmrTqCp; /*!< Timer Task Queue Cntrl Point */
CmTqType tmrTq[SCH_TQ_SIZE]; /*!< Timer Task Queue */
- SchCellCb *cells[MAX_NUM_CELL]; /* Array to store cellCb ptr */
+ SchCellCb *cells[MAX_NUM_CELL]; /* Array to store cellCb ptr */
+ SchSliceCfg sliceCfg;
}SchCb;
/* Declaration for scheduler control blocks */
uint16_t puschSymTblSize, SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl);
uint8_t SchSendCfgCfm(Pst *pst, RgMngmt *cfm);
SchUeCb* schGetUeCb(SchCellCb *cellCb, uint16_t crnti);
+uint8_t addUeToBeScheduled(SchCellCb *cell, uint8_t ueId);
/* Incoming message handler function declarations */
uint8_t schProcessSlotInd(SlotTimingInfo *slotInd, Inst inst);
PduTxOccsaion schCheckSib1Occ(SchCellCb *cell, SlotTimingInfo slotTime);
uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc);
uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc);
-void schProcessRaReq(SlotTimingInfo currTime, SchCellCb *cellCb);
-uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueIdx, RarAlloc *rarAlloc, uint8_t k0Index);
-uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo slotTime, DlMsgAlloc *msg4Alloc);
+bool schProcessRaReq(Inst schInst, SchCellCb *cellCb, SlotTimingInfo currTime, uint8_t ueId);
+bool schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId);
+uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAlloc *rarAlloc, uint8_t k0Index);
uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
- uint32_t *accumalatedSize, DlMsgAlloc *dlMsgAlloc);
-uint16_t schAccumalateLcBoSize(SchCellCb *cell, uint16_t ueIdx);
+uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol, uint8_t pdschNumSymbols);
+uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *msg4Alloc,\
+uint8_t pdschStartSymbol, uint8_t pdschNumSymbols);
+uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, uint8_t startSymbol, uint8_t symbolLength, \
+ uint16_t *startPrb, uint16_t numPrb);
+void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti);
+bool findValidK0K1Value(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool dedMsg, uint8_t *pdschStartSymbol,\
+uint8_t *pdschSymblLen, SlotTimingInfo *pdcchTime, SlotTimingInfo *pdschTime, SlotTimingInfo *pucchTime);
/* UL scheduling related function declarations */
uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst);
-uint16_t schAllocPucchResource(SchCellCb *cell, uint16_t crnti, uint16_t slot);
-uint8_t schFillUlDci(SchUeCb *ueCb, SchPuschInfo puschInfo, DciInfo *dciInfo);
-uint8_t schFillPuschAlloc(SchUeCb *ueCb, uint16_t pdcchSlot, uint32_t dataVol, SchPuschInfo *puschInfo);
-uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, uint8_t startSymbol, uint8_t symbolLength, \
+bool schCheckPrachOcc(SchCellCb *cell, SlotTimingInfo prachOccasionTimingInfo);
+uint8_t schCalcPrachNumRb(SchCellCb *cell);
+void schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotTimingInfo prachOccasionTimingInfo);
+uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti);
+uint8_t schFillUlDci(SchUeCb *ueCb, SchPuschInfo *puschInfo, DciInfo *dciInfo);
+uint8_t schFillPuschAlloc(SchUeCb *ueCb, SlotTimingInfo puschTime, uint32_t tbsSize, \
+ uint8_t startSymb, uint8_t symbLen, uint16_t startPrb);
+uint8_t allocatePrbUl(SchCellCb *cell, SlotTimingInfo slotTime, uint8_t startSymbol, uint8_t symbolLength, \
uint16_t *startPrb, uint16_t numPrb);
+bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId);
+bool schCalculateUlTbs(SchUeCb *ueCb, SlotTimingInfo puschTime, uint8_t symbLen,\
+ uint16_t *startPrb, uint32_t *totTBS);
+
+/*Generic Functions*/
+void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc, BsrInfo *bsrInfo, uint32_t *accumalatedBOSize);
+uint16_t searchLargestFreeBlock(SchCellCb *cell, SlotTimingInfo slotTime,uint16_t *startPrb, Direction dir);
+LcInfo* handleLcLList(CmLListCp *lcLL, uint8_t lcId, ActionTypeLL action);
+void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool dedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
+ uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd);
+void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status);
+
+/*Paging Functions*/
+void schProcPagingCfg(SchCellCb *cell);
+void schCfgPdcchMonOccOfPO(SchCellCb *cell);
+void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF);
+uint8_t schFillPagePdschCfg(SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime, \
+ uint16_t tbSize, uint8_t mcs, uint16_t startPrb);
/**********************************************************************
End of file