SchCb schCb[SCH_MAX_INST];
void SchFillCfmPst(Pst *reqPst,Pst *cfmPst,RgMngmt *cfm);
-
/* local defines */
SchCellCfgCfmFunc SchCellCfgCfmOpts[] =
{
schCb[inst].genCfg.isSCellActDeactAlgoEnable = cfg->s.schInstCfg.genCfg.isSCellActDeactAlgoEnable;
#endif
schCb[inst].genCfg.startCellId = cfg->s.schInstCfg.genCfg.startCellId;
-#if 0
+
/* Initialzie the timer queue */
- memset(&schCb[inst].tmrTq, 0, sizeof(CmTqType)*RGSCH_TQ_SIZE);
+ memset(&schCb[inst].tmrTq, 0, sizeof(CmTqType) * SCH_TQ_SIZE);
/* Initialize the timer control point */
memset(&schCb[inst].tmrTqCp, 0, sizeof(CmTqCp));
schCb[inst].tmrTqCp.tmrLen = RGSCH_TQ_SIZE;
/* SS_MT_TMR needs to be enabled as schActvTmr needs instance information */
- /* Timer Registration request to SSI */
+ /* Timer Registration request to system services */
if (ODU_REG_TMR_MT(schCb[inst].schInit.ent, dInst,
(int)schCb[inst].genCfg.tmrRes, schActvTmr) != ROK)
{
"register timer.");
return (LCM_REASON_MEM_NOAVAIL);
}
-#endif
+
/* Set Config done in TskInit */
schCb[inst].schInit.cfgDone = TRUE;
DU_LOG("\nINFO --> SCH : Scheduler gen config done");
RgMngmt cfm;
Pst cfmPst;
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : GENERAL_CFG_REQ\n");
+#endif
+
if(pst->dstInst < SCH_INST_START)
{
DU_LOG("\nERROR --> SCH : Invalid inst ID");
cfm.cfm.reason = reason;
SchSendCfgCfm(&cfmPst, &cfm);
- /* SPutSBuf(pst->region, pst->pool, (Data *)cfg, sizeof(RgMngmt)); */
+ /* SCH_FREE(pst->region, pst->pool, (Data *)cfg, sizeof(RgMngmt)); */
return ROK;
}/*-- SchProcGenCfgReq --*/
* a cell.
*
* @param[in] Pst *pst
- * @param[in] SlotIndInfo *slotInd
+ * @param[in] SlotTimingInfo *slotInd
* @return S16
* -# ROK
* -# RFAILED
**/
-uint8_t MacSchSlotInd(Pst *pst, SlotIndInfo *slotInd)
+uint8_t MacSchSlotInd(Pst *pst, SlotTimingInfo *slotInd)
{
Inst inst = pst->dstInst-SCH_INST_START;
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : EVENT_SLOT_IND_TO_SCH\n");
+#endif
+
schProcessSlotInd(slotInd, inst);
return ROK;
uint8_t MacSchRachInd(Pst *pst, RachIndInfo *rachInd)
{
Inst inst = pst->dstInst-SCH_INST_START;
+
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : EVENT_RACH_IND_TO_SCH\n");
+#endif
+
DU_LOG("\nINFO --> SCH : Received Rach indication");
schProcessRachInd(rachInd, inst);
return ROK;
* ****************************************************************/
uint8_t MacSchCrcInd(Pst *pst, CrcIndInfo *crcInd)
{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : EVENT_CRC_IND_TO_SCH\n");
+#endif
+
switch(crcInd->crcInd[0])
{
case CRC_FAILED:
*
* @param[in] schCellCb *cell
* @param[in] SchCellCfg *schCellCfg
- * @return int
- * -# ROK
- * -# RFAILED
+ * @return void
**/
void schInitTddSlotCfg(SchCellCb *cell, SchCellCfg *schCellCfg)
{
uint16_t periodicityInMicroSec = 0;
- uint32_t slotBitPos, symbBitPos, bitMask;
int8_t slotIdx, symbIdx;
periodicityInMicroSec = schGetPeriodicityInMsec(schCellCfg->tddCfg.tddPeriod);
- schCellCfg->numerology = 1; //TODO: Remove this
cell->numSlotsInPeriodicity = (periodicityInMicroSec * pow(2, schCellCfg->numerology))/1000;
-cell->slotFrmtBitMap = 0;
+ cell->slotFrmtBitMap = 0;
cell->symbFrmtBitMap = 0;
- slotBitPos = (cell->numSlotsInPeriodicity*2)-1; /* considering 2 bits to represent a slot */
- symbBitPos = (MAX_SYMB_PER_SLOT*2)-1; /* considering 2 bits to represent a symbol */
for(slotIdx = cell->numSlotsInPeriodicity-1; slotIdx >= 0; slotIdx--)
{
symbIdx = 0;
case DL_SLOT:
{
/*BitMap to be set to 00 */
- bitMask = 1<<slotBitPos;
- cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
- slotBitPos--;
- bitMask = 1<<slotBitPos;
- cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
- slotBitPos--;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap<<2);
break;
}
case UL_SLOT:
{
/*BitMap to be set to 01 */
- bitMask = 1<<slotBitPos;
- cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
- slotBitPos--;
- bitMask = 1<<slotBitPos;
- cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((1<<slotBitPos) & bitMask);
- slotBitPos--;
+ cell->slotFrmtBitMap = ((cell->slotFrmtBitMap<<2) | (UL_SLOT));
break;
}
default:
continue;
}
/* slot config is flexible. First set slotBitMap to 10 */
- bitMask = 1<<slotBitPos;
- cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((1<<slotBitPos) & bitMask);
- slotBitPos--;
- bitMask = 1<<slotBitPos;
- cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
- slotBitPos--;
+ cell->slotFrmtBitMap = ((cell->slotFrmtBitMap<<2) | (FLEXI_SLOT));
+
/* Now set symbol bitmap */
for(symbIdx = MAX_SYMB_PER_SLOT-1; symbIdx >= 0; symbIdx--)
{
case DL_SLOT:
{
/*symbol BitMap to be set to 00 */
- bitMask = 1<<symbBitPos;
- cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
- symbBitPos--;
- bitMask = 1<<symbBitPos;
- cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
- symbBitPos--;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap<<2);
break;
}
case UL_SLOT:
{
/*symbol BitMap to be set to 01 */
- bitMask = 1<<symbBitPos;
- cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
- symbBitPos--;
- bitMask = 1<<symbBitPos;
- cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((1<<symbBitPos) & bitMask);
- symbBitPos--;
+ cell->symbFrmtBitMap = ((cell->symbFrmtBitMap<<2) | (UL_SLOT));
break;
}
case FLEXI_SLOT:
{
/*symbol BitMap to be set to 10 */
- bitMask = 1<<symbBitPos;
- cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((1<<symbBitPos) & bitMask);
- symbBitPos--;
- bitMask = 1<<symbBitPos;
- cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
- symbBitPos--;
+ cell->symbFrmtBitMap = ((cell->symbFrmtBitMap<<2) | (FLEXI_SLOT));
break;
}
default:
}
}
}
-
}
#endif
+/**
+ * @brief Fill SSB start symbol
+ *
+ * @details
+ *
+ * Function : fillSsbStartSymb
+ *
+ * This API stores SSB start index per beam
+ *
+ * @param[in] SchCellCb *cellCb
+ * @return int
+ * -# ROK
+ * -# RFAILED
+ **/
+void fillSsbStartSymb(SchCellCb *cellCb)
+{
+ uint8_t cnt, scs, symbIdx, ssbStartSymbArr[SCH_MAX_SSB_BEAM];
+
+ scs = cellCb->cellCfg.ssbSchCfg.scsCommon;
+
+ memset(ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
+ symbIdx = 0;
+ /* Determine value of "n" based on Section 4.1 of 3GPP TS 38.213 */
+ switch(scs)
+ {
+ case SCS_15KHZ:
+ {
+ if(cellCb->cellCfg.dlFreq <= 300000)
+ cnt = 2;/* n = 0, 1 */
+ else
+ cnt = 4; /* n = 0, 1, 2, 3 */
+ for(uint8_t idx=0; idx<cnt; idx++)
+ {
+ /* start symbol determined using {2, 8} + 14n */
+ ssbStartSymbArr[symbIdx++] = 2 + MAX_SYMB_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 8 + MAX_SYMB_PER_SLOT*idx;
+ }
+ }
+ break;
+ case SCS_30KHZ:
+ {
+ if(cellCb->cellCfg.dlFreq <= 300000)
+ cnt = 1;/* n = 0 */
+ else
+ cnt = 2; /* n = 0, 1 */
+ for(uint8_t idx=0; idx<cnt; idx++)
+ {
+ /* start symbol determined using {4, 8, 16, 20} + 28n */
+ ssbStartSymbArr[symbIdx++] = 4 + MAX_SYMB_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 8 + MAX_SYMB_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 16 + MAX_SYMB_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 20 + MAX_SYMB_PER_SLOT*idx;
+ }
+ }
+ break;
+ default:
+ DU_LOG("\nERROR --> SCH : SCS %d is currently not supported", scs);
+ }
+ memset(cellCb->ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
+ memcpy(cellCb->ssbStartSymbArr, ssbStartSymbArr, SCH_MAX_SSB_BEAM);
+
+}
+
/**
* @brief init cellCb based on cellCfg
SCH_ALLOC(schDlSlotInfo, sizeof(SchDlSlotInfo));
if(!schDlSlotInfo)
{
- DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb");
- return RFAILED;
+ DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb");
+ return RFAILED;
}
/* UL Alloc */
cell->schUlSlotInfo[idx] = schUlSlotInfo;
}
+ cell->firstSsbTransmitted = false;
+ cell->firstSib1Transmitted = false;
+ fillSsbStartSymb(cell);
schCb[inst].cells[inst] = cell;
DU_LOG("\nINFO --> SCH : Cell init completed for cellId:%d", cell->cellId);
* uint8_t offsetPointA : offset
* @return void
**/
-void fillSchSib1Cfg(uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg *sib1SchCfg, uint16_t pci, uint8_t offsetPointA)
+void fillSchSib1Cfg(uint8_t mu, uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg *sib1SchCfg, uint16_t pci, uint8_t offsetPointA)
{
uint8_t coreset0Idx = 0;
uint8_t searchSpace0Idx = 0;
uint8_t mValue = 0;
uint8_t firstSymbol = 0; /* need to calculate using formula mentioned in 38.213 */
uint8_t slotIndex = 0;
- uint8_t FreqDomainResource[6] = {0};
+ uint8_t FreqDomainResource[FREQ_DOM_RSRC_SIZE] = {0};
uint16_t tbSize = 0;
- uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */
+ uint8_t ssbIdx = 0;
PdcchCfg *pdcch = &(sib1SchCfg->sib1PdcchCfg);
PdschCfg *pdsch = &(sib1SchCfg->sib1PdschCfg);
* [(O . 2^u + i . M ) ] mod numSlotsPerSubframe
* assuming u = 0, i = 0, numSlotsPerSubframe = 10
* Also, from this configuration, coreset0 is only on even subframe */
- slotIndex = ((oValue * 1) + (0 * mValue)) % numSlots;
+ slotIndex = (int)((oValue*pow(2, mu)) + floor(ssbIdx*mValue))%numSlots;
sib1SchCfg->n0 = slotIndex;
- /* calculate the PRBs */
- freqDomRscAllocType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
-
/* fill BWP */
switch(bandwidth)
{
pdcch->coresetCfg.coreSetSize = numRbs;
pdcch->coresetCfg.startSymbolIndex = firstSymbol;
pdcch->coresetCfg.durationSymbols = numSymbols;
- memcpy(pdcch->coresetCfg.freqDomainResource,FreqDomainResource,6);
+
+ /* Fill Bitmap for PRBs in coreset */
+ fillCoresetFeqDomAllocMap(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
+ covertFreqDomRsrcMapToIAPIFormat(FreqDomainResource, pdcch->coresetCfg.freqDomainResource);
+
pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
pdsch->codeword[cwCount].mcsIndex = sib1SchCfg->sib1Mcs;
pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
pdsch->codeword[cwCount].rvIndex = 0;
- tbSize = schCalcTbSize(sib1SchCfg->sib1PduLen);
+ tbSize = schCalcTbSize(sib1SchCfg->sib1PduLen + TX_PAYLOAD_HDR_LEN);
pdsch->codeword[cwCount].tbSize = tbSize;
}
pdsch->dataScramblingId = pci;
pdsch->numLayers = 1;
pdsch->transmissionScheme = 0;
pdsch->refPoint = 0;
- pdsch->dmrs.dlDmrsSymbPos = 2;
+ pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
pdsch->dmrs.dlDmrsScramblingId = pci;
pdsch->dmrs.scid = 0;
pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
- pdsch->dmrs.dmrsPorts = 0;
+ pdsch->dmrs.dmrsPorts = 0x0001;
pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
- pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0,
- and PDSCH is always above SSB */
- pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs,numPdschSymbols);
+ /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
+ pdsch->pdschFreqAlloc.freqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB;
+ pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs, NUM_PDSCH_SYMBOL);
pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
pdsch->pdschTimeAlloc.rowIndex = 1;
- pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */
- pdsch->pdschTimeAlloc.timeAlloc.numSymb = numPdschSymbols;
+ /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
+ pdsch->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
+ pdsch->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
pdsch->beamPdschInfo.numPrgs = 1;
pdsch->beamPdschInfo.prgSize = 1;
pdsch->beamPdschInfo.digBfInterfaces = 0;
}
-/**
- * @brief Fill SSB start symbol
- *
- * @details
- *
- * Function : fillSsbStartSymb
- *
- * This API stores SSB start index per beam
- *
- * @param[in] SchCellCb *cellCb
- * @return int
- * -# ROK
- * -# RFAILED
- **/
-void fillSsbStartSymb(SchCellCb *cellCb)
-{
- uint8_t cnt, scs;
-
- scs = cellCb->cellCfg.ssbSchCfg.scsCommon;
- uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM];
-
- memset(ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
- /* Determine value of "n" based on Section 4.1 of 3GPP TS 38.213 */
- switch(scs)
- {
- case SCH_SCS_15KHZ:
- {
- uint8_t symbIdx=0;
- cnt = 2;/* n = 0, 1 for SCS = 15KHz */
- for(uint8_t idx=0; idx<cnt; idx++)
- {
- /* start symbol determined using {2, 8} + 14n */
- ssbStartSymbArr[symbIdx++] = 2 + SCH_SYMBOL_PER_SLOT*idx;
- ssbStartSymbArr[symbIdx++] = 8 + SCH_SYMBOL_PER_SLOT*idx;
- }
- }
- break;
- default:
- DU_LOG("\nERROR --> SCH : SCS %d is currently not supported", scs);
- }
- memset(cellCb->ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
- memcpy(cellCb->ssbStartSymbArr, ssbStartSymbArr, SCH_MAX_SSB_BEAM);
-
-}
-
/**
* @brief cell config from MAC to SCH.
*
SchCellCfgCfm schCellCfgCfm;
Pst rspPst;
Inst inst = pst->dstInst-1;
+ uint8_t coreset0Idx = 0;
+ uint8_t numRbs = 0;
+ uint8_t offset = 0;
+ uint8_t freqDomainResource[FREQ_DOM_RSRC_SIZE] = {0};
+ SchPdschConfig pdschCfg;
+
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : EVENT_SCH_CELL_CFG\n");
+#endif
schInitCellCb(inst, schCellCfg);
cellCb = schCb[inst].cells[inst]; //cells is of MAX_CELLS, why inst
cellCb->macInst = pst->srcInst;
/* derive the SIB1 config parameters */
- fillSchSib1Cfg(schCellCfg->bandwidth, cellCb->numSlots,
+ fillSchSib1Cfg(schCellCfg->numerology, schCellCfg->bandwidth, cellCb->numSlots,
&(schCellCfg->sib1SchCfg), schCellCfg->phyCellId,
schCellCfg->ssbSchCfg.ssbOffsetPointA);
memcpy(&cellCb->cellCfg, schCellCfg, sizeof(SchCellCfg));
+ /* Fill coreset frequencyDomainResource bitmap */
+ coreset0Idx = cellCb->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.coresetId;
+ numRbs = coresetIdxTable[coreset0Idx][1];
+ offset = coresetIdxTable[coreset0Idx][3];
+ fillCoresetFeqDomAllocMap(((cellCb->cellCfg.ssbSchCfg.ssbOffsetPointA - offset)/6), (numRbs/6), freqDomainResource);
+ covertFreqDomRsrcMapToIAPIFormat(freqDomainResource, \
+ cellCb->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc);
+
+ /* Fill K0 - K1 table for common cfg*/
+ BuildK0K1Table(cellCb, &cellCb->cellCfg.schInitialDlBwp.k0K1InfoTbl, true, cellCb->cellCfg.schInitialDlBwp.pdschCommon,
+ pdschCfg, DEFAULT_UL_ACK_LIST_COUNT, defaultUlAckTbl);
+
+ BuildK2InfoTable(cellCb, cellCb->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList,\
+ cellCb->cellCfg.schInitialUlBwp.puschCommon.numTimeDomRsrcAlloc, &cellCb->cellCfg.schInitialUlBwp.msg3K2InfoTbl, \
+ &cellCb->cellCfg.schInitialUlBwp.k2InfoTbl);
/* Initializing global variables */
cellCb->actvUeBitMap = 0;
cellCb->boIndBitMap = 0;
schCellCfgCfm.rsp = RSP_OK;
ret = (*SchCellCfgCfmOpts[rspPst.selector])(&rspPst, &schCellCfgCfm);
-
return ret;
}
uint8_t lcId = 0;
uint16_t ueIdx = 0;
uint16_t slot;
+#ifdef NR_TDD
+ uint16_t slotIdx = 0;
+#endif
SchUeCb *ueCb = NULLP;
SchCellCb *cell = NULLP;
SchDlSlotInfo *schDlSlotInfo = NULLP;
-
Inst inst = pst->dstInst-SCH_INST_START;
+
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : EVENT_DL_RLC_BO_INFO_TO_SCH\n");
+#endif
+
DU_LOG("\nDEBUG --> SCH : Received RLC BO Status indication");
cell = schCb[inst].cells[inst];
+ if(cell == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH : MacSchDlRlcBoInfo(): Cell does not exists");
+ return RFAILED;
+ }
+
GET_UE_IDX(dlBoInfo->crnti, ueIdx);
ueCb = &cell->ueCb[ueIdx-1];
lcId = dlBoInfo->lcId;
if(lcId == SRB1_LCID || lcId == SRB2_LCID || lcId == SRB3_LCID || \
- (lcId >= MIN_DRB_LCID && lcId <= MAX_DRB_LCID))
+ (lcId >= MIN_DRB_LCID && lcId <= MAX_DRB_LCID))
{
SET_ONE_BIT(ueIdx, cell->boIndBitMap);
ueCb->dlInfo.dlLcCtxt[lcId].bo = dlBoInfo->dataVolume;
return RFAILED;
}
- slot = (cell->slotInfo.slot + SCHED_DELTA + PHY_DELTA + BO_DELTA) % cell->numSlots;
+ slot = (cell->slotInfo.slot + SCHED_DELTA + PHY_DELTA_DL + BO_DELTA) % cell->numSlots;
+#ifdef NR_TDD
+ while(schGetSlotSymbFrmt(cell->slotFrmtBitMap, slot) != DL_SLOT)
+ {
+ slot = (slot + 1)%cell->numSlots;
+ slotIdx++;
+ if(slotIdx==cell->numSlots)
+ {
+ DU_LOG("\nERROR --> SCH : No DL Slot available");
+ return RFAILED;
+ }
+ }
+#endif
+
schDlSlotInfo = cell->schDlSlotInfo[slot];
+ if(schDlSlotInfo == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH : MacSchDlRlcBoInfo(): schDlSlotInfo does not exists");
+ return RFAILED;
+ }
SCH_ALLOC(schDlSlotInfo->dlMsgInfo, sizeof(DlMsgInfo));
- if(!schDlSlotInfo->dlMsgInfo)
+ if(schDlSlotInfo->dlMsgInfo == NULLP)
{
DU_LOG("\nERROR --> SCH : Memory allocation failed for dlMsgInfo");
schDlSlotInfo = NULL;
return RFAILED;
}
+
schDlSlotInfo->dlMsgInfo->crnti = dlBoInfo->crnti;
schDlSlotInfo->dlMsgInfo->ndi = 1;
schDlSlotInfo->dlMsgInfo->harqProcNum = 0;
schDlSlotInfo->dlMsgInfo->harqFeedbackInd = 0;
schDlSlotInfo->dlMsgInfo->dciFormatId = 1;
if(lcId == SRB0_LCID)
+ {
schDlSlotInfo->dlMsgInfo->isMsg4Pdu = true;
-
+ schDlSlotInfo->dlMsgInfo->dlMsgPduLen = dlBoInfo->dataVolume;
+ }
return ROK;
}
SchUeCb *ueCb = NULLP;
uint8_t lcgIdx;
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : EVENT_SHORT_BSR\n");
+#endif
+
DU_LOG("\nDEBUG --> SCH : Received BSR");
cellCb = schCb[schInst].cells[schInst];
ueCb = schGetUeCb(cellCb, bsrInd->crnti);
SchUeCb *ueCb;
SchCellCb *cellCb = schCb[inst].cells[inst];
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTSCH : EVENT_UCI_IND_TO_SCH\n");
+#endif
+
DU_LOG("\nDEBUG --> SCH : Received SR");
ueCb = schGetUeCb(cellCb, uciInd->crnti);
}
return ROK;
}
+
+/*******************************************************************
+ *
+ * @brief Allocates requested PRBs for DL
+ *
+ * @details
+ *
+ * Function : allocatePrbDl
+ *
+ * Functionality:
+ * Allocates requested PRBs in DL
+ * Keeps track of allocated PRB (using bitmap) and remaining PRBs
+ *
+ * @params[in] prbAlloc table
+ * Start symbol
+ * Number of symbols
+ * Start PRB
+ * Number of PRBs
+ *
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, \
+ uint8_t startSymbol, uint8_t symbolLength, uint16_t *startPrb, uint16_t numPrb)
+{
+ uint8_t symbol = 0;
+ uint16_t broadcastPrbStart=0, broadcastPrbEnd=0;
+ FreePrbBlock *freePrbBlock = NULLP;
+ CmLList *freePrbNode = NULLP;
+ PduTxOccsaion ssbOccasion=0, sib1Occasion=0;
+ SchDlSlotInfo *schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
+ SchPrbAlloc *prbAlloc = &schDlSlotInfo->prbAlloc;
+
+ /* If startPrb is set to MAX_NUM_RB, it means startPrb is not known currently.
+ * Search for an appropriate location in PRB grid and allocate requested resources */
+ if(*startPrb == MAX_NUM_RB)
+ {
+ /* Check if SSB/SIB1 is also scheduled in this slot */
+ ssbOccasion = schCheckSsbOcc(cell, slotTime);
+ sib1Occasion = schCheckSib1Occ(cell, slotTime);
+
+ if(ssbOccasion && sib1Occasion)
+ {
+ broadcastPrbStart = cell->cellCfg.ssbSchCfg.ssbOffsetPointA;
+ broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB + cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.numPrb -1;
+ }
+ else if(ssbOccasion)
+ {
+ broadcastPrbStart = cell->cellCfg.ssbSchCfg.ssbOffsetPointA;
+ broadcastPrbEnd = broadcastPrbStart + SCH_SSB_NUM_PRB -1;
+ }
+ else if(sib1Occasion)
+ {
+ broadcastPrbStart = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.startPrb;
+ broadcastPrbEnd = broadcastPrbStart + cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc.numPrb -1;
+ }
+
+ /* Iterate through all free PRB blocks */
+ freePrbNode = prbAlloc->freePrbBlockList.first;
+ while(freePrbNode)
+ {
+ freePrbBlock = (FreePrbBlock *)freePrbNode->node;
+
+ /* If broadcast message is scheduled in this slot, then check if its PRBs belong to the current free block.
+ * Since SSB/SIB1 PRB location is fixed, these PRBs cannot be allocated to other message in same slot */
+ if((ssbOccasion || sib1Occasion) &&
+ ((broadcastPrbStart >= freePrbBlock->startPrb) && (broadcastPrbStart <= freePrbBlock->endPrb)) && \
+ ((broadcastPrbEnd >= freePrbBlock->startPrb) && (broadcastPrbEnd <= freePrbBlock->endPrb)))
+ {
+ /* Implmentation is done such that highest-numbered free-RB is allocated first */
+ if((freePrbBlock->endPrb > broadcastPrbEnd) && ((freePrbBlock->endPrb - broadcastPrbEnd) >= numPrb))
+ {
+ /* If sufficient free PRBs are available above bradcast message then,
+ * endPrb = freePrbBlock->endPrb
+ * startPrb = endPrb - numPrb +1;
+ */
+ *startPrb = freePrbBlock->endPrb - numPrb +1;
+ break;
+ }
+ else if((broadcastPrbStart > freePrbBlock->startPrb) && ((broadcastPrbStart - freePrbBlock->startPrb) >= numPrb))
+ {
+ /* If free PRBs are available below broadcast message then,
+ * endPrb = broadcastPrbStart - 1
+ * startPrb = endPrb - numPrb +1
+ */
+ *startPrb = broadcastPrbStart - numPrb;
+ break;
+ }
+ else
+ {
+ freePrbNode = freePrbNode->next;
+ continue;
+ }
+ }
+ else
+ {
+ /* Check if requested number of blocks can be allocated from the current block */
+ if (freePrbBlock->numFreePrb < numPrb)
+ {
+ freePrbNode = freePrbNode->next;
+ continue;
+ }
+ *startPrb = freePrbBlock->endPrb - numPrb +1;
+ break;
+ }
+ }
+
+ /* If no free block can be used to allocated request number of RBs */
+ if(*startPrb == MAX_NUM_RB)
+ return RFAILED;
+ }
+
+ /* If startPrb is known already, check if requested PRBs are available for allocation */
+ else
+ {
+ freePrbNode = isPrbAvailable(&prbAlloc->freePrbBlockList, *startPrb, numPrb);
+ if(!freePrbNode)
+ {
+ DU_LOG("\nERROR --> SCH: Requested PRB unavailable");
+ return RFAILED;
+ }
+ }
+
+ /* Update bitmap to allocate PRBs */
+ for(symbol=startSymbol; symbol < (startSymbol+symbolLength); symbol++)
+ {
+ if(fillPrbBitmap(prbAlloc->prbBitMap[symbol], *startPrb, numPrb) != ROK)
+ {
+ DU_LOG("\nERROR --> SCH: fillPrbBitmap() failed for symbol [%d] ", symbol);
+ return RFAILED;
+ }
+ }
+
+ /* Update the remaining number for free PRBs */
+ removeAllocatedPrbFromFreePrbList(&prbAlloc->freePrbBlockList, freePrbNode, *startPrb, numPrb);
+
+ return ROK;
+}
+
/**********************************************************************
End of file
**********************************************************************/
Code Review / o-du / l2.git / blobdiff