#include "sch.h"
#include "sch_utils.h"
-extern SchCb schCb[SCH_MAX_INST];
+SchCb schCb[SCH_MAX_INST];
void SchFillCfmPst(Pst *reqPst,Pst *cfmPst,RgMngmt *cfm);
+
/* local defines */
SchCellCfgCfmFunc SchCellCfgCfmOpts[] =
{
Inst inst = (instId - SCH_INST_START);
/* Initialize the MAC TskInit structure to zero */
- cmMemset ((uint8_t *)&schCb[inst], 0, sizeof(schCb));
+ memset ((uint8_t *)&schCb[inst], 0, sizeof(schCb));
/* Initialize the MAC TskInit with received values */
schCb[inst].schInit.ent = entity;
schCb[inst].schInit.acnt = FALSE;
schCb[inst].schInit.usta = FALSE;
schCb[inst].schInit.trc = FALSE;
- schCb[inst].schInit.procId = SFndProcId();
+ schCb[inst].schInit.procId = ODU_GET_PROCID();
return ROK;
} /* schActvInit */
* reason for success/failure of this function.
*
* @param[in] RgCfg *cfg, the Configuaration information
- * @return U16
+ * @return uint16_t
* -# LCM_REASON_NOT_APPL
* -# LCM_REASON_INVALID_MSGTYPE
* -# LCM_REASON_MEM_NOAVAIL
**/
-PUBLIC U16 SchInstCfg(RgCfg *cfg, Inst dInst)
+uint8_t SchInstCfg(RgCfg *cfg, Inst dInst)
{
uint16_t ret = LCM_REASON_NOT_APPL;
Inst inst = (dInst - SCH_INST_START);
- printf("\nEntered SchInstCfg()");
+ DU_LOG("\nDEBUG --> SCH : Entered SchInstCfg()");
/* Check if Instance Configuration is done already */
if (schCb[inst].schInit.cfgDone == TRUE)
{
return LCM_REASON_INVALID_MSGTYPE;
}
/* Update the Pst structure for LM interface */
- cmMemcpy((U8 *)&schCb[inst].schInit.lmPst,
- (U8 *)&cfg->s.schInstCfg.genCfg.lmPst,
+ memcpy(&schCb[inst].schInit.lmPst,
+ &cfg->s.schInstCfg.genCfg.lmPst,
sizeof(Pst));
schCb[inst].schInit.inst = inst;
schCb[inst].genCfg.isSCellActDeactAlgoEnable = cfg->s.schInstCfg.genCfg.isSCellActDeactAlgoEnable;
#endif
schCb[inst].genCfg.startCellId = cfg->s.schInstCfg.genCfg.startCellId;
-#if 0
+
/* Initialzie the timer queue */
- cmMemset((U8 *)&schCb[inst].tmrTq, 0, sizeof(CmTqType)*RGSCH_TQ_SIZE);
+ memset(&schCb[inst].tmrTq, 0, sizeof(CmTqType) * SCH_TQ_SIZE);
/* Initialize the timer control point */
- cmMemset((U8 *)&schCb[inst].tmrTqCp, 0, sizeof(CmTqCp));
+ memset(&schCb[inst].tmrTqCp, 0, sizeof(CmTqCp));
schCb[inst].tmrTqCp.tmrLen = RGSCH_TQ_SIZE;
/* SS_MT_TMR needs to be enabled as schActvTmr needs instance information */
- /* Timer Registration request to SSI */
- if (SRegTmrMt(schCb[inst].schInit.ent, dInst,
- (S16)schCb[inst].genCfg.tmrRes, schActvTmr) != ROK)
+ /* Timer Registration request to system services */
+ if (ODU_REG_TMR_MT(schCb[inst].schInit.ent, dInst,
+ (int)schCb[inst].genCfg.tmrRes, schActvTmr) != ROK)
{
- RLOG_ARG0(L_ERROR,DBG_INSTID,inst, "SchInstCfg(): Failed to "
+ DU_LOG("\nERROR --> SCH : SchInstCfg(): Failed to "
"register timer.");
- RETVALUE(LCM_REASON_MEM_NOAVAIL);
+ return (LCM_REASON_MEM_NOAVAIL);
}
-#endif
+
/* Set Config done in TskInit */
schCb[inst].schInit.cfgDone = TRUE;
- printf("\nScheduler gen config done");
+ DU_LOG("\nINFO --> SCH : Scheduler gen config done");
return ret;
}
* @return S16
* -# ROK
**/
-int SchProcGenCfgReq(Pst *pst, RgMngmt *cfg)
+uint8_t SchProcGenCfgReq(Pst *pst, RgMngmt *cfg)
{
- uint16_t ret = LCM_PRIM_OK;
- uint16_t reason = LCM_REASON_NOT_APPL;
+ uint8_t ret = LCM_PRIM_OK;
+ uint16_t reason = LCM_REASON_NOT_APPL;
RgMngmt cfm;
Pst cfmPst;
if(pst->dstInst < SCH_INST_START)
{
- DU_LOG("\nInvalid inst ID");
- DU_LOG("\nSchProcGenCfgReq(): "
+ DU_LOG("\nERROR --> SCH : Invalid inst ID");
+ DU_LOG("\nERROR --> SCH : SchProcGenCfgReq(): "
"pst->dstInst=%d SCH_INST_START=%d", pst->dstInst,SCH_INST_START);
return ROK;
}
- printf("\nReceived scheduler gen config");
+ DU_LOG("\nINFO --> SCH : Received scheduler gen config");
/* Fill the post structure for sending the confirmation */
memset(&cfmPst, 0 , sizeof(Pst));
SchFillCfmPst(pst, &cfmPst, cfg);
- cmMemset((U8 *)&cfm, 0, sizeof(RgMngmt));
+ memset(&cfm, 0, sizeof(RgMngmt));
#ifdef LMINT3
cfm.hdr.transId =
default:
ret = LCM_PRIM_NOK;
reason = LCM_REASON_INVALID_ELMNT;
- DU_LOG("\nInvalid Elmnt=%d", cfg->hdr.elmId.elmnt);
+ DU_LOG("\nERROR --> SCH : Invalid Elmnt=%d", cfg->hdr.elmId.elmnt);
break;
}
*
* @details
*
- * Function : macSchSlotInd
+ * Function : MacSchSlotInd
*
* This API is invoked by PHY to indicate slot indication to Scheduler for
* a cell.
* -# ROK
* -# RFAILED
**/
-uint8_t macSchSlotInd(Pst *pst, SlotIndInfo *slotInd)
+uint8_t MacSchSlotInd(Pst *pst, SlotIndInfo *slotInd)
{
Inst inst = pst->dstInst-SCH_INST_START;
- /* Now call the TOM (Tfu ownership module) primitive to process further */
schProcessSlotInd(slotInd, inst);
return ROK;
-} /* macSchSlotInd */
+} /* MacSchSlotInd */
/*******************************************************************
*
*
* @details
*
- * Function : macSchRachInd
+ * Function : MacSchRachInd
*
* Functionality:
* Processes Rach indication from MAC
* RFAILED - failure
*
* ****************************************************************/
-uint8_t macSchRachInd(Pst *pst, RachIndInfo *rachInd)
+uint8_t MacSchRachInd(Pst *pst, RachIndInfo *rachInd)
{
Inst inst = pst->dstInst-SCH_INST_START;
- DU_LOG("\nSCH : Received Rach indication");
+ DU_LOG("\nINFO --> SCH : Received Rach indication");
schProcessRachInd(rachInd, inst);
return ROK;
}
*
* @details
*
- * Function : macSchCrcInd
+ * Function : MacSchCrcInd
*
* Functionality:
* Processes CRC indication from MAC
* RFAILED - failure
*
* ****************************************************************/
-uint8_t macSchCrcInd(Pst *pst, CrcIndInfo *crcInd)
+uint8_t MacSchCrcInd(Pst *pst, CrcIndInfo *crcInd)
{
switch(crcInd->crcInd[0])
{
case CRC_FAILED:
- DU_LOG("\nSCH : Received CRC indication. CRC Status [FAILURE]");
+ DU_LOG("\nDEBUG --> SCH : Received CRC indication. CRC Status [FAILURE]");
break;
case CRC_PASSED:
- DU_LOG("\nSCH : Received CRC indication. CRC Status [PASS]");
+ DU_LOG("\nDEBUG --> SCH : Received CRC indication. CRC Status [PASS]");
break;
default:
- DU_LOG("\nSCH : Invalid CRC state %d", crcInd->crcInd[0]);
+ DU_LOG("\nDEBUG --> SCH : Invalid CRC state %d", crcInd->crcInd[0]);
return RFAILED;
}
return ROK;
}
+#ifdef NR_TDD
+/**
+ *@brief Returns TDD periodicity in micro seconds
+ *
+ * @details
+ *
+ * Function : schGetPeriodicityInMsec
+ *
+ * This API retunrs TDD periodicity in micro seconds
+ *
+ * @param[in] DlUlTxPeriodicity
+ * @return periodicityInMsec
+ * **/
+
+uint16_t schGetPeriodicityInMsec(DlUlTxPeriodicity tddPeriod)
+{
+ uint16_t periodicityInMsec = 0;
+ switch(tddPeriod)
+ {
+ case TX_PRDCTY_MS_0P5:
+ {
+ periodicityInMsec = 500;
+ break;
+ }
+ case TX_PRDCTY_MS_0P625:
+ {
+ periodicityInMsec = 625;
+ break;
+ }
+ case TX_PRDCTY_MS_1:
+ {
+ periodicityInMsec = 1000;
+ break;
+ }
+ case TX_PRDCTY_MS_1P25:
+ {
+ periodicityInMsec = 1250;
+ break;
+ }
+ case TX_PRDCTY_MS_2:
+ {
+ periodicityInMsec = 2000;
+ break;
+ }
+ case TX_PRDCTY_MS_2P5:
+ {
+ periodicityInMsec = 2500;
+ break;
+ }
+ case TX_PRDCTY_MS_5:
+ {
+ periodicityInMsec = 5000;
+ break;
+ }
+ case TX_PRDCTY_MS_10:
+ {
+ periodicityInMsec = 10000;
+ break;
+ }
+ default:
+ {
+ DU_LOG("\nERROR --> SCH : Invalid DlUlTxPeriodicity:%d", tddPeriod);
+ }
+ }
+
+ return periodicityInMsec;
+}
+
+
+/**
+ * @brief init TDD slot config
+ *
+ * @details
+ *
+ * Function : schInitTddSlotCfg
+ *
+ * This API is invoked after receiving schCellCfg
+ *
+ * @param[in] schCellCb *cell
+ * @param[in] SchCellCfg *schCellCfg
+ * @return void
+ **/
+void schInitTddSlotCfg(SchCellCb *cell, SchCellCfg *schCellCfg)
+{
+ uint16_t periodicityInMicroSec = 0;
+ uint32_t slotBitPos, symbBitPos, bitMask;
+ int8_t slotIdx, symbIdx;
+
+ periodicityInMicroSec = schGetPeriodicityInMsec(schCellCfg->tddCfg.tddPeriod);
+ cell->numSlotsInPeriodicity = (periodicityInMicroSec * pow(2, schCellCfg->numerology))/1000;
+cell->slotFrmtBitMap = 0;
+ cell->symbFrmtBitMap = 0;
+ slotBitPos = (cell->numSlotsInPeriodicity*2)-1; /* considering 2 bits to represent a slot */
+ symbBitPos = (MAX_SYMB_PER_SLOT*2)-1; /* considering 2 bits to represent a symbol */
+ for(slotIdx = cell->numSlotsInPeriodicity-1; slotIdx >= 0; slotIdx--)
+ {
+ symbIdx = 0;
+ /* If the first and last symbol are the same, the entire slot is the same type */
+ if((schCellCfg->tddCfg.slotCfg[slotIdx][symbIdx] == schCellCfg->tddCfg.slotCfg[slotIdx][MAX_SYMB_PER_SLOT-1]) &&
+ schCellCfg->tddCfg.slotCfg[slotIdx][symbIdx] != FLEXI_SLOT)
+ {
+ switch(schCellCfg->tddCfg.slotCfg[slotIdx][symbIdx])
+ {
+ case DL_SLOT:
+ {
+ /*BitMap to be set to 00 */
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
+ slotBitPos--;
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
+ slotBitPos--;
+ break;
+ }
+ case UL_SLOT:
+ {
+ /*BitMap to be set to 01 */
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
+ slotBitPos--;
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((1<<slotBitPos) & bitMask);
+ slotBitPos--;
+ break;
+ }
+ default:
+ DU_LOG("\nERROR --> SCH : Invalid slot Config in schInitTddSlotCfg");
+ }
+ continue;
+ }
+ /* slot config is flexible. First set slotBitMap to 10 */
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((1<<slotBitPos) & bitMask);
+ slotBitPos--;
+ bitMask = 1<<slotBitPos;
+ cell->slotFrmtBitMap = (cell->slotFrmtBitMap & ~(bitMask)) | ((0<<slotBitPos) & bitMask);
+ slotBitPos--;
+ /* Now set symbol bitmap */
+ for(symbIdx = MAX_SYMB_PER_SLOT-1; symbIdx >= 0; symbIdx--)
+ {
+ switch(schCellCfg->tddCfg.slotCfg[slotIdx][symbIdx])
+ {
+ case DL_SLOT:
+ {
+ /*symbol BitMap to be set to 00 */
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
+ symbBitPos--;
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
+ symbBitPos--;
+ break;
+ }
+ case UL_SLOT:
+ {
+ /*symbol BitMap to be set to 01 */
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
+ symbBitPos--;
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((1<<symbBitPos) & bitMask);
+ symbBitPos--;
+ break;
+ }
+ case FLEXI_SLOT:
+ {
+ /*symbol BitMap to be set to 10 */
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((1<<symbBitPos) & bitMask);
+ symbBitPos--;
+ bitMask = 1<<symbBitPos;
+ cell->symbFrmtBitMap = (cell->symbFrmtBitMap & ~(bitMask)) | ((0<<symbBitPos) & bitMask);
+ symbBitPos--;
+ break;
+ }
+ default:
+ DU_LOG("\nERROR --> SCH : Invalid slot Config in schInitTddSlotCfg");
+ }
+ }
+ }
+
+}
+#endif
+
+/**
+ * @brief Fill SSB start symbol
+ *
+ * @details
+ *
+ * Function : fillSsbStartSymb
+ *
+ * This API stores SSB start index per beam
+ *
+ * @param[in] SchCellCb *cellCb
+ * @return int
+ * -# ROK
+ * -# RFAILED
+ **/
+void fillSsbStartSymb(SchCellCb *cellCb)
+{
+ uint8_t cnt, scs, symbIdx, ssbStartSymbArr[SCH_MAX_SSB_BEAM];
+
+ scs = cellCb->cellCfg.ssbSchCfg.scsCommon;
+
+ memset(ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
+ symbIdx = 0;
+ /* Determine value of "n" based on Section 4.1 of 3GPP TS 38.213 */
+ switch(scs)
+ {
+ case SCS_15KHZ:
+ {
+ if(cellCb->cellCfg.dlFreq <= 300000)
+ cnt = 2;/* n = 0, 1 */
+ else
+ cnt = 4; /* n = 0, 1, 2, 3 */
+ for(uint8_t idx=0; idx<cnt; idx++)
+ {
+ /* start symbol determined using {2, 8} + 14n */
+ ssbStartSymbArr[symbIdx++] = 2 + SCH_SYMBOL_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 8 + SCH_SYMBOL_PER_SLOT*idx;
+ }
+ }
+ break;
+ case SCS_30KHZ:
+ {
+ if(cellCb->cellCfg.dlFreq <= 300000)
+ cnt = 1;/* n = 0 */
+ else
+ cnt = 2; /* n = 0, 1 */
+ for(uint8_t idx=0; idx<cnt; idx++)
+ {
+ /* start symbol determined using {4, 8, 16, 20} + 28n */
+ ssbStartSymbArr[symbIdx++] = 4 + SCH_SYMBOL_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 8 + SCH_SYMBOL_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 16 + SCH_SYMBOL_PER_SLOT*idx;
+ ssbStartSymbArr[symbIdx++] = 20 + SCH_SYMBOL_PER_SLOT*idx;
+ }
+ }
+ break;
+ default:
+ DU_LOG("\nERROR --> SCH : SCS %d is currently not supported", scs);
+ }
+ memset(cellCb->ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
+ memcpy(cellCb->ssbStartSymbArr, ssbStartSymbArr, SCH_MAX_SSB_BEAM);
+
+}
+
/**
- * @brief inti cellCb based on cellCfg
+ * @brief init cellCb based on cellCfg
*
* @details
*
- * Function : InitSchCellCb
+ * Function : schInitCellCb
*
* This API is invoked after receiving schCellCfg
*
* -# ROK
* -# RFAILED
**/
-int InitSchCellCb(Inst inst, SchCellCfg *schCellCfg)
+uint8_t schInitCellCb(Inst inst, SchCellCfg *schCellCfg)
{
- SchCellCb *cell;
+ SchCellCb *cell= NULLP;
SCH_ALLOC(cell, sizeof(SchCellCb));
if(!cell)
{
- DU_LOG("\nMemory allocation failed in InitSchCellCb");
+ DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb");
return RFAILED;
}
cell->cellId = schCellCfg->cellId;
cell->instIdx = inst;
- switch(schCellCfg->ssbSchCfg.scsCommon)
+ switch(schCellCfg->numerology)
{
- case SCH_SCS_15KHZ:
+ case SCH_NUMEROLOGY_0:
+ {
+ cell->numSlots = SCH_MU0_NUM_SLOTS;
+ }
+ break;
+ case SCH_NUMEROLOGY_1:
+ {
+ cell->numSlots = SCH_MU1_NUM_SLOTS;
+ }
+ break;
+ case SCH_NUMEROLOGY_2:
+ {
+ cell->numSlots = SCH_MU2_NUM_SLOTS;
+ }
+ break;
+ case SCH_NUMEROLOGY_3:
+ {
+ cell->numSlots = SCH_MU3_NUM_SLOTS;
+ }
+ break;
+ case SCH_NUMEROLOGY_4:
{
- cell->numSlots = SCH_NUM_SLOTS;
+ cell->numSlots = SCH_MU4_NUM_SLOTS;
}
break;
default:
- DU_LOG("\nSCS %d not supported", schCellCfg->ssbSchCfg.scsCommon);
+ DU_LOG("\nERROR --> SCH : Numerology %d not supported", schCellCfg->numerology);
}
+#ifdef NR_TDD
+ schInitTddSlotCfg(cell, schCellCfg);
+#endif
- for(uint8_t idx=0; idx<SCH_NUM_SLOTS; idx++)
+ SCH_ALLOC(cell->schDlSlotInfo, cell->numSlots * sizeof(SchDlSlotInfo*));
+ if(!cell->schDlSlotInfo)
+ {
+ DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb for schDlSlotInfo");
+ return RFAILED;
+ }
+
+ SCH_ALLOC(cell->schUlSlotInfo, cell->numSlots * sizeof(SchUlSlotInfo*));
+ if(!cell->schUlSlotInfo)
+ {
+ DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb for schUlSlotInfo");
+ return RFAILED;
+ }
+
+ for(uint8_t idx=0; idx<cell->numSlots; idx++)
{
SchDlSlotInfo *schDlSlotInfo;
SchUlSlotInfo *schUlSlotInfo;
SCH_ALLOC(schDlSlotInfo, sizeof(SchDlSlotInfo));
if(!schDlSlotInfo)
{
- DU_LOG("\nMemory allocation failed in InitSchCellCb");
+ DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb");
return RFAILED;
}
SCH_ALLOC(schUlSlotInfo, sizeof(SchUlSlotInfo));
if(!schUlSlotInfo)
{
- DU_LOG("\nMemory allocation failed in InitSchCellCb");
+ DU_LOG("\nERROR --> SCH : Memory allocation failed in schInitCellCb");
return RFAILED;
}
- memset(schDlSlotInfo, 0, sizeof(SchDlSlotInfo));
- memset(schUlSlotInfo, 0, sizeof(SchUlSlotInfo));
-
- schDlSlotInfo->totalPrb = schUlSlotInfo->totalPrb = MAX_NUM_RB;
-
- for(uint8_t itr=0; itr<SCH_SYMBOL_PER_SLOT; itr++)
- {
- schDlSlotInfo->assignedPrb[itr] = 0;
- schUlSlotInfo->assignedPrb[itr] = 0;
- }
- schUlSlotInfo->schPuschInfo = NULLP;
-
- for(uint8_t itr=0; itr<MAX_SSB_IDX; itr++)
- {
- memset(&schDlSlotInfo->ssbInfo[itr], 0, sizeof(SsbInfo));
- }
+ schInitDlSlot(schDlSlotInfo);
+ schInitUlSlot(schUlSlotInfo);
cell->schDlSlotInfo[idx] = schDlSlotInfo;
cell->schUlSlotInfo[idx] = schUlSlotInfo;
}
+ cell->firstSsbTransmitted = false;
+ cell->firstSib1Transmitted = false;
+ fillSsbStartSymb(cell);
schCb[inst].cells[inst] = cell;
- DU_LOG("\nCell init completed for cellId:%d", cell->cellId);
+ DU_LOG("\nINFO --> SCH : Cell init completed for cellId:%d", cell->cellId);
return ROK;
}
*
* Fill SIB1 configuration
*
- * @param[in] Inst schInst : scheduler instance
+ * @param[in] uint8_t bandwidth : total available bandwidth
+ * uint8_t numSlots : total slots per SFN
* SchSib1Cfg *sib1SchCfg : cfg to be filled
* uint16_t pci : physical cell Id
* uint8_t offsetPointA : offset
* @return void
**/
-void fillSchSib1Cfg(Inst schInst, SchSib1Cfg *sib1SchCfg, uint16_t pci, \
- uint8_t offsetPointA)
+void fillSchSib1Cfg(uint8_t bandwidth, uint8_t numSlots, SchSib1Cfg *sib1SchCfg, uint16_t pci, uint8_t offsetPointA)
{
uint8_t coreset0Idx = 0;
uint8_t searchSpace0Idx = 0;
* [(O . 2^u + i . M ) ] mod numSlotsPerSubframe
* assuming u = 0, i = 0, numSlotsPerSubframe = 10
* Also, from this configuration, coreset0 is only on even subframe */
- slotIndex = ((oValue * 1) + (0 * mValue)) % 10;
+ slotIndex = ((oValue * 1) + (0 * mValue)) % numSlots;
sib1SchCfg->n0 = slotIndex;
/* calculate the PRBs */
- schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
+ freqDomRscAllocType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
/* fill BWP */
- bwp->freqAlloc.numPrb = MAX_NUM_RB; /* whole of BW */
+ switch(bandwidth)
+ {
+ case BANDWIDTH_20MHZ:
+ {
+ bwp->freqAlloc.numPrb = TOTAL_PRB_20MHZ_MU0;
+ }
+ break;
+ case BANDWIDTH_100MHZ:
+ {
+ bwp->freqAlloc.numPrb = TOTAL_PRB_100MHZ_MU1;
+ }
+ break;
+ default:
+ DU_LOG("\nERROR --> SCH : Bandwidth %d not supported", bandwidth);
+
+ }
bwp->freqAlloc.startPrb = 0;
bwp->subcarrierSpacing = 0; /* 15Khz */
bwp->cyclicPrefix = 0; /* normal */
/* fill the PDCCH PDU */
- pdcch->coreset0Cfg.coreSet0Size = numRbs;
- pdcch->coreset0Cfg.startSymbolIndex = firstSymbol;
- pdcch->coreset0Cfg.durationSymbols = numSymbols;
- memcpy(pdcch->coreset0Cfg.freqDomainResource,FreqDomainResource,6);
- pdcch->coreset0Cfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
- pdcch->coreset0Cfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
- pdcch->coreset0Cfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
- pdcch->coreset0Cfg.coreSetType = 0;
- pdcch->coreset0Cfg.shiftIndex = pci;
- pdcch->coreset0Cfg.precoderGranularity = 0; /* sameAsRegBundle */
+ pdcch->coresetCfg.coreSetSize = numRbs;
+ pdcch->coresetCfg.startSymbolIndex = firstSymbol;
+ pdcch->coresetCfg.durationSymbols = numSymbols;
+ memcpy(pdcch->coresetCfg.freqDomainResource,FreqDomainResource,6);
+ pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
+ pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
+ pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
+ pdcch->coresetCfg.coreSetType = 0;
+ pdcch->coresetCfg.shiftIndex = pci;
+ pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
pdcch->numDlDci = 1;
pdcch->dci.rnti = SI_RNTI;
pdcch->dci.scramblingId = pci;
pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
- pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB; /* the RB numbering starts from coreset0,
+ pdsch->pdschFreqAlloc.freqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB + 1; /* the RB numbering starts from coreset0,
and PDSCH is always above SSB */
pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,sib1SchCfg->sib1Mcs,numPdschSymbols);
pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
}
-/**
- * @brief Fill SSB start symbol
- *
- * @details
- *
- * Function : fillSsbStartSymb
- *
- * This API stores SSB start index per beam
- *
- * @param[in] SchCellCb *cellCb
- * @return int
- * -# ROK
- * -# RFAILED
- **/
-void fillSsbStartSymb(SchCellCb *cellCb)
-{
- uint8_t cnt, scs;
-
- scs = cellCb->cellCfg.ssbSchCfg.scsCommon;
- uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM];
-
- memset(ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
- /* Determine value of "n" based on Section 4.1 of 3GPP TS 38.213 */
- switch(scs)
- {
- case SCH_SCS_15KHZ:
- {
- uint8_t symbIdx=0;
- cnt = 2;/* n = 0, 1 for SCS = 15KHz */
- for(uint8_t idx=0; idx<cnt; idx++)
- {
- /* start symbol determined using {2, 8} + 14n */
- ssbStartSymbArr[symbIdx++] = 2 + SCH_SYMBOL_PER_SLOT*idx;
- ssbStartSymbArr[symbIdx++] = 8 + SCH_SYMBOL_PER_SLOT*idx;
- }
- }
- break;
- default:
- DU_LOG("\nSCS %d is currently not supported", scs);
- }
- memset(cellCb->ssbStartSymbArr, 0, sizeof(SCH_MAX_SSB_BEAM));
- memcpy(cellCb->ssbStartSymbArr, ssbStartSymbArr, SCH_MAX_SSB_BEAM);
-
-}
-
/**
* @brief cell config from MAC to SCH.
*
Pst rspPst;
Inst inst = pst->dstInst-1;
- InitSchCellCb(inst, schCellCfg);
+ schInitCellCb(inst, schCellCfg);
cellCb = schCb[inst].cells[inst]; //cells is of MAX_CELLS, why inst
cellCb->macInst = pst->srcInst;
/* derive the SIB1 config parameters */
- fillSchSib1Cfg(
- inst,
- &(schCellCfg->sib1SchCfg),
- schCellCfg->phyCellId,
+ fillSchSib1Cfg(schCellCfg->bandwidth, cellCb->numSlots,
+ &(schCellCfg->sib1SchCfg), schCellCfg->phyCellId,
schCellCfg->ssbSchCfg.ssbOffsetPointA);
memcpy(&cellCb->cellCfg, schCellCfg, sizeof(SchCellCfg));
+ /* Initializing global variables */
+ cellCb->actvUeBitMap = 0;
+ cellCb->boIndBitMap = 0;
+
/* Fill and send Cell config confirm */
memset(&rspPst, 0, sizeof(Pst));
FILL_PST_SCH_TO_MAC(rspPst, pst->dstInst);
*
* @details
*
- * Function : macSchDlRlcBoInfo
+ * Function : MacSchDlRlcBoInfo
*
* Functionality:
* Processes DL RLC BO info from MAC
* RFAILED - failure
*
* ****************************************************************/
-uint8_t macSchDlRlcBoInfo(Pst *pst, DlRlcBOInfo *dlBoInfo)
+uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo)
{
- uint16_t lcIdx;
+ uint8_t lcId = 0;
+ uint16_t ueIdx = 0;
+ uint16_t slot;
+ SchUeCb *ueCb = NULLP;
+ SchCellCb *cell = NULLP;
+ SchDlSlotInfo *schDlSlotInfo = NULLP;
+
Inst inst = pst->dstInst-SCH_INST_START;
- DU_LOG("\nSCH : Received RLC BO Status indication");
+ DU_LOG("\nDEBUG --> SCH : Received RLC BO Status indication");
+ cell = schCb[inst].cells[inst];
- SchCellCb *cell = schCb[inst].cells[inst];
- SchDlSlotInfo *schDlSlotInfo = \
- cell->schDlSlotInfo[(cell->slotInfo.slot + SCHED_DELTA + PHY_DELTA + MSG4_DELAY) % SCH_NUM_SLOTS];
+ GET_UE_IDX(dlBoInfo->crnti, ueIdx);
+ ueCb = &cell->ueCb[ueIdx-1];
+ lcId = dlBoInfo->lcId;
- for(lcIdx = 0; lcIdx < dlBoInfo->numLc; lcIdx++)
+ if(lcId == SRB1_LCID || lcId == SRB2_LCID || lcId == SRB3_LCID || \
+ (lcId >= MIN_DRB_LCID && lcId <= MAX_DRB_LCID))
{
- if(dlBoInfo->boInfo[lcIdx].lcId == CCCH_LCID)
- {
- SCH_ALLOC(schDlSlotInfo->msg4Info, sizeof(Msg4Info));
- if(!schDlSlotInfo->msg4Info)
- {
- DU_LOG("\nSCH : Memory allocation failed for msg4Info");
- schDlSlotInfo = NULL;
- return RFAILED;
- }
- schDlSlotInfo->msg4Info->crnti = dlBoInfo->crnti;
- schDlSlotInfo->msg4Info->ndi = 1;
- schDlSlotInfo->msg4Info->harqProcNum = 0;
- schDlSlotInfo->msg4Info->dlAssignIdx = 0;
- schDlSlotInfo->msg4Info->pucchTpc = 0;
- schDlSlotInfo->msg4Info->pucchResInd = 0;
- schDlSlotInfo->msg4Info->harqFeedbackInd = 0;
- schDlSlotInfo->msg4Info->dciFormatId = 1;
- }
+ SET_ONE_BIT(ueIdx, cell->boIndBitMap);
+ ueCb->dlInfo.dlLcCtxt[lcId].bo = dlBoInfo->dataVolume;
+ }
+ else if(lcId != SRB0_LCID)
+ {
+ DU_LOG("\nERROR --> SCH : Invalid LC Id %d in MacSchDlRlcBoInfo", lcId);
+ return RFAILED;
}
+ slot = (cell->slotInfo.slot + SCHED_DELTA + PHY_DELTA_DL + BO_DELTA) % cell->numSlots;
+ schDlSlotInfo = cell->schDlSlotInfo[slot];
+
+ SCH_ALLOC(schDlSlotInfo->dlMsgInfo, sizeof(DlMsgInfo));
+ if(!schDlSlotInfo->dlMsgInfo)
+ {
+ DU_LOG("\nERROR --> SCH : Memory allocation failed for dlMsgInfo");
+ schDlSlotInfo = NULL;
+ return RFAILED;
+ }
+ schDlSlotInfo->dlMsgInfo->crnti = dlBoInfo->crnti;
+ schDlSlotInfo->dlMsgInfo->ndi = 1;
+ schDlSlotInfo->dlMsgInfo->harqProcNum = 0;
+ schDlSlotInfo->dlMsgInfo->dlAssignIdx = 0;
+ schDlSlotInfo->dlMsgInfo->pucchTpc = 0;
+ schDlSlotInfo->dlMsgInfo->pucchResInd = 0;
+ schDlSlotInfo->dlMsgInfo->harqFeedbackInd = 0;
+ schDlSlotInfo->dlMsgInfo->dciFormatId = 1;
+ if(lcId == SRB0_LCID)
+ schDlSlotInfo->dlMsgInfo->isMsg4Pdu = true;
+
+ return ROK;
+}
+
+/*******************************************************************
+ *
+ * @brief Processes BSR indiation from MAC
+ *
+ * @details
+ *
+ * Function : MacSchBsr
+ *
+ * Functionality:
+ * Processes DL BSR from MAC
+ *
+ * @params[in] Pst pst
+ * UlBufferStatusRptInd bsrInd
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint8_t MacSchBsr(Pst *pst, UlBufferStatusRptInd *bsrInd)
+{
+ Inst schInst = pst->dstInst-SCH_INST_START;
+ SchCellCb *cellCb = NULLP;
+ SchUeCb *ueCb = NULLP;
+ uint8_t lcgIdx;
+
+ DU_LOG("\nDEBUG --> SCH : Received BSR");
+ cellCb = schCb[schInst].cells[schInst];
+ ueCb = schGetUeCb(cellCb, bsrInd->crnti);
+
+ /* store dataVolume per lcg in uecb */
+ for(lcgIdx = 0; lcgIdx < bsrInd->numLcg; lcgIdx++)
+ {
+ ueCb->bsrInfo[lcgIdx].priority = 1; //TODO: determining LCG priority?
+ ueCb->bsrInfo[lcgIdx].dataVol = bsrInd->dataVolInfo[lcgIdx].dataVol;
+ }
return ROK;
}
+/*******************************************************************
+ *
+ * @brief Processes SR UCI indication from MAC
+ *
+ * @details
+ *
+ * Function : MacSchSrUciInd
+ *
+ * Functionality:
+ * Processes SR UCI indication from MAC
+ *
+ * @params[in] Post structure
+ * UCI Indication
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint8_t MacSchSrUciInd(Pst *pst, SrUciIndInfo *uciInd)
+{
+ Inst inst = pst->dstInst-SCH_INST_START;
+
+ SchUeCb *ueCb;
+ SchCellCb *cellCb = schCb[inst].cells[inst];
+
+ DU_LOG("\nDEBUG --> SCH : Received SR");
+
+ ueCb = schGetUeCb(cellCb, uciInd->crnti);
+
+ if(uciInd->numSrBits)
+ {
+ ueCb->srRcvd = true;
+ }
+ return ROK;
+}
/**********************************************************************
End of file
**********************************************************************/
Code Review / o-du / l2.git / blobdiff