PDSCH and PUSCH MCS Update [Issue-ID: ODUHIGH-261]

[o-du/l2.git] / src / 5gnrsch / sch.c

diff --git a/src/5gnrsch/sch.c b/src/5gnrsch/sch.c
index 5461bb4..1b1daed 100644 (file)
--- a/src/5gnrsch/sch.c
+++ b/src/5gnrsch/sch.c
@@ -48,7 +48,7 @@
 #include "sch.h"
 #include "sch_utils.h"
 
-extern SchCb schCb[SCH_MAX_INST];
+SchCb schCb[SCH_MAX_INST];
 void SchFillCfmPst(Pst *reqPst,Pst *cfmPst,RgMngmt *cfm);
 
 /* local defines */
@@ -113,7 +113,7 @@ uint8_t schActvInit(Ent entity, Inst instId, Region region, Reason reason)
  *     reason for success/failure of this function.
  *     
  *  @param[in]  RgCfg *cfg, the Configuaration information 
- *  @return  U16
+ *  @return  uint16_t
  *      -# LCM_REASON_NOT_APPL 
  *      -# LCM_REASON_INVALID_MSGTYPE
  *      -# LCM_REASON_MEM_NOAVAIL
@@ -130,8 +130,8 @@ uint8_t SchInstCfg(RgCfg *cfg, Inst  dInst)
       return LCM_REASON_INVALID_MSGTYPE;
    }
    /* Update the Pst structure for LM interface */
-   memcpy((uint8_t *)&schCb[inst].schInit.lmPst,
-        (uint8_t *)&cfg->s.schInstCfg.genCfg.lmPst,
+   memcpy(&schCb[inst].schInit.lmPst,
+        &cfg->s.schInstCfg.genCfg.lmPst,
         sizeof(Pst));
 
    schCb[inst].schInit.inst = inst;
@@ -151,9 +151,9 @@ uint8_t SchInstCfg(RgCfg *cfg, Inst  dInst)
    schCb[inst].genCfg.startCellId    = cfg->s.schInstCfg.genCfg.startCellId;
 #if 0
    /* Initialzie the timer queue */   
-   memset((uint8_t *)&schCb[inst].tmrTq, 0, sizeof(CmTqType)*RGSCH_TQ_SIZE);
+   memset(&schCb[inst].tmrTq, 0, sizeof(CmTqType)*RGSCH_TQ_SIZE);
    /* Initialize the timer control point */
-   memset((uint8_t *)&schCb[inst].tmrTqCp, 0, sizeof(CmTqCp));
+   memset(&schCb[inst].tmrTqCp, 0, sizeof(CmTqCp));
    schCb[inst].tmrTqCp.tmrLen = RGSCH_TQ_SIZE;
 
    /* SS_MT_TMR needs to be enabled as schActvTmr needs instance information */
@@ -193,8 +193,8 @@ uint8_t SchInstCfg(RgCfg *cfg, Inst  dInst)
  **/
 uint8_t SchProcGenCfgReq(Pst *pst, RgMngmt *cfg)
 {
-   uint8_t       ret = LCM_PRIM_OK;
-   uint16_t       reason = LCM_REASON_NOT_APPL;
+   uint8_t   ret = LCM_PRIM_OK;
+   uint16_t  reason = LCM_REASON_NOT_APPL;
    RgMngmt   cfm;
    Pst       cfmPst;
 
@@ -210,7 +210,7 @@ uint8_t SchProcGenCfgReq(Pst *pst, RgMngmt *cfg)
    memset(&cfmPst, 0 , sizeof(Pst));
    SchFillCfmPst(pst, &cfmPst, cfg);
 
-   memset((uint8_t *)&cfm, 0, sizeof(RgMngmt));
+   memset(&cfm, 0, sizeof(RgMngmt));
 
 #ifdef LMINT3
    cfm.hdr.transId =
@@ -264,7 +264,6 @@ uint8_t MacSchSlotInd(Pst *pst, SlotIndInfo *slotInd)
 {
    Inst  inst = pst->dstInst-SCH_INST_START;
 
-   /* Now call the TOM (Tfu ownership module) primitive to process further */
    schProcessSlotInd(slotInd, inst);
 
    return ROK;
@@ -463,7 +462,7 @@ void fillSchSib1Cfg(Inst schInst, SchSib1Cfg *sib1SchCfg, uint16_t pci, \
    sib1SchCfg->n0 = slotIndex;
 
    /* calculate the PRBs */
-   schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
+   freqDomRscAllocType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
 
    /* fill BWP */
    bwp->freqAlloc.numPrb   = MAX_NUM_RB; /* whole of BW */
@@ -682,7 +681,7 @@ uint8_t MacSchDlRlcBoInfo(Pst *pst, DlRlcBoInfo *dlBoInfo)
       (lcId >= MIN_DRB_LCID && lcId <= MAX_DRB_LCID))
    {
       SET_ONE_BIT(ueIdx, cell->boIndBitMap);
-      ueCb->dlLcCtxt[lcId].bo = dlBoInfo->dataVolume;
+      ueCb->dlInfo.dlLcCtxt[lcId].bo = dlBoInfo->dataVolume;
    }
    else if(lcId != SRB0_LCID)
    {