Bool hqPres
));
+PUBLIC void schFillCrntTime(
+ SlotIndInfo slotInd,
+ Inst schInst);
#ifdef CA_DBG
EXTERN U32 delayedApiCnt;
TRC2(rgSCHTomUtlMovePriNxtOccasion);
crntTime = (cell->crntTime.sfn * RGSCH_NUM_SUB_FRAMES_5G)
- +(cell->crntTime.subframe);
+ +(cell->crntTime.slot);
#ifdef XEON_SPECIFIC_CHANGES
RGSCHCPYTIMEINFO(cell->crntTime, ue->riRecpTime);
#endif
TRC2(rgSCHTomUtlMoveSrsNxtOccasion);
crntTime = (cell->crntTime.sfn * RGSCH_NUM_SUB_FRAMES_5G)
- +(cell->crntTime.subframe);
+ +(cell->crntTime.slot);
/* Compute Next Transmission Instance */
tempIdx = ue->srsCb.peri + ue->srsCb.nSrsTrIdx;
if (rawCqiInfo->numBits >= 5)
printf("cellId [%d] crnti [%d] numBits [%d] uciPayload [0x%08x] sfn/sf [%d:%d]\n",
cell->cellId, rawCqiInfo->crnti, rawCqiInfo->numBits, rawCqiInfo->uciPayload,
- rawCqiInd->timingInfo.sfn, rawCqiInd->timingInfo.subframe);
+ rawCqiInd->timingInfo.sfn, rawCqiInd->timingInfo.slot);
*/
if (rawCqiInfo->numBits == 1)
{
}
/*
printf("rawCqiInfo->numBits [%d] uciPayload [0x%08x] sfn/sf [%d:%d]\n", rawCqiInfo->numBits,
- rawCqiInfo->uciPayload, rawCqiInd->timingInfo.sfn, rawCqiInd->timingInfo.subframe);
+ rawCqiInfo->uciPayload, rawCqiInd->timingInfo.sfn, rawCqiInd->timingInfo.slot);
*/
}
else if (rawCqiInfo->numBits == 5)
}
else if (rawCqiInfo->numBits == 6)
{
- RgInfRlsHqInfo *rlsHqBufs = &(cell->rlsHqArr[cell->crntHqIdx]);
+ rlsHqBufs = &(cell->rlsHqArr[cell->crntHqIdx]);
TfuHqFdbk fdbk = TFU_HQFDB_NACK;
/* Process both HARQ and CQI-RI Ind*/
ri = (rawCqiInfo->uciPayload >> 26) & 0x1;
/*Removed the WA to drop 2nd CRC*/
RLOG_ARG2(L_ERROR,DBG_CELLID,cell->cellId,"Recieved CRC "
"twice per TTI @(%u,%u)", cell->crntTime.sfn,
- cell->crntTime.subframe);
+ cell->crntTime.slot);
}
lastCrc = crntCrc;
}
#ifdef LTE_TDD
/*ccpu00128820 - MOD - Msg3 alloc double delete issue*/
hqProc = &(raCb->msg3HqProc);
- RGSCH_UPD_PHICH(cell->ulDlCfgIdx, crcInd->timingInfo.subframe,
+ RGSCH_UPD_PHICH(cell->ulDlCfgIdx, crcInd->timingInfo.slot,
hqProc);
#endif
raCb = NULLP;
*
* Function: rgSCHTomTtiInd
*
- * Handler for processing TTI indication recieved from PHY
+ * Handler for processing slot indication recieved from MAC
* for a cell. This is split into the below Steps.
*
* 1: Complete the Uplink and Common Channel Scheduling for each Cell
* 4: Fill the Tfu structures for DL and UL Config requests
* 5: Handle the RGR Config messages per Cell
*
- * @param[in] TfuTtiIndInfo *ttiInd
+ * @param[in] SlotIndInfo *slotInd
* @param[in] Inst schInst
* @return Void
**/
#ifdef ANSI
PUBLIC Void rgSCHTomTtiInd
(
-TfuTtiIndInfo *ttiInd,
+SlotIndInfo *slotInd,
Inst schInst
)
#else
-PUBLIC Void rgSCHTomTtiInd(ttiInd, schInst)
-TfuTtiIndInfo *ttiInd;
+PUBLIC Void rgSCHTomTtiInd(slotInd, schInst)
+SlotIndInfo *slotInd;
Inst schInst;
#endif
{
glblTtiCnt++;
#endif
- rgSchTomFillCellTtiInfo(ttiInd, schInst, &nCell, &cell[0]);
+ //rgSchTomFillCellTtiInfo(slotInd, schInst, &nCell, &cell[0]);
+
+ schFillCrntTime(*slotInd,schInst);
for (i = 0; i < nCell; i++)
{
/* Perform UL and DL Common Channel scheduling */
/*ccpu00130768 */
if(cell->srsCfg.isSrsCfgPres &&
- rgSchTddCellSpSrsSubfrmTbl[cell->srsCfg.srsSubFrameCfg][recpReqInfo->timingInfo.subframe])
+ rgSchTddCellSpSrsSubfrmTbl[cell->srsCfg.srsSubFrameCfg][recpReqInfo->timingInfo.slot])
{
recpReqInfo->srsPres = TRUE;
}
cntrlInfo->dlTiming = cell->dlDciTime;
cntrlInfo->cellId = cell->cellId;
cntrlInfo->ulTiming = cell->hiDci0Time;
- if((0 == (cntrlInfo->dlTiming.sfn % 30)) && (0 == cntrlInfo->dlTiming.subframe))
+ if((0 == (cntrlInfo->dlTiming.sfn % 30)) && (0 == cntrlInfo->dlTiming.slot))
{
//printf("5GTF_CHECK rgSCHTomUtlProcDlSf Cntrl dl (%d : %d) ul (%d : %d)\n", cntrlInfo->dlTiming.sfn, cntrlInfo->dlTiming.subframe, cntrlInfo->ulTiming.sfn, cntrlInfo->ulTiming.subframe);
}
TRC2(rgSCHTomUtlFillDatRecpReq);
- if((0 == (recpReqInfo->timingInfo.sfn % 30)) && (0 == recpReqInfo->timingInfo.subframe))
+ if((0 == (recpReqInfo->timingInfo.sfn % 30)) && (0 == recpReqInfo->timingInfo.slot))
{
- //printf("5GTF_CHECK rgSCHTomUtlFillDatRecpReq (%d : %d)\n", recpReqInfo->timingInfo.sfn, recpReqInfo->timingInfo.subframe);
+ //printf("5GTF_CHECK rgSCHTomUtlFillDatRecpReq (%d : %d)\n", recpReqInfo->timingInfo.sfn, recpReqInfo->timingInfo.slot);
}
/* processing steps are
* - Run through the UL allocations going out in this subframe.
{
RGSCHDECRFRMCRNTTIME(cell->crntTime,dci0Time,(RGSCH_ULCTRL_RECP_DIST));
- idx = (dci0Time.sfn * RGSCH_NUM_SUB_FRAMES_5G + dci0Time.subframe)%
+ idx = (dci0Time.sfn * RGSCH_NUM_SUB_FRAMES_5G + dci0Time.slot)%
RGSCH_ULCTRL_RECP_DIST;
UNUSED(idx);
datRecpInfo->t.puschRecpReq.rcpInfo = TFU_PUSCH_DATA;
RgSchUePCqiCb *cqiCb;
#endif
{
- U16 tti = (crntTimInfo.sfn * RGSCH_NUM_SUB_FRAMES_5G + crntTimInfo.subframe);
+ U16 tti = (crntTimInfo.sfn * RGSCH_NUM_SUB_FRAMES_5G + crntTimInfo.slot);
U16 prdNum = tti/cqiCb->cqiPeri;
TRC2(rgSCHTomUtlPcqiSbCalcBpIdx);
/* Added support for period = 0 to disable tick to RRM */
if ((cell->rrmTtiIndPrd != 0) &&
((cell->crntTime.sfn % cell->rrmTtiIndPrd) == 0) &&
- (cell->crntTime.subframe == 0))
+ (cell->crntTime.slot == 0))
{
/* Allocate a TTI indication structure and send to RRM over RGR interface */
if (rgSCHUtlAllocSBuf (cell->instIdx,
RETVOID;
}
rgrTtiInd->cellId = cell->cellId;
- rgrTtiInd->hSfn = cell->crntTime.hSfn;
+ //rgrTtiInd->hSfn = cell->crntTime.hSfn;
rgrTtiInd->sfn = cell->crntTime.sfn;
if (rgSCHUtlRgrTtiInd (cell, rgrTtiInd) != ROK)
{
cell->stopDlSch = TRUE;
}
- if((0 == (cellInfo->timingInfo.sfn % 30)) && (0 == cellInfo->timingInfo.subframe))
+ if((0 == (cellInfo->timingInfo.sfn % 30)) && (0 == cellInfo->timingInfo.slot))
{
- //printf("5GTF_CHECK rgSCHTOMTtiInd (%d : %d)\n", cellInfo->timingInfo.sfn, cellInfo->timingInfo.subframe);
+ //printf("5GTF_CHECK rgSCHTOMTtiInd (%d : %d)\n", cellInfo->timingInfo.sfn, cellInfo->timingInfo.slot);
}
#ifndef EMTC_ENABLE
RGSCHCPYTIMEINFO(cellInfo->timingInfo, cell->crntTime);
cell->totalTime++;
#endif
#ifdef LTE_TDD
- U8 idx = (cell->crntTime.subframe + RG_SCH_CMN_DL_DELTA) %
+ U8 idx = (cell->crntTime.slot + RG_SCH_CMN_DL_DELTA) %
RGSCH_NUM_SUB_FRAMES_5G;
cell->isDlDataAllwd = RG_SCH_CMN_CHK_DL_DATA_ALLOWED(cell, idx);
/*ccpu00130639 -ADD - used in UL HARQ proc id calculation*/
- if((cell->crntTime.sfn == 0) && (cell->crntTime.subframe == 0))
+ if((cell->crntTime.sfn == 0) && (cell->crntTime.slot == 0))
{
/* sfn Cycle used for Tdd UL Harq Proc Determination.
This sfn Cycle will have values from 0 to numUl Harq-1. */
}
}
+void schFillCrntTime(
+ SlotIndInfo slotInd,
+ Inst schInst)
+{
+ U8 cellCount = 0;
+ for(cellCount = 0; cellCount < CM_LTE_MAX_CELLS; cellCount++)
+ {
+ RgSchCellCb *cell;
+ cell = rgSchCb[schInst].cells[cellCount];
+
+ RGSCHCPYTIMEINFO(slotInd, cell->crntTime);
+
+ RG_SCH_ADD_TO_CRNT_TIME(cell->crntTime, cell->hiDci0Time,
+ TFU_ULCNTRL_DLDELTA);
+ RG_SCH_ADD_TO_CRNT_TIME(cell->crntTime, cell->dlDciTime,
+ TFU_DLCNTRL_DLDELTA);
+ RG_SCH_ADD_TO_CRNT_TIME(cell->crntTime, cell->rcpReqTime,
+ TFU_RECPREQ_DLDELTA);
+ RGSCHDECRFRMCRNTTIME(cell->crntTime, cell->hqRlsTime,
+ TFU_HQFBKIND_ULDELTA);
+ RGSCHDECRFRMCRNTTIME(cell->crntTime, cell->dlSfRlsTime,
+ RGSCH_RLS_SF_IDX);
+
+ RGSCH_INCR_SUB_FRAME(cell->crntTime, RG_SCH_CMN_DL_DELTA);
+
+ RgSchCmnCell *cellSch = RG_SCH_CMN_GET_CELL(cell);
+ cellSch->dl.time = cell->crntTime;
+ }
+}
+
/** @brief This function prepares the TTI for scheduling and
* invokes the Common channel scheduler. Uplink scheduler
* is invoked first if UL Scheduling at CRC is not enabled