SLice Mapping to RLC DB [ Jira Id - ODUHIGH-371 ]

[o-du/l2.git] / src / 5gnrrlc / rlc_amm_ul.c

diff --git a/src/5gnrrlc/rlc_amm_ul.c b/src/5gnrrlc/rlc_amm_ul.c
index b77a4ca..dee5625 100755 (executable)
--- a/src/5gnrrlc/rlc_amm_ul.c
+++ b/src/5gnrrlc/rlc_amm_ul.c
@@ -1881,6 +1881,7 @@ Void rlcAmmFreeUlRbCb(RlcCb       *gCb,RlcUlRbCb   *rbCb)
       rlcStopTmr(gCb,(PTR)rbCb, EVENT_RLC_AMUL_STA_PROH_TMR);
    }
 
+   RLC_FREE(gCb,rbCb->snssai, sizeof (Snssai));
 
    /* on the first loop winSz is always greater than zero
     while( ( curSn < windSz ) hence changing to do while */