Initial commit for Bronze release

[o-du/l2.git] / src / 5gnrmac / rg_cl.h

diff --git a/src/5gnrmac/rg_cl.h b/src/5gnrmac/rg_cl.h
index 9368b2a..f1ec0cc 100644 (file)
--- a/src/5gnrmac/rg_cl.h
+++ b/src/5gnrmac/rg_cl.h
@@ -22,14 +22,36 @@
 
 #define MAX_NUM_CELL_SUPP 1
 
+#include "envdep.h"
+#include "gen.h"
+#include "ssi.h"
+#include "cm_hash.h"
+
+#include "gen.x"
+#include "ssi.x"
+#include "cm_hash.x"
+#include "cm_lib.x"
+#include "lcl.h"
+
 typedef enum
 {
    PHY_STATE_IDLE,
    PHY_STATE_CONFIGURED,
    PHY_STATE_RUNNING,
-   PHY_STATE_INVALID
+   MAX_STATE   
 }PhyState;
 
+/* Events in Lower Mac */
+typedef enum{
+  PARAM_REQ,
+  PARAM_RSP,
+  CONFIG_REQ,
+  CONFIG_RSP,
+  START_REQ,
+  STOP_REQ,
+  MAX_EVENT
+}EventState;
+
 typedef struct clCb
 {
    Region          region;
@@ -38,6 +60,7 @@ typedef struct clCb
    CmHashListCp    cellCbLst;   /* List of Cells configured */
    U8              numOfCells;  /* Number of Cells configured */
    PhyState        phyState;    /* State of PHY */
+   EventState      event;       /* State of Event */
 }ClCb;
 
 typedef struct cellCb
@@ -47,6 +70,203 @@ typedef struct cellCb
    PhyState    phyState;
 }ClCellCb;
 
+typedef enum
+{
+   RELEASE_15
+}ReleaseCapab;
+
+typedef enum
+{
+   NOT_SUPPORTED,
+   SUPPORTED
+}ParamSupport;
+
+typedef enum
+{
+   NORMAL_CYCLIC_PREFIX_MASK,
+   EXTENDED_CYCLIC_PREFIX_MASK
+}CyclicPrefix;
+
+typedef enum 
+{
+   SPACING_15_KHZ,
+   SPACING_30_KHZ,
+   SPACING_60_KHZ,
+   SPACING_120_KHZ
+}SubCarrierSpacing;
+
+typedef enum 
+{
+   BW_5MHZ,
+   BW_10MHZ,
+   BW_15MHZ,
+   BW_20MHZ,
+   BW_40MHZ,
+   BW_50MHZ,
+   BW_60MHZ,
+   BW_70MHZ,
+   BW_80MHZ,
+   BW_90MHZ,
+   BW_100MHZ,
+   BW_200MHZ,
+   BW_400MHZ
+}SupportedBandwidth;
+
+typedef enum
+{
+   CCE_MAPPING_INTERLEAVED_MASK,
+   CCE_MAPPING_NONINTERLVD_MASK
+}CCEMappingType;
+
+typedef enum
+{
+   FORMAT_0,
+   FORMAT_1,
+   FORMAT_2,
+   FORMAT_3,
+   FORMAT_4
+}Formats;
+
+typedef enum
+{
+   MAPPING_TYPE_A,        
+   MAPPING_TYPE_B,
+}MappingType;
+
+typedef enum
+{
+   ALLOCATION_TYPE_0,            
+   ALLOCATION_TYPE_1,
+}AllocationType;
+
+typedef enum
+{
+   VRB_TO_PRB_MAP_NON_INTLV,
+   VRB_TO_PRB_MAP_INTLVD
+}VrbToPrbMap;
+
+typedef enum
+{  
+   DMRS_CONFIG_TYPE_1,     
+   DMRS_CONFIG_TYPE_2
+}DmrsConfigType;
+
+typedef enum
+{  
+   DMRS_MAX_LENGTH_1,     
+   DMRS_MAX_LENGTH_2
+}DmrMaxLen;
+
+typedef enum
+{
+   DMRS_ADDITIONAL_POS_0,         
+   DMRS_ADDITIONAL_POS_1,         
+   DMRS_ADDITIONAL_POS_2,         
+   DMRS_ADDITIONAL_POS_3        
+}DmrsPos;
+
+typedef enum
+{
+   MOD_QPSK,
+   MOD_16QAM,
+   MOD_64QAM,
+   MOD_256QAM
+}ModulationOrder;
+
+typedef enum 
+{
+   AGG_FACTOR_1,
+   AGG_FACTOR_2,
+   AGG_FACTOR_4,
+   AGG_FACTOR_8
+}AggregationFactor;
+
+typedef enum
+{
+   SF_FORMAT_A1,
+   SF_FORMAT_A2,
+   SF_FORMAT_A3,
+   SF_FORMAT_B1,
+   SF_FORMAT_B2,
+   SF_FORMAT_B3,
+   SF_FORMAT_B4,
+   SF_FORMAT_C0,
+   SF_FORMAT_C2
+}ShortFormat;
+
+typedef enum 
+{
+   PRACH_FD_OCC_IN_A_SLOT_1   = 1,
+   PRACH_FD_OCC_IN_A_SLOT_2   = 2,
+   PRACH_FD_OCC_IN_A_SLOT_4   = 4,
+   PRACH_FD_OCC_IN_A_SLOT_8   = 8
+}FdOccPerSlot;
+
+typedef enum
+{
+   RSSI_REPORT_DBM,
+   RSSI_REPORT_DBFS
+}RssiMeasurement;
+
+typedef struct clCellParam
+{   
+   ReleaseCapab          releaseCapability;                    /* Release Capability */  
+   PhyState              ParamPhystate;
+   ParamSupport          skipBlankDlConfig;
+   ParamSupport          skipBlankUlConfig;
+   ParamSupport          numTlvsToReport;
+   CyclicPrefix          cyclicPrefix;                
+   SubCarrierSpacing     supportedSubcarrierSpacingDl;
+   SupportedBandwidth    supportedBandwidthDl;         
+   SubCarrierSpacing     supportedSubcarrierSpacingsUl;
+   SupportedBandwidth    supportedBandwidthUl;
+   CCEMappingType        cceMappingType;
+   ParamSupport          coresetOutsideFirst3OfdmSymsOfSlot;
+   ParamSupport          precoderGranularityCoreset;
+   ParamSupport          pdcchMuMimo;
+   ParamSupport          pdcchPrecoderCycling;
+   U8                    maxPdcchsPerSlot;
+   Formats               pucchFormats;
+   U8                    maxPucchsPerSlot;   
+   MappingType           pdschMappingType;
+   AllocationType        pdschAllocationTypes;
+   VrbToPrbMap           pdschVrbToPrbMapping;
+   ParamSupport          pdschCbg;
+   DmrsConfigType        pdschDmrsConfigTypes;
+   DmrMaxLen             pdschDmrsMaxLength;
+   DmrsPos               pdschDmrsAdditionalPos;
+   U8                    maxPdschsTBsPerSlot;
+   U8                    maxNumberMimoLayersPdsch;
+   ModulationOrder       supportedMaxModulationOrderDl;
+   U8                    maxMuMimoUsersDl;
+   ParamSupport          pdschDataInDmrsSymbols;
+   ParamSupport          premptionSupport;
+   ParamSupport          pdschNonSlotSupport;
+   ParamSupport          uciMuxUlschInPusch;
+   ParamSupport          uciOnlyPusch;
+   ParamSupport          puschFrequencyHopping;
+   DmrsConfigType        puschDmrsConfigTypes;
+   DmrMaxLen             puschDmrsMaxLength;
+   DmrsPos               puschDmrsAdditionalPos;
+   ParamSupport          puschCbg;
+   MappingType           puschMappingType;
+   AllocationType        puschAllocationTypes;
+   VrbToPrbMap           puschVrbToPrbMapping;
+   U8                    puschMaxPtrsPorts;
+   U8                    maxPduschsTBsPerSlot;
+   U8                    maxNumberMimoLayersNonCbPusch;
+   ModulationOrder       supportedModulationOrderUl;
+   U8                    maxMuMimoUsersUl;
+   ParamSupport          dftsOfdmSupport;
+   AggregationFactor     puschAggregationFactor;
+   Formats                prachLongFormats;
+   ShortFormat           prachShortFormats;
+   ParamSupport          prachRestrictedSets;
+   FdOccPerSlot          maxPrachFdOccasionsInASlot;
+   RssiMeasurement       rssiMeasurementSupport;
+}ClCellParam;
+
+
 EXTERN ClCb clGlobalCp; 
 EXTERN ClCellCb * rgClUtlGetCellCb ARGS((U16 cellId));