#define PDU_PRESENT 1
#define SET_MSG_LEN(x, size) x += size
-extern void fapiMacConfigRsp(uint16_t cellId);
-extern uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
+void fapiMacConfigRsp(uint16_t cellId);
+uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
/* Global variables */
uint8_t slotIndIdx;
* @return void
*
* ****************************************************************/
-PUBLIC void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
+void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
{
memset(hdr, 0, sizeof(fapi_msg_t));
hdr->msg_id = msgType;
* @return void
*
* ****************************************************************/
-PUBLIC void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
+void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
uint16_t value, uint32_t *msgLen)
{
tlv->tl.tag = tag;
* @return void
*
********************************************************************/
-PUBLIC void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
+void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
+void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
+void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
{
if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
+void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
+void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
{
if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
+void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
{
if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
+void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
+void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
{
*
* ****************************************************************/
-PUBLIC void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
+void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
{
* @return void
*
******************************************************************/
-PUBLIC void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
+void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
{
*
******************************************************************/
-PUBLIC void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
+void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
{
* @return void
*
******************************************************************/
-PUBLIC void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
+void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
{
if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
{
*
******************************************************************/
-PUBLIC void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
+void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
{
* @return void
*
******************************************************************/
-PUBLIC void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
+void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
{
if(value == 0 )
{
*
******************************************************************/
-PUBLIC void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
+void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
{
*
******************************************************************/
-PUBLIC void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
+void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
{
if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
{
*
******************************************************************/
-PUBLIC void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
+void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
{
*
******************************************************************/
-PUBLIC void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
+void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
{
*
******************************************************************/
-PUBLIC void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
+void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
{
*
******************************************************************/
-PUBLIC void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
+void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
{
*
******************************************************************/
-PUBLIC void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
+void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
{
if(value == 0)
{
*
******************************************************************/
-PUBLIC void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
+void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
{
*
******************************************************************/
-PUBLIC void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
+void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
{
*
******************************************************************/
-PUBLIC void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
+void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
{
*
******************************************************************/
-PUBLIC void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
+void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
{
if(value == 0)
{
*
******************************************************************/
-PUBLIC void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
+void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
{
if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
{
uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
{
- //uint16_t valueLen;
void *posPtr;
- //valueLen = tlv->tl.length;
posPtr = &tlv->tl.tag;
posPtr += sizeof(tlv->tl.tag);
posPtr += sizeof(tlv->tl.length);
/*TO DO: malloc to SSI memory */
if(type == FAPI_UINT_8)
{
- //temp = (uint8_t *)malloc(valueLen * sizeof(U8));
- //memcpy(temp, posPtr, valueLen);
return(*(uint8_t *)posPtr);
}
else if(type == FAPI_UINT_16)
uint8_t lwr_mac_procConfigReqEvt(void *msg)
{
#ifdef INTEL_FAPI
- uint8_t idx = 0;
- uint8_t index = 0;
- uint16_t *cellId;
- uint16_t cellIdx;
- uint32_t msgLen = 0;
- MacCellCfg macCfgParams;
+ uint8_t idx = 0;
+ uint8_t index = 0;
+ uint16_t *cellId;
+ uint16_t cellIdx;
+ uint32_t msgLen = 0;
+ MacCellCfg macCfgParams;
fapi_config_req_t *configReq;
DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
* pointer to modified value
******************************************************************/
-PUBLIC void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
+void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
{
*mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
*val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
* RBLen = length of contiguously allocted RBs
* Spec 38.214 Sec 5.1.2.2.2
*/
- coreset0Size= sib1PdcchInfo->coreset0Cfg.coreSet0Size;
+ coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
rbStart = 0; /* For SIB1 */
//rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
*/
/* TODO: Fill values of coreset0Size, rbStart and rbLen */
- coreset0Size= rarPdcchInfo->coreset0Cfg.coreSet0Size;
+ coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
rbStart = 0; /* For SIB1 */
//rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
/*******************************************************************
*
- * @brief fills msg4 Dl DCI PDU required for DL TTI info in MAC
+ * @brief fills DL DCI PDU required for DL TTI info in MAC
*
* @details
*
- * Function : fillMsg4DlDciPdu
+ * Function : fillDlMsgDlDciPdu
*
* Functionality:
- * -Fills the Msg4 Dl DCI PDU
+ * -Fills the Dl DCI PDU
*
* @params[in] Pointer to fapi_dl_dci_t
* Pointer to PdcchCfg
* @return ROK
*
******************************************************************/
-void fillMsg4DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *msg4PdcchInfo,\
- Msg4Info *msg4Info)
+void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
+ DlMsgInfo *dlMsgInfo)
{
if(dlDciPtr != NULLP)
{
uint8_t bytePos;
uint8_t bitPos;
- uint16_t coreset0Size = 0;
+ uint16_t coresetSize = 0;
uint16_t rbStart = 0;
uint16_t rbLen = 0;
uint8_t dciFormatId;
/* Size(in bits) of each field in DCI format 1_0 */
uint8_t dciFormatIdSize = 1;
- uint8_t freqDomResAssignSize;
+ uint8_t freqDomResAssignSize = 0;
uint8_t timeDomResAssignSize = 4;
uint8_t VRB2PRBMapSize = 1;
uint8_t modNCodSchemeSize = 5;
uint8_t pucchResoIndSize = 3;
uint8_t harqFeedbackIndSize = 3;
- dlDciPtr->rnti = msg4PdcchInfo->dci.rnti;
- dlDciPtr->scramblingId = msg4PdcchInfo->dci.scramblingId;
- dlDciPtr->scramblingRnti = msg4PdcchInfo->dci.scramblingRnti;
- dlDciPtr->cceIndex = msg4PdcchInfo->dci.cceIndex;
- dlDciPtr->aggregationLevel = msg4PdcchInfo->dci.aggregLevel;
- dlDciPtr->pc_and_bform.numPrgs = msg4PdcchInfo->dci.beamPdcchInfo.numPrgs;
- dlDciPtr->pc_and_bform.prgSize = msg4PdcchInfo->dci.beamPdcchInfo.prgSize;
- dlDciPtr->pc_and_bform.digBfInterfaces = msg4PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
- dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = msg4PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
- dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = msg4PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = msg4PdcchInfo->dci.txPdcchPower.powerValue;
- dlDciPtr->powerControlOfssetSS = msg4PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+ dlDciPtr->rnti = pdcchInfo->dci.rnti;
+ dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
+ dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
+ dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
+ dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
+ dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
+ dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
+ dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->powerControlOfssetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* coreset0Size = Size of coreset 0
* RBLen = length of contiguously allocted RBs
* Spec 38.214 Sec 5.1.2.2.2
*/
+ coresetSize = pdcchInfo->coresetCfg.coreSetSize;
+ rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
+ rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
- /* TODO: Fill values of coreset0Size, rbStart and rbLen */
- coreset0Size = msg4PdcchInfo->coreset0Cfg.coreSet0Size;
- //rbStart = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
- rbLen = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
-
- if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
+ if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
{
- if((rbLen - 1) <= floor(coreset0Size / 2))
- freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
- else
- freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
- + (coreset0Size - 1 - rbStart);
+ if((rbLen - 1) <= floor(coresetSize / 2))
+ freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
+ + (coresetSize - 1 - rbStart);
- freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
+ freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
}
/* Fetching DCI field values */
- dciFormatId = msg4Info->dciFormatId; /* DCI indentifier for DL */
- timeDomResAssign = msg4PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
- VRB2PRBMap = msg4PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
- modNCodScheme = msg4PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
- ndi = msg4Info->ndi;
- redundancyVer = msg4PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
- harqProcessNum = msg4Info->harqProcNum;
- dlAssignmentIdx = msg4Info->dlAssignIdx;
- pucchTpc = msg4Info->pucchTpc;
- pucchResoInd = msg4Info->pucchResInd;
- harqFeedbackInd = msg4Info->harqFeedbackInd;
+ dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
+ timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
+ modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
+ ndi = dlMsgInfo->ndi;
+ redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
+ harqProcessNum = dlMsgInfo->harqProcNum;
+ dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
+ pucchTpc = dlMsgInfo->pucchTpc;
+ pucchResoInd = dlMsgInfo->pucchResInd;
+ harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
/* Reversing bits in each DCI field */
dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
/* Calulating total number of bytes in buffer */
dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
- + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
- + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
- + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
+ + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
+ + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
+ + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
numBytes = dlDciPtr->payloadSizeBits / 8;
if(dlDciPtr->payloadSizeBits % 8)
- numBytes += 1;
+ numBytes += 1;
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
{
- DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
- return;
+ DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
+ return;
}
/* Initialize buffer */
for(bytePos = 0; bytePos < numBytes; bytePos++)
- dlDciPtr->payload[bytePos] = 0;
+ dlDciPtr->payload[bytePos] = 0;
bytePos = numBytes - 1;
bitPos = 0;
/* Packing DCI format fields */
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- dciFormatId, dciFormatIdSize);
+ dciFormatId, dciFormatIdSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- freqDomResAssign, freqDomResAssignSize);
+ freqDomResAssign, freqDomResAssignSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- timeDomResAssign, timeDomResAssignSize);
+ timeDomResAssign, timeDomResAssignSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- VRB2PRBMap, VRB2PRBMapSize);
+ VRB2PRBMap, VRB2PRBMapSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- modNCodScheme, modNCodSchemeSize);
+ modNCodScheme, modNCodSchemeSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- ndi, ndiSize);
+ ndi, ndiSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- redundancyVer, redundancyVerSize);
+ redundancyVer, redundancyVerSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- redundancyVer, redundancyVerSize);
+ redundancyVer, redundancyVerSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- harqProcessNum, harqProcessNumSize);
+ harqProcessNum, harqProcessNumSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- dlAssignmentIdx, dlAssignmentIdxSize);
+ dlAssignmentIdx, dlAssignmentIdxSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- pucchTpc, pucchTpcSize);
+ pucchTpc, pucchTpcSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- pucchResoInd, pucchResoIndSize);
+ pucchResoInd, pucchResoIndSize);
fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- harqFeedbackInd, harqFeedbackIndSize);
+ harqFeedbackInd, harqFeedbackIndSize);
}
-} /* fillMsg4DlDciPdu */
+}
/*******************************************************************
*
bwp = &dlInfo->rarAlloc->bwp;
fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
}
- else if(rntiType == TC_RNTI_TYPE)
+ else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
{
- pdcchInfo = &dlInfo->msg4Alloc->msg4PdcchCfg;
- bwp = &dlInfo->msg4Alloc->bwp;
- fillMsg4DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
- &dlInfo->msg4Alloc->msg4Info);
+ pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
+ bwp = &dlInfo->dlMsgAlloc->bwp;
+ fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
+ &dlInfo->dlMsgAlloc->dlMsgInfo);
}
else
{
DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
- return RFAILED;;
+ return RFAILED;
}
dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
- dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coreset0Cfg.startSymbolIndex;
- dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coreset0Cfg.durationSymbols;
- memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coreset0Cfg.freqDomainResource, 6);
- dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coreset0Cfg.cceRegMappingType;
- dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coreset0Cfg.regBundleSize;
- dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coreset0Cfg.interleaverSize;
- dlTtiReqPdu->pdu.pdcch_pdu.coreSetSize = pdcchInfo->coreset0Cfg.coreSetType;
- dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coreset0Cfg.shiftIndex;
- dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coreset0Cfg.precoderGranularity;
+ dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
+ dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
+ memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
+ dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
+ dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
+ dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
+ dlTtiReqPdu->pdu.pdcch_pdu.coreSetSize = pdcchInfo->coresetCfg.coreSetType;
+ dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
+ dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
/* PDCCH and PDSCH PDU is filled */
count += 2;
}
- if(dlInfo->msg4Alloc != NULLP)
+ if(dlInfo->dlMsgAlloc != NULLP)
{
/* PDCCH and PDSCH PDU is filled */
count += 2;
}
-
return count;
}
{
count++;
}
- if(dlInfo->msg4Alloc != NULLP)
+ if(dlInfo->dlMsgAlloc != NULLP)
{
count++;
}
-
return count;
}
/***********************************************************************
/***********************************************************************
*
- * @brief fills the Msg4 TX-DATA request message
+ * @brief fills the DL dedicated Msg TX-DATA request message
*
* @details
*
- * Function : fillMsg4TxDataReq
+ * Function : fillDlMsgTxDataReq
*
* Functionality:
- * - fills the Msg4 TX-DATA request message
+ * - fills the Dl Dedicated Msg TX-DATA request message
*
* @params[in] fapi_tx_pdu_desc_t *pduDesc
- * @params[in] Msg4Info *msg4Info
+ * @params[in] DlMsgInfo *dlMsgInfo
* @params[in] uint32_t *msgLen
* @params[in] uint16_t pduIndex
* @return ROK
*
* ********************************************************************/
-uint8_t fillMsg4TxDataReq(fapi_tx_pdu_desc_t *pduDesc, Msg4Info *msg4Info,
+uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo,
uint16_t pduIndex)
{
uint32_t pduLen = 0;
- uint8_t *msg4TxDataValue = NULLP;
+ uint8_t *dedMsgTxDataValue = NULLP;
pduDesc[pduIndex].pdu_index = pduIndex;
pduDesc[pduIndex].num_tlvs = 1;
/* fill the TLV */
/* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
- pduDesc[pduIndex].tlvs[0].tl.length = msg4Info->msg4PduLen;
- LWR_MAC_ALLOC(msg4TxDataValue, msg4Info->msg4PduLen);
- if(msg4TxDataValue == NULLP)
+ pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen;
+ LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
+ if(dedMsgTxDataValue == NULLP)
{
return RFAILED;
}
- memcpy(msg4TxDataValue, msg4Info->msg4Pdu, msg4Info->msg4PduLen);
- pduDesc[pduIndex].tlvs[0].value = msg4TxDataValue;
+ memcpy(dedMsgTxDataValue, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
+ pduDesc[pduIndex].tlvs[0].value = dedMsgTxDataValue;
/* The total length of the PDU description and PDU data */
pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
- pduDesc[pduIndex].pdu_length = pduLen;
+ pduDesc[pduIndex].pdu_length = pduLen;
/* TODO: The pointer value which was stored, needs to be free-ed at PHY *
* But since we did not implement WLS, this has to be done here
*/
-#ifndef INTEL_WLS
- MAC_FREE(msg4TxDataValue, msg4Info->msg4PduLen);
+#ifndef INTEL_WLS
+ MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
#endif
return ROK;
}
+
#endif /* FAPI */
/*******************************************************************
*
numPduEncoded++;
}
printf("\033[1;34m");
- DU_LOG("\nLWR_MAC: SIB1 sent...");
+ DU_LOG("\nLWR_MAC: SIB1 sent...");
printf("\033[0m");
}
}
DU_LOG("\nLWR_MAC: RAR sent...");
printf("\033[0m");
}
- if(currDlSlot->dlInfo.msg4Alloc != NULLP)
+ if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
{
- /* Filling Msg4 param */
- rntiType = TC_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
- &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
- numPduEncoded++;
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
- &currDlSlot->dlInfo.msg4Alloc->msg4PdschCfg,
- currDlSlot->dlInfo.msg4Alloc->bwp,
- pduIndex);
- numPduEncoded++;
- pduIndex++;
+ if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
+ {
+ /* Filling Msg4 param */
+ printf("\033[1;32m");
+ if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
+ {
+ rntiType = TC_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
+ &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
+ DU_LOG("\nLWR_MAC: MSG4 sent...");
+ }
+ else
+ {
+ /* Filling other DL msg params */
+ rntiType = C_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
+ &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
+ DU_LOG("\nLWR_MAC: DL MSG sent...");
+ }
+ printf("\033[0m");
- printf("\033[1;32m");
- DU_LOG("\nLWR_MAC: MSG4 sent...");
- printf("\033[0m");
+ numPduEncoded++;
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
+ &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
+ currDlSlot->dlInfo.dlMsgAlloc->bwp,
+ pduIndex);
+ numPduEncoded++;
+ pduIndex++;
+ }
+ else
+ {
+ MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
+ currDlSlot->dlInfo.dlMsgAlloc = NULLP;
+ }
}
+
msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nLWR_MAC: Sending DL TTI Request");
+#endif
LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), \
(void *)dlTtiReq);
{
msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nLWR_MAC: Sending DL TTI Request");
+#endif
LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), (void *)dlTtiReq);
}
memset(currDlSlot, 0, sizeof(MacDlSlot));
{
txDataReqMsgSize += dlInfo->rarAlloc->rarInfo.rarPduLen;
}
- if(dlInfo->msg4Alloc != NULLP)
+ if(dlInfo->dlMsgAlloc != NULLP)
{
- txDataReqMsgSize += dlInfo->msg4Alloc->msg4Info.msg4PduLen;
+ txDataReqMsgSize += dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen;
}
LWR_MAC_ALLOC(txDataReq, txDataReqMsgSize);
MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
dlInfo->rarAlloc = NULLP;
}
- if(dlInfo->msg4Alloc != NULLP && dlInfo->msg4Alloc->msg4Info.msg4Pdu != NULLP)
+ if(dlInfo->dlMsgAlloc != NULLP)
{
- fillMsg4TxDataReq(txDataReq->pdu_desc, &dlInfo->msg4Alloc->\
- msg4Info, pduIndex);
- pduIndex++;
- txDataReq->num_pdus++;
-
- MAC_FREE(dlInfo->msg4Alloc->msg4Info.msg4Pdu,\
- dlInfo->msg4Alloc->msg4Info.msg4PduLen);
- dlInfo->msg4Alloc->msg4Info.msg4Pdu = NULLP;
- MAC_FREE(dlInfo->msg4Alloc,sizeof(Msg4Alloc));
- dlInfo->msg4Alloc = NULLP;
+ fillDlMsgTxDataReq(txDataReq->pdu_desc, \
+ &dlInfo->dlMsgAlloc->dlMsgInfo, pduIndex);
+ pduIndex++;
+ txDataReq->num_pdus++;
+
+ MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
+ dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
+ dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
+ MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
+ dlInfo->dlMsgAlloc = NULLP;
}
+
msgLen = txDataReqMsgSize - sizeof(fapi_msg_t);
fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, msgLen);
+ DU_LOG("\nLWR_MAC: Sending TX DATA Request");
LwrMacSendToPhy(txDataReq->header.msg_id, txDataReqMsgSize, \
(void *)txDataReq);
}
}
msgLen = sizeof(fapi_ul_tti_req_t) - sizeof(fapi_msg_t);
fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, msgLen);
-
- DU_LOG("\nLWR_MAC: Sending UL TTI Request");
+#ifdef ODU_SLOT_IND_DEBUG_LOG
+ DU_LOG("\nLWR_MAC: Sending UL TTI Request");
+#endif
LwrMacSendToPhy(ulTtiReq->header.msg_id, msgSize, (void *)ulTtiReq);
memset(currUlSlot, 0, sizeof(MacUlSlot));
return ROK;
}
+#ifdef INTEL_FAPI
+/*******************************************************************
+ *
+ * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
+ *
+ * @details
+ *
+ * Function : fillUlDciPdu
+ *
+ * Functionality:
+ * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
+ *
+ * @params[in] Pointer to fapi_dl_dci_t
+ * Pointer to DciInfo
+ * @return ROK
+ *
+ ******************************************************************/
+void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
+{
+ if(ulDciPtr != NULLP)
+ {
+ uint8_t numBytes;
+ uint8_t bytePos;
+ uint8_t bitPos;
+
+ uint8_t coreset1Size = 0;
+ uint16_t rbStart = 0;
+ uint16_t rbLen = 0;
+ uint8_t dciFormatId = 0;
+ uint32_t freqDomResAssign;
+ uint8_t timeDomResAssign;
+ uint8_t freqHopFlag;
+ uint8_t modNCodScheme;
+ uint8_t ndi;
+ uint8_t redundancyVer = 0;
+ uint8_t harqProcessNum = 0;
+ uint8_t puschTpc = 0;
+ uint8_t ul_SlInd = 0;
+
+ /* Size(in bits) of each field in DCI format 0_0 */
+ uint8_t dciFormatIdSize = 1;
+ uint8_t freqDomResAssignSize = 0;
+ uint8_t timeDomResAssignSize = 4;
+ uint8_t freqHopFlagSize = 1;
+ uint8_t modNCodSchemeSize = 5;
+ uint8_t ndiSize = 1;
+ uint8_t redundancyVerSize = 2;
+ uint8_t harqProcessNumSize = 4;
+ uint8_t puschTpcSize = 2;
+ uint8_t ul_SlIndSize = 1;
+
+ ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
+ ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
+ ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
+ ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
+ ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
+ ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
+ ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
+ ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
+ ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
+ ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
+ ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
+ ulDciPtr->powerControlOfssetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset1Size = Size of coreset 1
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+ if(schDciInfo->formatType == FORMAT0_0)
+ {
+ coreset1Size = schDciInfo->coresetCfg.coreSetSize;
+ rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
+ rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
+
+ if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
+ {
+ if((rbLen - 1) <= floor(coreset1Size / 2))
+ freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
+ + (coreset1Size - 1 - rbStart);
+
+ freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
+ }
+ /* Fetching DCI field values */
+ dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
+ timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
+ freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
+ modNCodScheme = schDciInfo->format.format0_0.mcs;
+ ndi = schDciInfo->format.format0_0.ndi;
+ redundancyVer = schDciInfo->format.format0_0.rv;
+ harqProcessNum = schDciInfo->format.format0_0.harqProcId;
+ puschTpc = schDciInfo->format.format0_0.tpcCmd;
+ ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
+
+ /* Reversing bits in each DCI field */
+ dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
+ freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
+ redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
+ harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
+ puschTpc = reverseBits(puschTpc, puschTpcSize);
+ ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
+ }
+ /* Calulating total number of bytes in buffer */
+ ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
+ + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
+ + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
+
+ numBytes = ulDciPtr->payloadSizeBits / 8;
+ if(ulDciPtr->payloadSizeBits % 8)
+ numBytes += 1;
+
+ if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
+ {
+ DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
+ return;
+ }
+
+ /* Initialize buffer */
+ for(bytePos = 0; bytePos < numBytes; bytePos++)
+ ulDciPtr->payload[bytePos] = 0;
+
+ bytePos = numBytes - 1;
+ bitPos = 0;
+
+ /* Packing DCI format fields */
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ dciFormatId, dciFormatIdSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ freqDomResAssign, freqDomResAssignSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ timeDomResAssign, timeDomResAssignSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ freqHopFlag, freqHopFlagSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ modNCodScheme, modNCodSchemeSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ ndi, ndiSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ redundancyVer, redundancyVerSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ harqProcessNum, harqProcessNumSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ puschTpc, puschTpcSize);
+ fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
+ ul_SlInd, ul_SlIndSize);
+ }
+} /* fillUlDciPdu */
+
+/*******************************************************************
+ *
+ * @brief fills PDCCH PDU required for UL DCI REQ to PHY
+ *
+ * @details
+ *
+ * Function : fillUlDciPdcchPdu
+ *
+ * Functionality:
+ * -Fills the Pdcch PDU info
+ *
+ * @params[in] Pointer to FAPI DL TTI Req
+ * Pointer to PdcchCfg
+ * @return ROK
+ *
+ ******************************************************************/
+uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
+{
+ if(ulDciReqPdu != NULLP)
+ {
+ memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
+ fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
+ ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
+ ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
+ ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
+ ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
+ ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
+ ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
+ ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
+ memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
+ ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
+ ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
+ ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
+ ulDciReqPdu->pdcchPduConfig.coreSetSize = dlInfo->ulGrant->coresetCfg.coreSetType;
+ ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
+ ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
+ ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
+ ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
+
+ /* Calculating PDU length. Considering only one Ul dci pdu for now */
+ ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
+ }
+ return ROK;
+}
+#endif
+/*******************************************************************
+ *
+ * @brief Sends UL DCI Request to PHY
+ *
+ * @details
+ *
+ * Function : fillUlDciReq
+ *
+ * Functionality:
+ * -Sends FAPI Ul Dci req to PHY
+ *
+ * @params[in] Pointer to CmLteTimingInfo
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ ******************************************************************/
+uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
+{
+#ifdef INTEL_FAPI
+ uint8_t cellIdx;
+ uint8_t numPduEncoded = 0;
+ uint32_t msgLen = 0;
+ uint32_t msgSize = 0;
+
+ fapi_ul_dci_req_t *ulDciReq = NULLP;
+ SlotIndInfo ulDciReqTimingInfo;
+
+ MacDlSlot *currDlSlot = NULLP;
+
+ if(lwrMacCb.phyState == PHY_STATE_RUNNING)
+ {
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
+ currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
+
+ if(currDlSlot->dlInfo.ulGrant != NULLP)
+ {
+ msgSize = sizeof(fapi_ul_dci_req_t);
+ LWR_MAC_ALLOC(ulDciReq, msgSize);
+ if(ulDciReq != NULLP)
+ {
+ memset(ulDciReq, 0, msgSize);
+ ulDciReq->sfn = ulDciReqTimingInfo.sfn;
+ ulDciReq->slot = ulDciReqTimingInfo.slot;
+ ulDciReq->numPdus = 1; // No. of PDCCH PDUs
+ if(ulDciReq->numPdus > 0)
+ {
+ /* Fill PDCCH configuration Pdu */
+ fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
+ numPduEncoded++;
+ /* free UL GRANT at SCH */
+ MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
+ currDlSlot->dlInfo.ulGrant = NULLP;
+ /* send UL DCI to PHY */
+ msgLen = sizeof(fapi_ul_dci_req_t) - sizeof(fapi_msg_t);
+ fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, msgLen);
+ LwrMacSendToPhy(ulDciReq->header.msg_id, sizeof(fapi_ul_dci_req_t), (void *)ulDciReq);
+ }
+
+ }
+ else
+ {
+ DU_LOG("\nLWR_MAC: Failed to allocate memory for UL DCI Request");
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return RFAILED;
+ }
+ }
+ }
+ else
+ {
+ lwr_mac_procInvalidEvt(&currTimingInfo);
+ }
+#endif
+ return ROK;
+}
+
lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
{
{