DCI format encoding in PDCCH PDU

[o-du/l2.git] / src / 5gnrmac / lwr_mac_fsm.c

diff --git a/src/5gnrmac/lwr_mac_fsm.c b/src/5gnrmac/lwr_mac_fsm.c
index fdc7e3c..abb4340 100644 (file)
--- a/src/5gnrmac/lwr_mac_fsm.c
+++ b/src/5gnrmac/lwr_mac_fsm.c
@@ -2138,6 +2138,31 @@ void fillDlDciPdu(fapi_dl_dci_t *dlDciPtr, Sib1PdcchCfg *sib1PdcchInfo)
 {
    if(dlDciPtr != NULLP)
    {
+      uint8_t numBytes;
+      uint8_t bytePos;
+      uint8_t bitPos;
+      
+      uint16_t coreset0Size;
+      uint16_t rbStart;
+      uint16_t rbLen;
+      uint32_t freqDomResAssign;
+      uint32_t timeDomResAssign;
+      uint8_t  VRB2PRBMap;
+      uint32_t modNCodScheme;
+      uint8_t  redundancyVer;
+      uint32_t sysInfoInd;
+      uint32_t reserved;
+
+      /* Size(in bits) of each field in DCI format 0_1 
+                * as mentioned in spec 38.214 */
+      uint8_t freqDomResAssignSize;
+      uint8_t timeDomResAssignSize = 4;
+      uint8_t VRB2PRBMapSize       = 1;
+      uint8_t modNCodSchemeSize    = 5;
+      uint8_t redundancyVerSize    = 2;
+      uint8_t sysInfoIndSize       = 1;
+      uint8_t reservedSize         = 15;
+
       dlDciPtr->rnti = sib1PdcchInfo->sib1DlDci.rnti;
       dlDciPtr->scramblingId = sib1PdcchInfo->sib1DlDci.scramblingId;    
       dlDciPtr->scramblingRnti = sib1PdcchInfo->sib1DlDci.scramblingRnti;
@@ -2150,10 +2175,88 @@ void fillDlDciPdu(fapi_dl_dci_t *dlDciPtr, Sib1PdcchCfg *sib1PdcchInfo)
       dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->sib1DlDci.beamPdcchInfo.prg[0].beamIdx[0];
       dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->sib1DlDci.txPdcchPower.powerValue;           
       dlDciPtr->powerControlOfssetSS = sib1PdcchInfo->sib1DlDci.txPdcchPower.powerControlOffsetSS;
-      //dlDciPtr->payloadSizeBits;
-      //dlDciPtr->payload[DCI_PAYLOAD_BYTE_LEN];
-   }
-}
+
+      /* Calculating freq domain resource allocation field value and size
+       * coreset0Size = Size of coreset 0
+       * RBStart = Starting Virtual Rsource block
+       * RBLen = length of contiguously allocted RBs
+       * Spec 38.214 Sec 5.1.2.2.2
+       */
+      coreset0Size= sib1PdcchInfo->sib1Coreset0Cfg.coreSet0Size;
+               rbStart = 0;              /* For SIB1 */
+      //rbStart = sib1PdcchInfo->sib1DlDci.pdschCfg->sib1FreqAlloc.rbStart;
+      rbLen = sib1PdcchInfo->sib1DlDci.pdschCfg->sib1FreqAlloc.rbSize;
+
+      if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
+      {
+         if((rbLen - 1) <= floor(coreset0Size / 2))
+            freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
+         else
+            freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
+               + (coreset0Size - 1 - rbStart);
+
+         freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
+      }
+
+      /* Fetching DCI field values */
+      timeDomResAssign = sib1PdcchInfo->sib1DlDci.pdschCfg->sib1TimeAlloc.
+                         rowIndex -1;
+      VRB2PRBMap       = sib1PdcchInfo->sib1DlDci.pdschCfg->sib1FreqAlloc.\
+                         vrbPrbMapping;
+      modNCodScheme    = sib1PdcchInfo->sib1DlDci.pdschCfg->codeword[0].mcsIndex;
+      redundancyVer    = sib1PdcchInfo->sib1DlDci.pdschCfg->codeword[0].rvIndex;
+      sysInfoInd       = 0;           /* 0 for SIB1; 1 for SI messages */
+      reserved         = 0;
+
+      /* Reversing bits in each DCI field */
+      freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+      timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+      VRB2PRBMap       = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
+      modNCodScheme    = reverseBits(modNCodScheme, modNCodSchemeSize);
+      redundancyVer    = reverseBits(redundancyVer, redundancyVerSize);
+      sysInfoInd       = reverseBits(sysInfoInd, sysInfoIndSize);
+      reserved         = reverseBits(reserved, reservedSize);
+
+     /* Calulating total number of bytes in buffer */
+     dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
+              + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
+              + sysInfoIndSize + reservedSize;
+
+     numBytes = dlDciPtr->payloadSizeBits / 8;
+     if(dlDciPtr->payloadSizeBits % 8)
+        numBytes += 1;
+
+     if(numBytes > DCI_PAYLOAD_BYTE_LEN)
+     {
+        DU_LOG("\nLOWER MAC : Total bytes for DCI is more than expected");
+        return;
+     }
+
+     /* Initialize buffer */
+     for(bytePos = 0; bytePos < numBytes; bytePos++)
+        dlDciPtr->payload[bytePos] = 0;
+
+     bytePos = numBytes - 1;
+     bitPos = 0;
+
+     /* Packing DCI format fields */
+     fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+        freqDomResAssign, freqDomResAssignSize);
+     fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+        timeDomResAssign, timeDomResAssignSize);
+     fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+        VRB2PRBMap, VRB2PRBMapSize);
+     fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+        modNCodScheme, modNCodSchemeSize);
+     fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+        redundancyVer, redundancyVerSize);
+     fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+        sysInfoInd, sysInfoIndSize);
+     fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+        reserved, reservedSize);
+
+   }
+} /* fillDlDciPdu */
 
 /*******************************************************************
  *