#endif
#include "lwr_mac_fsm.h"
#include "lwr_mac_phy.h"
+#include "lwr_mac_utils.h"
#include "mac_utils.h"
#define MIB_SFN_BITMASK 0xFC
uint16_t cellIdx =0;
uint32_t msgLen = 0;
uint32_t mib = 0;
+ uint32_t dlFreq = 0, ulFreq = 0;
MacCellCfg macCfgParams;
fapi_vendor_msg_t *vendorMsg;
fapi_config_req_t *configReq;
fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
+ dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
- sizeof(uint32_t), macCfgParams.carrCfg.dlFreq, &msgLen);
+ sizeof(uint32_t), dlFreq, &msgLen);
/* Due to bug in Intel FT code, commenting TLVs that are are not
* needed to avoid error. Must be uncommented when FT bug is fixed */
//fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
+ ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
- sizeof(uint32_t), macCfgParams.carrCfg.ulFreq, &msgLen);
+ sizeof(uint32_t), ulFreq, &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
uint8_t sysInfoIndSize = 1;
uint8_t reservedSize = 15;
- dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
- dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
- dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
- dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
- dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
- dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
- dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
- dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
- dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
- dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
- dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+ dlDciPtr[0].rnti = sib1PdcchInfo->dci[0].rnti;
+ dlDciPtr[0].scramblingId = sib1PdcchInfo->dci[0].scramblingId;
+ dlDciPtr[0].scramblingRnti = sib1PdcchInfo->dci[0].scramblingRnti;
+ dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex;
+ dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel;
+ dlDciPtr[0].pc_and_bform.numPrgs = sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs;
+ dlDciPtr[0].pc_and_bform.prgSize = sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize;
+ dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr[0].beta_pdcch_1_0 = sib1PdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
+ dlDciPtr[0].powerControlOffsetSS = sib1PdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* coreset0Size = Size of coreset 0
* Spec 38.214 Sec 5.1.2.2.2
*/
coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
- rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
- rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
+ rbStart = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.startPrb;
+ rbLen = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
}
/* Fetching DCI field values */
- timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
- VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
- modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
- redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
+ timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
+ modNCodScheme = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
+ redundancyVer = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].rvIndex;
sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
reserved = 0;
sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
/* Calulating total number of bytes in buffer */
- dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
+ dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
+ VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
+ sysInfoIndSize + reservedSize;
- numBytes = dlDciPtr->payloadSizeBits / 8;
- if(dlDciPtr->payloadSizeBits % 8)
+ numBytes = dlDciPtr[0].payloadSizeBits / 8;
+ if(dlDciPtr[0].payloadSizeBits % 8)
numBytes += 1;
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
/* Initialize buffer */
for(bytePos = 0; bytePos < numBytes; bytePos++)
- dlDciPtr->payload[bytePos] = 0;
+ dlDciPtr[0].payload[bytePos] = 0;
bytePos = numBytes - 1;
bitPos = 0;
/* Packing DCI format fields */
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
freqDomResAssign, freqDomResAssignSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
timeDomResAssign, timeDomResAssignSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
VRB2PRBMap, VRB2PRBMapSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
modNCodScheme, modNCodSchemeSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
redundancyVer, redundancyVerSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
sysInfoInd, sysInfoIndSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
reserved, reservedSize);
}
uint8_t tbScalingSize = 2;
uint8_t reservedSize = 6;
- dlDciPtr->rnti = P_RNTI;
- dlDciPtr->scramblingId = macCellCfg->cellCfg.phyCellId;
- dlDciPtr->scramblingRnti = 0;
- dlDciPtr->cceIndex = dlPageAlloc->pageDlDci.cceIndex;
- dlDciPtr->aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel;
- dlDciPtr->pc_and_bform.numPrgs = 1;
- dlDciPtr->pc_and_bform.prgSize = 1;
- dlDciPtr->pc_and_bform.digBfInterfaces = 0;
- dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = 0;
- dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = 0;
- dlDciPtr->beta_pdcch_1_0 = 0;
- dlDciPtr->powerControlOffsetSS = 0;
+ dlDciPtr[0].rnti = P_RNTI;
+ dlDciPtr[0].scramblingId = macCellCfg->cellCfg.phyCellId;
+ dlDciPtr[0].scramblingRnti = 0;
+ dlDciPtr[0].cceIndex = dlPageAlloc->pageDlDci.cceIndex;
+ dlDciPtr[0].aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel;
+ dlDciPtr[0].pc_and_bform.numPrgs = 1;
+ dlDciPtr[0].pc_and_bform.prgSize = 1;
+ dlDciPtr[0].pc_and_bform.digBfInterfaces = 0;
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = 0;
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = 0;
+ dlDciPtr[0].beta_pdcch_1_0 = 0;
+ dlDciPtr[0].powerControlOffsetSS = 0;
/* Calculating freq domain resource allocation field value and size
* coreset0Size = Size of coreset 0
tbScaling = reverseBits(tbScaling, tbScalingSize);
/* Calulating total number of bytes in buffer */
- dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
+ dlDciPtr[0].payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
+ timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
+ tbScaling + reservedSize;
- numBytes = dlDciPtr->payloadSizeBits / 8;
- if(dlDciPtr->payloadSizeBits % 8)
+ numBytes = dlDciPtr[0].payloadSizeBits / 8;
+ if(dlDciPtr[0].payloadSizeBits % 8)
{
numBytes += 1;
}
/* Initialize buffer */
for(bytePos = 0; bytePos < numBytes; bytePos++)
{
- dlDciPtr->payload[bytePos] = 0;
+ dlDciPtr[0].payload[bytePos] = 0;
}
bytePos = numBytes - 1;
bitPos = 0;
/* Packing DCI format fields */
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
shortMsgInd, shortMsgIndSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
shortMsg, shortMsgSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
freqDomResAssign, freqDomResAssignSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
timeDomResAssign, timeDomResAssignSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
VRB2PRBMap, VRB2PRBMapSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
modNCodScheme, modNCodSchemeSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
tbScaling, tbScalingSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
reserved, reservedSize);
}
} /* fillPageDlDciPdu */
uint8_t tbScalingSize = 2;
uint8_t reservedSize = 16;
- dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
- dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
- dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
- dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
- dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
- dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
- dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
- dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
- dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
- dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
- dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+ dlDciPtr[0].rnti = rarPdcchInfo->dci[0].rnti;
+ dlDciPtr[0].scramblingId = rarPdcchInfo->dci[0].scramblingId;
+ dlDciPtr[0].scramblingRnti = rarPdcchInfo->dci[0].scramblingRnti;
+ dlDciPtr[0].cceIndex = rarPdcchInfo->dci[0].cceIndex;
+ dlDciPtr[0].aggregationLevel = rarPdcchInfo->dci[0].aggregLevel;
+ dlDciPtr[0].pc_and_bform.numPrgs = rarPdcchInfo->dci[0].beamPdcchInfo.numPrgs;
+ dlDciPtr[0].pc_and_bform.prgSize = rarPdcchInfo->dci[0].beamPdcchInfo.prgSize;
+ dlDciPtr[0].pc_and_bform.digBfInterfaces = rarPdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr[0].beta_pdcch_1_0 = rarPdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
+ dlDciPtr[0].powerControlOffsetSS = rarPdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* coreset0Size = Size of coreset 0
/* TODO: Fill values of coreset0Size, rbStart and rbLen */
coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
- rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
- rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
+ rbStart = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.startPrb;
+ rbLen = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
}
/* Fetching DCI field values */
- timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex;
- VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
- modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
+ timeDomResAssign = rarPdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex;
+ VRB2PRBMap = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
+ modNCodScheme = rarPdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
tbScaling = 0; /* configured to 0 scaling */
reserved = 0;
tbScaling = reverseBits(tbScaling, tbScalingSize);
/* Calulating total number of bytes in buffer */
- dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
+ dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
+ VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
- numBytes = dlDciPtr->payloadSizeBits / 8;
- if(dlDciPtr->payloadSizeBits % 8)
+ numBytes = dlDciPtr[0].payloadSizeBits / 8;
+ if(dlDciPtr[0].payloadSizeBits % 8)
numBytes += 1;
if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
/* Initialize buffer */
for(bytePos = 0; bytePos < numBytes; bytePos++)
- dlDciPtr->payload[bytePos] = 0;
+ dlDciPtr[0].payload[bytePos] = 0;
bytePos = numBytes - 1;
bitPos = 0;
/* Packing DCI format fields */
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
freqDomResAssign, freqDomResAssignSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
timeDomResAssign, timeDomResAssignSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
VRB2PRBMap, VRB2PRBMapSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
modNCodScheme, modNCodSchemeSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
tbScaling, tbScalingSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
reserved, reservedSize);
}
} /* fillRarDlDciPdu */
*
******************************************************************/
void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
- DlMsgInfo *dlMsgInfo)
+ DlMsgSchInfo *dlMsgSchInfo)
{
+ uint8_t dciIndex = 0;
if(dlDciPtr != NULLP)
{
uint8_t numBytes;
uint8_t pucchResoIndSize = 3;
uint8_t harqFeedbackIndSize = 3;
- dlDciPtr->rnti = pdcchInfo->dci.rnti;
- dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
- dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
- dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
- dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
- dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
- dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
- dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
- dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
- dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
- dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
-
- /* Calculating freq domain resource allocation field value and size
- * coreset0Size = Size of coreset 0
- * RBStart = Starting Virtual Rsource block
- * RBLen = length of contiguously allocted RBs
- * Spec 38.214 Sec 5.1.2.2.2
- */
- coresetSize = pdcchInfo->coresetCfg.coreSetSize;
- rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
- rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
-
- if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
+ for(dciIndex = 0; dciIndex < pdcchInfo->numDlDci; dciIndex++)
{
- if((rbLen - 1) <= floor(coresetSize / 2))
- freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
- else
- freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
- + (coresetSize - 1 - rbStart);
-
- freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
- }
-
- /* Fetching DCI field values */
- dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
- timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
- VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
- modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
- ndi = dlMsgInfo->ndi;
- redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
- harqProcessNum = dlMsgInfo->harqProcNum;
- dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
- pucchTpc = dlMsgInfo->pucchTpc;
- pucchResoInd = dlMsgInfo->pucchResInd;
- harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
+ dlDciPtr[dciIndex].rnti = pdcchInfo->dci[dciIndex].rnti;
+ dlDciPtr[dciIndex].scramblingId = pdcchInfo->dci[dciIndex].scramblingId;
+ dlDciPtr[dciIndex].scramblingRnti = pdcchInfo->dci[dciIndex].scramblingRnti;
+ dlDciPtr[dciIndex].cceIndex = pdcchInfo->dci[dciIndex].cceIndex;
+ dlDciPtr[dciIndex].aggregationLevel = pdcchInfo->dci[dciIndex].aggregLevel;
+ dlDciPtr[dciIndex].pc_and_bform.numPrgs = pdcchInfo->dci[dciIndex].beamPdcchInfo.numPrgs;
+ dlDciPtr[dciIndex].pc_and_bform.prgSize = pdcchInfo->dci[dciIndex].beamPdcchInfo.prgSize;
+ dlDciPtr[dciIndex].pc_and_bform.digBfInterfaces = pdcchInfo->dci[dciIndex].beamPdcchInfo.digBfInterfaces;
+ dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr[dciIndex].beta_pdcch_1_0 = pdcchInfo->dci[dciIndex].txPdcchPower.beta_pdcch_1_0;
+ dlDciPtr[dciIndex].powerControlOffsetSS = pdcchInfo->dci[dciIndex].txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset0Size = Size of coreset 0
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+ coresetSize = pdcchInfo->coresetCfg.coreSetSize;
+ rbStart = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.startPrb;
+ rbLen = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.numPrb;
+
+ if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
+ {
+ if((rbLen - 1) <= floor(coresetSize / 2))
+ freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
+ + (coresetSize - 1 - rbStart);
- /* Reversing bits in each DCI field */
- dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
- freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
- timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
- VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
- modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
- ndi = reverseBits(ndi, ndiSize);
- redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
- harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
- dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
- pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
- pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
- harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
+ freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
+ }
+ /* Fetching DCI field values */
+ dciFormatId = dlMsgSchInfo->dciFormatId; /* Always set to 1 for DL */
+ timeDomResAssign = pdcchInfo->dci[dciIndex].pdschCfg.pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
+ modNCodScheme = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].mcsIndex;
+ ndi = dlMsgSchInfo->transportBlock[0].ndi;
+ redundancyVer = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].rvIndex;
+ harqProcessNum = dlMsgSchInfo->harqProcNum;
+ dlAssignmentIdx = dlMsgSchInfo->dlAssignIdx;
+ pucchTpc = dlMsgSchInfo->pucchTpc;
+ pucchResoInd = dlMsgSchInfo->pucchResInd;
+ harqFeedbackInd = dlMsgSchInfo->harqFeedbackInd;
- /* Calulating total number of bytes in buffer */
- dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
- + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
- + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
- + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
+ /* Reversing bits in each DCI field */
+ dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
+ freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
+ modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
+ ndi = reverseBits(ndi, ndiSize);
+ redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
+ harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
+ dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
+ pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
+ pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
+ harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
- numBytes = dlDciPtr->payloadSizeBits / 8;
- if(dlDciPtr->payloadSizeBits % 8)
- numBytes += 1;
- if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
- {
- DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
- return;
- }
+ /* Calulating total number of bytes in buffer */
+ dlDciPtr[dciIndex].payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
+ + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
+ + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
+ + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
- /* Initialize buffer */
- for(bytePos = 0; bytePos < numBytes; bytePos++)
- dlDciPtr->payload[bytePos] = 0;
+ numBytes = dlDciPtr[dciIndex].payloadSizeBits / 8;
+ if(dlDciPtr[dciIndex].payloadSizeBits % 8)
+ numBytes += 1;
- bytePos = numBytes - 1;
- bitPos = 0;
+ if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
+ {
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
+ return;
+ }
- /* Packing DCI format fields */
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- dciFormatId, dciFormatIdSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- freqDomResAssign, freqDomResAssignSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- timeDomResAssign, timeDomResAssignSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- VRB2PRBMap, VRB2PRBMapSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- modNCodScheme, modNCodSchemeSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- ndi, ndiSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- redundancyVer, redundancyVerSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- redundancyVer, redundancyVerSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- harqProcessNum, harqProcessNumSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- dlAssignmentIdx, dlAssignmentIdxSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- pucchTpc, pucchTpcSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- pucchResoInd, pucchResoIndSize);
- fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
- harqFeedbackInd, harqFeedbackIndSize);
+ /* Initialize buffer */
+ for(bytePos = 0; bytePos < numBytes; bytePos++)
+ dlDciPtr[dciIndex].payload[bytePos] = 0;
+
+ bytePos = numBytes - 1;
+ bitPos = 0;
+
+ /* Packing DCI format fields */
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ dciFormatId, dciFormatIdSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ freqDomResAssign, freqDomResAssignSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ timeDomResAssign, timeDomResAssignSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ VRB2PRBMap, VRB2PRBMapSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ modNCodScheme, modNCodSchemeSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ ndi, ndiSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ redundancyVer, redundancyVerSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ redundancyVer, redundancyVerSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ harqProcessNum, harqProcessNumSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ dlAssignmentIdx, dlAssignmentIdxSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ pucchTpc, pucchTpcSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ pucchResoInd, pucchResoIndSize);
+ fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
+ harqFeedbackInd, harqFeedbackIndSize);
+ }
}
}
dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pageAlloc->pageDlDci.ssStartSymbolIndex;
dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pageAlloc->pageDlDci.durationSymbols;
- memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pageAlloc->pageDlDci.freqDomainResource, 6*sizeof(uint8_t));
+ convertFreqDomRsrcMapToIAPIFormat(pageAlloc->pageDlDci.freqDomainResource, \
+ dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pageAlloc->pageDlDci.cceRegMappingType;
dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pageAlloc->pageDlDci.cceReg.interleaved.regBundleSize;
dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pageAlloc->pageDlDci.cceReg.interleaved.interleaverSize;
uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
{
+ uint8_t dciIndex = 0;
+
if(dlTtiReqPdu != NULLP)
{
PdcchCfg *pdcchInfo = NULLP;
memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
if(rntiType == SI_RNTI_TYPE)
{
- pdcchInfo = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
+ pdcchInfo = dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
}
else if(rntiType == RA_RNTI_TYPE)
{
- pdcchInfo = &dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
+ pdcchInfo = dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
}
else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
{
- pdcchInfo = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgPdcchCfg;
- bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].bwp;
+ pdcchInfo = dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg;
+ bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp;
fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
- &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgInfo);
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]);
}
else
{
DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
return RFAILED;
}
+
dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
- memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
+ convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\
+ dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
- dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
- dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
+ for(dciIndex = 0; dciIndex < dlTtiReqPdu->pdu.pdcch_pdu.numDlDci; dciIndex++)
+ {
+ dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_pdcch_to_ssb = 0;
+ dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_dmrs_to_ssb = 0;
+ }
}
return ROK;
if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
{
/* PDCCH and PDSCH PDU is filled */
- if(dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH)
+ if(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg && dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
count += 2;
else
count += 1;
if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
{
- for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
- {
- /* PDCCH and PDSCH PDU is filled */
- if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH)
- count += 2;
- else if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres != NONE)
- count += 1;
- }
+ /* PDCCH and PDSCH PDU is filled */
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg)
+ count += 1;
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
+ count += 1;
}
}
return count;
* ********************************************************************/
uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
{
- uint8_t idx = 0, count = 0, ueIdx=0;
+ uint8_t count = 0, ueIdx=0;
if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
{
- if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && \
- ((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU)))
+ if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && (dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
count++;
if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
{
- for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
- {
- if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH || \
- dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU)
- count++;
- }
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
+ count++;
}
}
return count;
* @return ROK
*
* ********************************************************************/
-uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg pdschCfg)
+uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg *pdschCfg)
{
uint16_t payloadSize;
uint8_t *rarPayload = NULLP;
pduDesc[pduIndex].num_tlvs = 1;
/* fill the TLV */
- payloadSize = pdschCfg.codeword[0].tbSize;
+ payloadSize = pdschCfg->codeword[0].tbSize;
pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
LWR_MAC_ALLOC(rarPayload, payloadSize);
* @return ROK
*
* ********************************************************************/
-uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgInfo *dlMsgInfo, PdschCfg pdschCfg)
+uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgSchInfo *dlMsgSchInfo, PdschCfg *pdschCfg)
{
uint16_t payloadSize;
uint8_t *dlMsgPayload = NULLP;
pduDesc[pduIndex].num_tlvs = 1;
/* fill the TLV */
- payloadSize = pdschCfg.codeword[0].tbSize;
+ payloadSize = pdschCfg->codeword[0].tbSize;
pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
return RFAILED;
}
payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
- FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgInfo->dlMsgPduLen);
- memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
+ FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen);
+ memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen);
#ifdef INTEL_WLS_MEM
mtGetWlsHdl(&wlsHdlr);
/* PDSCH PDU */
fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg,
+ &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg,
currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
pduIndex);
dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
{
/* Filling RAR param */
rntiType = RA_RNTI_TYPE;
- if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
- (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDCCH_PDU))
- {
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
+ {
fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
numPduEncoded++;
- }
- if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
- (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
+ MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg));
+ }
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
{
fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- &currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
+ currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
pduIndex);
numPduEncoded++;
pduIndex++;
- DU_LOG("\033[1;32m");
+ DU_LOG("\033[1;32m");
DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
DU_LOG("\033[0m");
}
if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
{
- for(idx=0; idx<currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
- {
- /* Filling Msg4 param */
- if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
- (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDCCH_PDU))
- {
- if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
- {
- rntiType = TC_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- currDlSlot, idx, rntiType, CORESET_TYPE0, ueIdx);
- }
- else
- {
- /* Filling other DL msg params */
- rntiType = C_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
- currDlSlot, idx, rntiType, CORESET_TYPE1, ueIdx);
- }
- numPduEncoded++;
- }
-
- if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.dlMsgPdu != NULLP)
- {
- if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
- (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU))
- {
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
- &currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgPdschCfg,\
- currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].bwp, pduIndex);
- numPduEncoded++;
- pduIndex++;
-
- DU_LOG("\033[1;32m");
- if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
- {
- DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
- }
- else
- {
- DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
- }
- DU_LOG("\033[0m");
- }
-
- }
- /* else
- {
- MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
- currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
- }
- */
- }
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg) \
+ {
+ rntiType = C_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx);
+ numPduEncoded++;
+ }
+
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP)
+ {
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
+ {
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex);
+ numPduEncoded++;
+ pduIndex++;
+
+ DU_LOG("\033[1;32m");
+ if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status))
+ {
+ DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
+ MAC_FREE(macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status, sizeof(bool));
+ }
+ else
+ {
+ DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
+ }
+ DU_LOG("\033[0m");
+ }
+
+ }
+ MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg));
+ /* else
+ {
+ MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
+ }
+ */
}
}
uint8_t nPdu = 0;
uint8_t ueIdx=0;
- uint8_t schInfoIdx = 0;
uint16_t cellIdx=0;
uint16_t pduIndex = 0;
fapi_tx_data_req_t *txDataReq =NULLP;
if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
- dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg);
+ &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg);
pduIndex++;
+ MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
txDataReq->num_pdus++;
}
if(dlSlot->pageAllocInfo != NULLP)
{
if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
{
- if((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
+ if((dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
{
fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
pduIndex++;
txDataReq->num_pdus++;
+ MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, sizeof(PdschCfg));
}
MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
}
if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
{
- for(schInfoIdx=0; schInfoIdx < dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; schInfoIdx++)
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
{
- if((dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == BOTH) || \
- (dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == PDSCH_PDU))
- {
- fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
- &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo, \
- dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgPdschCfg);
- pduIndex++;
- txDataReq->num_pdus++;
- }
- MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu, \
- dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPduLen);
- dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu = NULLP;
+ fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx], \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,sizeof(PdschCfg));
}
- MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu, \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPduLen);
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu = NULLP;
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgSchInfo));
}
}
ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
/* TODO : Fill handle in raCb when scheduling pusch and access here */
ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
- ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
- ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
- macCellCfg->initialUlBwp.bwp.scs;
+ macCellCfg->cellCfg.initialUlBwp.bwp.scs;
ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
- macCellCfg->initialUlBwp.bwp.cyclicPrefix;
+ macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.crnti;
/* TODO : Fill handle in raCb when scheduling pucch and access here */
ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
- ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
- ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
- ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
- ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
+ ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs;
+ ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
- ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.startPrb;
- ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.numPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
- memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
+ convertFreqDomRsrcMapToIAPIFormat(dlInfo->ulGrant->coresetCfg.freqDomainResource, \
+ ulDciReqPdu->pdcchPduConfig.freqDomainResource);
ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
Code Review / o-du / l2.git / blobdiff