uint16_t cellIdx =0;
uint32_t msgLen = 0;
uint32_t mib = 0;
+ uint32_t dlFreq = 0, ulFreq = 0;
MacCellCfg macCfgParams;
fapi_vendor_msg_t *vendorMsg;
fapi_config_req_t *configReq;
fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
+ dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
- sizeof(uint32_t), macCfgParams.carrCfg.dlFreq, &msgLen);
+ sizeof(uint32_t), dlFreq, &msgLen);
/* Due to bug in Intel FT code, commenting TLVs that are are not
* needed to avoid error. Must be uncommented when FT bug is fixed */
//fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
+ ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
- sizeof(uint32_t), macCfgParams.carrCfg.ulFreq, &msgLen);
+ sizeof(uint32_t), ulFreq, &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
//fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
/* TODO : Fill handle in raCb when scheduling pusch and access here */
ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
- ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
- ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
- macCellCfg->initialUlBwp.bwp.scs;
+ macCellCfg->cellCfg.initialUlBwp.bwp.scs;
ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
- macCellCfg->initialUlBwp.bwp.cyclicPrefix;
+ macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = currUlSlot->ulInfo.schPuschInfo.tbInfo.qamOrder;
ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.crnti;
/* TODO : Fill handle in raCb when scheduling pucch and access here */
ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
- ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
- ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
- ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
- ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
+ ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs;
+ ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
- ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.startPrb;
- ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.numPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;