#include "mac.h"
#include "lwr_mac.h"
#ifdef INTEL_FAPI
-#include "fapi.h"
+#include "nr5g_fapi_internal.h"
#include "fapi_vendor_extension.h"
#endif
#ifdef INTEL_WLS_MEM
uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
void fapiMacConfigRsp(uint16_t cellId);
-uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t prevElem);
-uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
-uint16_t fillUlDciReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem);
-uint8_t lwr_mac_procStopReqEvt(SlotIndInfo slotInfo, p_fapi_api_queue_elem_t prevElem);
+uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
+uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
+uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
+uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem, fapi_stop_req_vendor_msg_t *vendorMsg);
void lwrMacLayerInit(Region region, Pool pool)
{
* ****************************************************************/
uint8_t lwr_mac_procInvalidEvt(void *msg)
{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
+#endif
DU_LOG("\nERROR --> LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
return ROK;
}
uint8_t lwr_mac_procParamReqEvt(void *msg)
{
#ifdef INTEL_FAPI
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
+#endif
+
/* startGuardTimer(); */
fapi_param_req_t *paramReq = NULL;
fapi_msg_header_t *msgHeader;
uint8_t lwr_mac_procConfigReqEvt(void *msg)
{
#ifdef INTEL_FAPI
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
+#endif
#ifdef NR_TDD
uint8_t slotIdx = 0;
uint8_t symbolIdx =0;
#endif
- uint8_t index = 0;
+ uint16_t index = 0;
uint16_t *cellId =NULLP;
uint16_t cellIdx =0;
uint32_t msgLen = 0;
vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
vendorMsg->config_req_vendor.group_hop_flag = 0;
vendorMsg->config_req_vendor.sequence_hop_flag = 0;
+ vendorMsg->config_req_vendor.urllc_capable = 0;
+ vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
+ vendorMsg->config_req_vendor.nr_of_dl_ports =1;
+ vendorMsg->config_req_vendor.nr_of_ul_ports =1;
+ vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
+ vendorMsg->config_req_vendor.ssb_subc_spacing =1;
+ vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
vendorMsg->start_req_vendor.sfn = 0;
vendorMsg->start_req_vendor.slot = 0;
vendorMsg->start_req_vendor.mode = 4;
if(!cfgReqQElem)
{
DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
- LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
memset(configReq, 0, sizeof(fapi_config_req_t));
fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
+#ifndef NR_TDD
configReq->number_of_tlvs = 25;
+#else
+ configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
+#endif
+
msgLen = sizeof(configReq->number_of_tlvs);
if(macCfgParams.dlCarrCfg.pres)
//fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
- sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
+ sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
if(!headerElem)
{
DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
- LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
- LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
+ LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
uint8_t lwr_mac_procStartReqEvt(void *msg)
{
#ifdef INTEL_FAPI
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
+#endif
fapi_msg_header_t *msgHeader;
fapi_start_req_t *startReq;
fapi_vendor_msg_t *vendorMsg;
if(!startReqElem)
{
DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
- LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
if(!headerElem)
{
DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
- LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
- LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
+ LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
*
********************************************************************/
-uint8_t lwr_mac_procStopReqEvt(SlotIndInfo slotInfo, p_fapi_api_queue_elem_t prevElem)
+uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem, fapi_stop_req_vendor_msg_t *vendorMsg)
{
#ifdef INTEL_FAPI
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
+#endif
+
fapi_stop_req_t *stopReq;
- fapi_vendor_msg_t *vendorMsg;
p_fapi_api_queue_elem_t stopReqElem;
- p_fapi_api_queue_elem_t vendorMsgElem;
- /* Allocte And fill Vendor msg */
- LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
- if(!vendorMsgElem)
- {
- DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in stop req");
- return RFAILED;
- }
- FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
- vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
- fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
- vendorMsg->stop_req_vendor.sfn = slotInfo.sfn;
- vendorMsg->stop_req_vendor.slot = slotInfo.slot;
+ vendorMsg->sfn = slotInfo.sfn;
+ vendorMsg->slot = slotInfo.slot;
/* Fill FAPI stop req */
LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
if(!stopReqElem)
{
DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for stop req");
- LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
return RFAILED;
}
- FILL_FAPI_LIST_ELEM(stopReqElem, vendorMsgElem, FAPI_STOP_REQUEST, 1, \
- sizeof(fapi_stop_req_t));
+ FILL_FAPI_LIST_ELEM(stopReqElem, NULLP, FAPI_STOP_REQUEST, 1, sizeof(fapi_stop_req_t));
stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
memset(stopReq, 0, sizeof(fapi_stop_req_t));
fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
- dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
+ dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
/* ssbOfPdufstA to be filled in ssbCfg */
- dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
+ dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
/* Bit manipulation for SFN */
setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
-
return ROK;
}
return RFAILED;
dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* Spec 38.214 Sec 5.1.2.2.2
*/
coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
- rbStart = 0; /* For SIB1 */
- //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
- rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
+ rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
+ rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
}
/* Fetching DCI field values */
- timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
- rowIndex -1;
- VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
- vrbPrbMapping;
+ timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
}
} /* fillSib1DlDciPdu */
+
+/*******************************************************************
+ *
+ * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
+ *
+ * @details
+ *
+ * Function : fillPageDlDciPdu
+ *
+ * Functionality:
+ * -Fills the Dl DCI PDU for Paging
+ *
+ * @params[in] Pointer to fapi_dl_dci_t
+ * Pointer to dlPageAlloc
+ * @return ROK
+ *
+ ******************************************************************/
+
+void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc)
+{
+ if(dlDciPtr != NULLP)
+ {
+ uint8_t numBytes=0;
+ uint8_t bytePos=0;
+ uint8_t bitPos=0;
+
+ uint16_t coreset0Size = 0;
+ uint16_t rbStart = 0;
+ uint16_t rbLen = 0;
+ uint8_t shortMsgInd = 0;
+ uint8_t shortMsg = 0;
+ uint32_t freqDomResAssign = 0;
+ uint32_t timeDomResAssign = 0;
+ uint8_t VRB2PRBMap = 0;
+ uint32_t modNCodScheme = 0;
+ uint8_t tbScaling = 0;
+ uint32_t reserved = 0;
+
+ /* Size(in bits) of each field in DCI format 1_0
+ * as mentioned in spec 38.214 */
+ uint8_t shortMsgIndSize = 2;
+ uint8_t shortMsgSize = 8;
+ uint8_t freqDomResAssignSize = 0;
+ uint8_t timeDomResAssignSize = 4;
+ uint8_t VRB2PRBMapSize = 1;
+ uint8_t modNCodSchemeSize = 5;
+ uint8_t tbScalingSize = 2;
+ uint8_t reservedSize = 6;
+
+ dlDciPtr->rnti = dlPageAlloc->pagePdcchCfg.dci.rnti;
+ dlDciPtr->scramblingId = dlPageAlloc->pagePdcchCfg.dci.scramblingId;
+ dlDciPtr->scramblingRnti = dlPageAlloc->pagePdcchCfg.dci.scramblingRnti;
+ dlDciPtr->cceIndex = dlPageAlloc->pagePdcchCfg.dci.cceIndex;
+ dlDciPtr->aggregationLevel = dlPageAlloc->pagePdcchCfg.dci.aggregLevel;
+ dlDciPtr->pc_and_bform.numPrgs = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.numPrgs;
+ dlDciPtr->pc_and_bform.prgSize = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prgSize;
+ dlDciPtr->pc_and_bform.digBfInterfaces = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.digBfInterfaces;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = dlPageAlloc->pagePdcchCfg.dci.beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr->beta_pdcch_1_0 = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.beta_pdcch_1_0;
+ dlDciPtr->powerControlOffsetSS = dlPageAlloc->pagePdcchCfg.dci.txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset0Size = Size of coreset 0
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+ coreset0Size = dlPageAlloc->pagePdcchCfg.coresetCfg.coreSetSize;
+ rbStart = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.startPrb;
+ rbLen = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.numPrb;
+
+ if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
+ {
+ if((rbLen - 1) <= floor(coreset0Size / 2))
+ freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
+ + (coreset0Size - 1 - rbStart);
+
+ freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
+ }
+
+ /*Fetching DCI field values */
+
+ /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
+ if(dlPageAlloc->shortMsgInd != TRUE)
+ {
+ /*When Short Msg is absent*/
+ shortMsgInd = 1;
+ shortMsg = 0;
+ }
+ else
+ {
+ /*Short Msg is Present*/
+ if(dlPageAlloc->dlPagePduLen == 0 || dlPageAlloc->dlPagePdu == NULLP)
+ {
+ /*When Paging Msg is absent*/
+ shortMsgInd = 2;
+ }
+ else
+ {
+ /*Both Short and Paging is present*/
+ shortMsgInd = 3;
+ }
+ shortMsg = dlPageAlloc->shortMsg;
+ }
+
+ timeDomResAssign = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ VRB2PRBMap = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
+ modNCodScheme = dlPageAlloc->pagePdcchCfg.dci.pdschCfg->codeword[0].mcsIndex;
+ tbScaling = 0;
+ reserved = 0;
+
+ /* Reversing bits in each DCI field */
+ shortMsgInd = reverseBits(shortMsgInd, shortMsgIndSize);
+ shortMsg = reverseBits(shortMsg, shortMsgSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
+ modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
+ tbScaling = reverseBits(tbScaling, tbScalingSize);
+
+ /* Calulating total number of bytes in buffer */
+ dlDciPtr->payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
+ + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
+ + tbScaling + reservedSize;
+
+ numBytes = dlDciPtr->payloadSizeBits / 8;
+ if(dlDciPtr->payloadSizeBits % 8)
+ {
+ numBytes += 1;
+ }
+
+ if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
+ {
+ DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
+ return;
+ }
+
+ /* Initialize buffer */
+ for(bytePos = 0; bytePos < numBytes; bytePos++)
+ {
+ dlDciPtr->payload[bytePos] = 0;
+ }
+
+ bytePos = numBytes - 1;
+ bitPos = 0;
+
+ /* Packing DCI format fields */
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ shortMsgInd, shortMsgIndSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ shortMsg, shortMsgSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ freqDomResAssign, freqDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ timeDomResAssign, timeDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ VRB2PRBMap, VRB2PRBMapSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ modNCodScheme, modNCodSchemeSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ tbScaling, tbScalingSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ reserved, reservedSize);
+ }
+} /* fillPageDlDciPdu */
+
/*******************************************************************
*
* @brief fills Dl DCI PDU required for DL TTI info in MAC
uint8_t modNCodSchemeSize = 5;
uint8_t tbScalingSize = 2;
uint8_t reservedSize = 16;
-
+
dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
/* TODO: Fill values of coreset0Size, rbStart and rbLen */
coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
- rbStart = 0; /* For SIB1 */
- //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
- rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
+ rbStart = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
+ rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
{
}
/* Fetching DCI field values */
- timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
+ timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex;
VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
tbScaling = 0; /* configured to 0 scaling */
dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
- dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.beta_pdcch_1_0;
dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* Spec 38.214 Sec 5.1.2.2.2
*/
coresetSize = pdcchInfo->coresetCfg.coreSetSize;
- rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
- rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
+ rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.startPrb;
+ rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.numPrb;
if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
{
* @return ROK
*
******************************************************************/
-uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
- RntiType rntiType, uint8_t coreSetType)
+uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
+ RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
{
if(dlTtiReqPdu != NULLP)
{
memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
if(rntiType == SI_RNTI_TYPE)
{
- pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
- bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
- fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
+ pdcchInfo = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
+ bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
+ fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
+ }
+ else if(rntiType == P_RNTI_TYPE)
+ {
+ pdcchInfo = &dlSlot->pageAllocInfo->pagePdcchCfg;
+ bwp = &dlSlot->pageAllocInfo->bwp;
+ fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, dlSlot->pageAllocInfo);
}
else if(rntiType == RA_RNTI_TYPE)
{
- pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
- bwp = &dlInfo->rarAlloc->bwp;
- fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
+ pdcchInfo = &dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
+ bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
+ fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
}
else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
{
- pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
- bwp = &dlInfo->dlMsgAlloc->bwp;
+ pdcchInfo = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgPdcchCfg;
+ bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].bwp;
fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
- &dlInfo->dlMsgAlloc->dlMsgInfo);
+ &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[dlMsgSchInfoIdx].dlMsgInfo);
}
else
{
- DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
- return RFAILED;
+ DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
+ return RFAILED;
}
dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
-
+
/* Calculating PDU length. Considering only one dl dci pdu for now */
dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
+
+ /* Filling Vendor message PDU */
+ dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
+ dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
+ dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
+ dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
+ dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
}
return ROK;
*
******************************************************************/
-void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
+void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
BwpCfg bwp, uint16_t pduIndex)
{
uint8_t idx;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
for(idx = 0; idx < MAX_CODEWORDS ; idx++)
{
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
- dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
+ dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
}
dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
/* since we are using type-1, hence rbBitmap excluded */
- dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
- dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
+ dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
+ dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
- dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
- dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
+ dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
+ dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
- pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
+ pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
- beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
+ beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
+
+ /* DL TTI Request vendor message */
+ dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
+ dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
+ dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
+ for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
+ {
+ dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
+ }
}
}
* Functionality:
* -calculates the total pdu count to be allocated for DL TTI Req
*
- * @params[in] DlBrdcstAlloc *cellBroadcastInfo
+ * @params[in] MacDlSlot *dlSlot
* @return count
*
* ********************************************************************/
-uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
+uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
{
uint8_t count = 0;
- uint8_t idx = 0;
+ uint8_t idx = 0, ueIdx=0;
- if(dlInfo->isBroadcastPres)
+ if(dlSlot->dlInfo.isBroadcastPres)
{
- if(dlInfo->brdcstAlloc.ssbTrans)
+ if(dlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
{
- for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
- {
- /* SSB PDU is filled */
- count++;
- }
+ for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
+ {
+ /* SSB PDU is filled */
+ count++;
+ }
}
- if(dlInfo->brdcstAlloc.sib1Trans)
+ if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
- /* PDCCH and PDSCH PDU is filled */
- count += 2;
+ /* PDCCH and PDSCH PDU is filled */
+ count += 2;
}
}
- if(dlInfo->rarAlloc != NULLP)
+
+ if(dlSlot->pageAllocInfo)
{
/* PDCCH and PDSCH PDU is filled */
count += 2;
}
- if(dlInfo->dlMsgAlloc != NULLP)
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
{
- /* PDCCH and PDSCH PDU is filled */
- count += 2;
+ if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ /* PDCCH and PDSCH PDU is filled */
+ if(dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH)
+ count += 2;
+ else
+ count += 1;
+ }
+
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
+ {
+ /* PDCCH and PDSCH PDU is filled */
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH)
+ count += 2;
+ else if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres != NONE)
+ count += 1;
+ }
+ }
}
return count;
}
* @return count
*
* ********************************************************************/
-uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
+uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
{
- uint8_t count = 0;
+ uint8_t idx = 0, count = 0, ueIdx=0;
- if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
+ if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
count++;
}
- if(dlInfo->rarAlloc != NULLP)
+ if(dlSlot->pageAllocInfo)
{
count++;
}
- if(dlInfo->dlMsgAlloc != NULLP)
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
{
- count++;
+ if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && \
+ ((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU)))
+ count++;
+
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ for(idx=0; idx<dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
+ {
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH || \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU)
+ count++;
+ }
+ }
}
return count;
}
+
/***********************************************************************
*
* @brief fills the SIB1 TX-DATA request message
*
* ********************************************************************/
uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
- PdschCfg pdschCfg)
+ PdschCfg *pdschCfg)
{
uint32_t payloadSize = 0;
uint8_t *sib1Payload = NULLP;
pduDesc[pduIndex].num_tlvs = 1;
/* fill the TLV */
- payloadSize = pdschCfg.codeword[0].tbSize;
+ payloadSize = pdschCfg->codeword[0].tbSize;
pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
LWR_MAC_ALLOC(sib1Payload, payloadSize);
#ifdef INTEL_WLS_MEM
mtGetWlsHdl(&wlsHdlr);
- pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, sib1Payload);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
#else
pduDesc[pduIndex].tlvs[0].value = sib1Payload;
#endif
return ROK;
}
+/***********************************************************************
+ *
+ * @brief fills the PAGE TX-DATA request message
+ *
+ * @details
+ *
+ * Function : fillPageTxDataReq
+ *
+ * Functionality:
+ * - fills the Page TX-DATA request message
+ *
+ * @params[in] fapi_tx_pdu_desc_t *pduDesc
+ * @params[in] macCellCfg consist of SIB1 pdu
+ * @params[in] uint32_t *msgLen
+ * @params[in] uint16_t pduIndex
+ * @return ROK
+ *
+ * ********************************************************************/
+uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo,
+ PdschCfg pdschCfg)
+{
+ uint32_t payloadSize = 0;
+ uint8_t *pagePayload = NULLP;
+ fapi_api_queue_elem_t *payloadElem = NULLP;
+#ifdef INTEL_WLS_MEM
+ void * wlsHdlr = NULLP;
+#endif
+
+ pduDesc[pduIndex].pdu_index = pduIndex;
+ pduDesc[pduIndex].num_tlvs = 1;
+
+ /* fill the TLV */
+ payloadSize = pdschCfg.codeword[0].tbSize;
+ pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
+ pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
+ LWR_MAC_ALLOC(pagePayload, payloadSize);
+ if(pagePayload == NULLP)
+ {
+ return RFAILED;
+ }
+ payloadElem = (fapi_api_queue_elem_t *)pagePayload;
+ FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
+ pageAllocInfo->dlPagePduLen);
+ memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->dlPagePdu, pageAllocInfo->dlPagePduLen);
+
+#ifdef INTEL_WLS_MEM
+ mtGetWlsHdl(&wlsHdlr);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
+#else
+ pduDesc[pduIndex].tlvs[0].value = pagePayload;
+#endif
+ pduDesc[pduIndex].pdu_length = payloadSize;
+
+#ifdef INTEL_WLS_MEM
+ addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
+#else
+ LWR_MAC_FREE(pagePayload, payloadSize);
+#endif
+
+ return ROK;
+}
+
/***********************************************************************
*
* @brief fills the RAR TX-DATA request message
#ifdef INTEL_WLS_MEM
mtGetWlsHdl(&wlsHdlr);
- pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, rarPayload);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
#else
pduDesc[pduIndex].tlvs[0].value = rarPayload;
#endif
#ifdef INTEL_WLS_MEM
mtGetWlsHdl(&wlsHdlr);
- pduDesc[pduIndex].tlvs[0].value = WLS_VA2PA(wlsHdlr, dlMsgPayload);
+ pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
#else
pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
#endif
* RFAILED - failure
*
* ****************************************************************/
-uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
+uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
+#endif
+
#ifdef INTEL_FAPI
uint8_t idx =0;
uint8_t nPdu = 0;
uint8_t numPduEncoded = 0;
+ uint8_t ueIdx;
uint16_t cellIdx =0;
uint16_t pduIndex = 0;
- SlotIndInfo dlTtiReqTimingInfo;
+ SlotTimingInfo dlTtiReqTimingInfo;
MacDlSlot *currDlSlot = NULLP;
MacCellCfg macCellCfg;
RntiType rntiType;
p_fapi_api_queue_elem_t dlTtiElem;
p_fapi_api_queue_elem_t headerElem;
p_fapi_api_queue_elem_t prevElem;
-
if(lwrMacCb.phyState == PHY_STATE_RUNNING)
{
- GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
- /* consider phy delay */
- ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL);
- dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
-
- macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
-
- currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
-
- LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
- if(dlTtiElem)
- {
- FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
- sizeof(fapi_dl_tti_req_t));
-
- /* Fill message header */
- LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
- if(!headerElem)
- {
- DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
- LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
- return RFAILED;
- }
- FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
- sizeof(fapi_msg_header_t));
- msgHeader = (fapi_msg_header_t *)(headerElem + 1);
- msgHeader->num_msg = 1;
- msgHeader->handle = 0;
-
- /* Fill Dl TTI Request */
- dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
- memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
- fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
-
- dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
- dlTtiReq->slot = dlTtiReqTimingInfo.slot;
- dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
- nPdu = dlTtiReq->nPdus;
- dlTtiReq->nGroup = 0;
- if(dlTtiReq->nPdus > 0)
- {
- if(currDlSlot->dlInfo.isBroadcastPres)
- {
- if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
- {
- if(dlTtiReq->pdus != NULLP)
- {
- for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
- {
- fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
- currDlSlot, idx, dlTtiReq->sfn);
- numPduEncoded++;
- }
- }
- DU_LOG("\033[1;31m");
- DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
- DU_LOG("\033[0m");
- }
- if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
- {
- /* Filling SIB1 param */
- if(numPduEncoded != nPdu)
- {
- rntiType = SI_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
- rntiType, CORESET_TYPE0);
- numPduEncoded++;
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
- &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
- currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
- pduIndex);
- dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
- pduIndex++;
- numPduEncoded++;
- }
-
- DU_LOG("\033[1;34m");
- DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
- DU_LOG("\033[0m");
- }
- }
- if(currDlSlot->dlInfo.rarAlloc != NULLP)
- {
- /* Filling RAR param */
- rntiType = RA_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
- &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
- numPduEncoded++;
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
- &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
- currDlSlot->dlInfo.rarAlloc->bwp,
- pduIndex);
- numPduEncoded++;
- pduIndex++;
-
- DU_LOG("\033[1;32m");
- DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
- DU_LOG("\033[0m");
- }
- if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
- {
- if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
- {
- /* Filling Msg4 param */
- DU_LOG("\033[1;32m");
- if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
- {
- rntiType = TC_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
- &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
- DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
- }
- else
- {
- /* Filling other DL msg params */
- rntiType = C_RNTI_TYPE;
- fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
- &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
- DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
- }
- DU_LOG("\033[0m");
-
- numPduEncoded++;
- fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
- &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
- currDlSlot->dlInfo.dlMsgAlloc->bwp,
- pduIndex);
- numPduEncoded++;
- pduIndex++;
- }
- else
- {
- MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
- currDlSlot->dlInfo.dlMsgAlloc = NULLP;
- }
- }
-
- dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
- dlTtiReq->nGroup++;
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ /* consider phy delay */
+ ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA_DL, macCb.macCell[cellIdx]->numOfSlots);
+ dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
+
+ macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
+
+ currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
+
+ /* Vendor Message */
+ fapi_vendor_msg_t *vendorMsg;
+ p_fapi_api_queue_elem_t vendorMsgQElem;
+ /* Allocte And fill Vendor msg */
+ LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
+ if(!vendorMsgQElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
+ return RFAILED;
+ }
+ FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
+ vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
+ fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
+
+ LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
+ if(dlTtiElem)
+ {
+ FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
+ sizeof(fapi_dl_tti_req_t));
+ /* Fill message header */
+ LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
+ if(!headerElem)
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
+ LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
+ return RFAILED;
+ }
+
+ FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
+ sizeof(fapi_msg_header_t));
+ msgHeader = (fapi_msg_header_t *)(headerElem + 1);
+ msgHeader->num_msg = 2;
+ msgHeader->handle = 0;
+
+ /* Fill Dl TTI Request */
+ dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
+ memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
+ fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
+
+ dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
+ dlTtiReq->slot = dlTtiReqTimingInfo.slot;
+ dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */
+ nPdu = dlTtiReq->nPdus;
+
+ vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
+ vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
+
+ dlTtiReq->nGroup = 0;
+ if(dlTtiReq->nPdus > 0)
+ {
+ if(currDlSlot->dlInfo.isBroadcastPres)
+ {
+ if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
+ {
+ if(dlTtiReq->pdus != NULLP)
+ {
+ for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
+ {
+ fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
+ currDlSlot, idx, dlTtiReq->sfn);
+ numPduEncoded++;
+ }
+ }
+ DU_LOG("\033[1;31m");
+ DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
+ DU_LOG("\033[0m");
+ }
+
+ if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
+ {
+ /* Filling SIB1 param */
+ if(numPduEncoded != nPdu)
+ {
+ if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
+ rntiType = SI_RNTI_TYPE;
+
+ /* PDCCH PDU */
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
+ numPduEncoded++;
+
+ /* PDSCH PDU */
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg,
+ currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
+ pduIndex);
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
+ pduIndex++;
+ numPduEncoded++;
+ }
+ DU_LOG("\033[1;34m");
+ DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
+ DU_LOG("\033[0m");
+ }
+ }
+
+ if(currDlSlot->pageAllocInfo != NULLP)
+ {
+ /* Filling DL Paging Alloc param */
+ if(numPduEncoded != nPdu)
+ {
+ rntiType = P_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], currDlSlot, -1, \
+ rntiType, CORESET_TYPE0, MAX_NUM_UE);
+ numPduEncoded++;
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ &currDlSlot->pageAllocInfo->pagePdschCfg,
+ currDlSlot->pageAllocInfo->bwp,
+ pduIndex);
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
+ pduIndex++;
+ numPduEncoded++;
+ }
+ DU_LOG("\033[1;34m");
+ DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
+ DU_LOG("\033[0m");
+ }
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
+ {
+ if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ /* Filling RAR param */
+ rntiType = RA_RNTI_TYPE;
+ if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
+ (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDCCH_PDU))
+ {
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
+ numPduEncoded++;
+ }
+ if((currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || \
+ (currDlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
+ {
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ &currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
+ currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
+ pduIndex);
+ numPduEncoded++;
+ pduIndex++;
+
+ DU_LOG("\033[1;32m");
+ DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
+ DU_LOG("\033[0m");
+ }
+ }
+
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ for(idx=0; idx<currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; idx++)
+ {
+ /* Filling Msg4 param */
+ if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
+ (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDCCH_PDU))
+ {
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
+ {
+ rntiType = TC_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot, idx, rntiType, CORESET_TYPE0, ueIdx);
+ }
+ else
+ {
+ /* Filling other DL msg params */
+ rntiType = C_RNTI_TYPE;
+ fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
+ currDlSlot, idx, rntiType, CORESET_TYPE1, ueIdx);
+ }
+ numPduEncoded++;
+ }
+
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.dlMsgPdu != NULLP)
+ {
+ if((currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == BOTH) || \
+ (currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].pduPres == PDSCH_PDU))
+ {
+ fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
+ &currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgPdschCfg,\
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].bwp, pduIndex);
+ numPduEncoded++;
+ pduIndex++;
+
+ DU_LOG("\033[1;32m");
+ if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[idx].dlMsgInfo.isMsg4Pdu)
+ {
+ DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
+ }
+ else
+ {
+ DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
+ }
+ DU_LOG("\033[0m");
+ }
+
+ }
+ /* else
+ {
+ MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
+ currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
+ }
+ */
+ }
+ }
+ }
+
+ dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
+ dlTtiReq->nGroup++;
#ifdef ODU_SLOT_IND_DEBUG_LOG
- DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
#endif
- /* Intel L1 expects UL_TTI.request following DL_TTI.request */
- fillUlTtiReq(currTimingInfo, dlTtiElem);
- msgHeader->num_msg++;
-
- /* Intel L1 expects UL_DCI.request following DL_TTI.request */
- fillUlDciReq(currTimingInfo, dlTtiElem->p_next);
- msgHeader->num_msg++;
-
- /* send Tx-DATA req message */
- sendTxDataReq(dlTtiReqTimingInfo, &currDlSlot->dlInfo, dlTtiElem->p_next->p_next);
- if(dlTtiElem->p_next->p_next->p_next)
- {
- msgHeader->num_msg++;
- prevElem = dlTtiElem->p_next->p_next->p_next;
- }
- else
- prevElem = dlTtiElem->p_next->p_next;
- }
- else
- {
+ /* Intel L1 expects UL_TTI.request following DL_TTI.request */
+ fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
+ msgHeader->num_msg++;
+
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
+ msgHeader->num_msg++;
+
+ /* send Tx-DATA req message */
+ sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
+ if(dlTtiElem->p_next->p_next->p_next)
+ {
+ msgHeader->num_msg++;
+ prevElem = dlTtiElem->p_next->p_next->p_next;
+ }
+ else
+ prevElem = dlTtiElem->p_next->p_next;
+ }
+ else
+ {
#ifdef ODU_SLOT_IND_DEBUG_LOG
- DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
#endif
-
- /* Intel L1 expects UL_TTI.request following DL_TTI.request */
- fillUlTtiReq(currTimingInfo, dlTtiElem);
- msgHeader->num_msg++;
-
- /* Intel L1 expects UL_DCI.request following DL_TTI.request */
- fillUlDciReq(currTimingInfo, dlTtiElem->p_next);
- msgHeader->num_msg++;
-
- prevElem = dlTtiElem->p_next->p_next;
- }
-
- if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
- {
- /* Intel L1 expects UL_DCI.request following DL_TTI.request */
- lwr_mac_procStopReqEvt(currTimingInfo, prevElem);
- msgHeader->num_msg++;
- macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
- }
- LwrMacSendToL1(headerElem);
- memset(currDlSlot, 0, sizeof(MacDlSlot));
- return ROK;
- }
- else
- {
- DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
- memset(currDlSlot, 0, sizeof(MacDlSlot));
- return RFAILED;
- }
+ /* Intel L1 expects UL_TTI.request following DL_TTI.request */
+ fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
+ msgHeader->num_msg++;
+
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
+ msgHeader->num_msg++;
+
+ prevElem = dlTtiElem->p_next->p_next;
+ }
+
+ if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
+ {
+ /* Intel L1 expects UL_DCI.request following DL_TTI.request */
+ lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
+ msgHeader->num_msg++;
+ macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
+ prevElem = prevElem->p_next;
+ }
+ prevElem->p_next = vendorMsgQElem;
+ LwrMacSendToL1(headerElem);
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return ROK;
+ }
+ else
+ {
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return RFAILED;
+ }
}
else
{
- lwr_mac_procInvalidEvt(&currTimingInfo);
- return RFAILED;
+ lwr_mac_procInvalidEvt(&currTimingInfo);
+ return RFAILED;
}
#endif
return ROK;
* RFAILED - failure
*
* ****************************************************************/
-uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo, p_fapi_api_queue_elem_t prevElem)
+uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
{
#ifdef INTEL_FAPI
- uint8_t nPdu = 0;
- uint16_t cellIdx;
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
+#endif
+
+ uint8_t nPdu = 0;
+ uint8_t ueIdx=0;
+ uint8_t schInfoIdx = 0;
+ uint16_t cellIdx=0;
uint16_t pduIndex = 0;
fapi_tx_data_req_t *txDataReq =NULLP;
p_fapi_api_queue_elem_t txDataElem = 0;
GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
/* send TX_Data request message */
- nPdu = calcTxDataReqPduCount(dlInfo);
+ nPdu = calcTxDataReqPduCount(dlSlot);
if(nPdu > 0)
{
LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
if(txDataElem == NULLP)
{
- DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
- return RFAILED;
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
+ return RFAILED;
}
FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
- sizeof(fapi_tx_data_req_t));
+ sizeof(fapi_tx_data_req_t));
txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
+ vendorTxDataReq->sym = 0;
+
txDataReq->sfn = currTimingInfo.sfn;
txDataReq->slot = currTimingInfo.slot;
- if(dlInfo->brdcstAlloc.sib1Trans)
- {
- fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
- dlInfo->brdcstAlloc.sib1Alloc.sib1PdschCfg);
- pduIndex++;
- txDataReq->num_pdus++;
- }
- if(dlInfo->rarAlloc != NULLP)
+ if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
{
- fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlInfo->rarAlloc->rarInfo,\
- dlInfo->rarAlloc->rarPdschCfg);
- pduIndex++;
- txDataReq->num_pdus++;
-
- MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
- dlInfo->rarAlloc = NULLP;
+ fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
+ dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg.dci.pdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
}
- if(dlInfo->dlMsgAlloc != NULLP)
+ if(dlSlot->pageAllocInfo != NULLP)
{
- fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, &dlInfo->dlMsgAlloc->dlMsgInfo,\
- dlInfo->dlMsgAlloc->dlMsgPdschCfg);
+ fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo, \
+ dlSlot->pageAllocInfo->pagePdschCfg);
pduIndex++;
txDataReq->num_pdus++;
+ MAC_FREE(dlSlot->pageAllocInfo->dlPagePdu, sizeof(dlSlot->pageAllocInfo->dlPagePduLen));
+ MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
+ }
+
+ for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
+ {
+ if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
+ {
+ if((dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == BOTH) || (dlSlot->dlInfo.rarAlloc[ueIdx]->pduPres == PDSCH_PDU))
+ {
+ fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
+ dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ }
+ MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
+ }
- MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
- dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
- dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
- MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
- dlInfo->dlMsgAlloc = NULLP;
+ if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
+ {
+ for(schInfoIdx=0; schInfoIdx < dlSlot->dlInfo.dlMsgAlloc[ueIdx]->numSchedInfo; schInfoIdx++)
+ {
+ if((dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == BOTH) || \
+ (dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].pduPres == PDSCH_PDU))
+ {
+ fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
+ &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo, \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgPdschCfg);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ }
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu, \
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPduLen);
+ dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgSchedInfo[schInfoIdx].dlMsgInfo.dlMsgPdu = NULLP;
+ }
+ MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
+ }
}
/* Fill message header */
* RFAILED - failure
*
* ****************************************************************/
-void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
+void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
{
if(ulTtiReqPdu != NULLP)
{
ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
- currUlSlot->ulInfo.schPuschInfo.resAllocType;
+ currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAllocType;
ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
- currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
+ currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.startPrb;
ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
- currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
+ currUlSlot->ulInfo.schPuschInfo.fdAlloc.resAlloc.type1.numPrb;
ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
+#ifdef INTEL_FAPI
ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
+#endif
ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
+
+ /* UL TTI Vendor PDU */
+ ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
+ ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
+ ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
+ for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
+ {
+ ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
+ }
}
}
* RFAILED - failure
*
* ****************************************************************/
-void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
+void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
MacUlSlot *currUlSlot)
{
if(ulTtiReqPdu != NULLP)
{
ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
- ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
+ ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.crnti;
/* TODO : Fill handle in raCb when scheduling pucch and access here */
ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
- ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
- ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.startPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.resAlloc.type1.numPrb;
ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = currUlSlot->ulInfo.schPucchInfo.intraFreqHop;
ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = currUlSlot->ulInfo.schPucchInfo.timeDomOCC;
ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = currUlSlot->ulInfo.schPucchInfo.occIdx; /* Valid for Format 4 only */
ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = currUlSlot->ulInfo.schPucchInfo.occLen; /* Valid for Format 4 only */
- ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.pi2BPSK;
- ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.cmnFormatCfg.addDmrs;/* Valid for Format 3, 4 only */
+ ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = currUlSlot->ulInfo.schPucchInfo.pi2BPSK;
+ ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = currUlSlot->ulInfo.schPucchInfo.addDmrs;/* Valid for Format 3, 4 only */
ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
- ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.harqInfo.harqBitLength;
ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
- ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
- ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
- ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
- ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.numPrgs;
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prgSize;
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.digBfInterfaces;
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = currUlSlot->ulInfo.schPucchInfo.beamPucchInfo.prg[0].beamIdx[0];
ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
+
+ /* UL TTI Vendor PDU */
+ ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
+ ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
+ ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
+ for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
+ {
+ ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
+ }
}
}
* RFAILED - failure
*
******************************************************************/
-uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
+uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
+#endif
+
#ifdef INTEL_FAPI
uint16_t cellIdx =0;
uint8_t pduIdx = -1;
- SlotIndInfo ulTtiReqTimingInfo;
+ SlotTimingInfo ulTtiReqTimingInfo;
MacUlSlot *currUlSlot = NULLP;
MacCellCfg macCellCfg;
fapi_ul_tti_req_t *ulTtiReq = NULLP;
macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
/* add PHY delta */
- ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL);
- currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOTS];
+ ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA_UL, macCb.macCell[cellIdx]->numOfSlots);
+ currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
if(ulTtiElem)
{
- FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
- sizeof(fapi_ul_tti_req_t));
- ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
- memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
- fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
- ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
- ulTtiReq->slot = ulTtiReqTimingInfo.slot;
- ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
- ulTtiReq->nGroup = 0;
- if(ulTtiReq->nPdus > 0)
- {
- /* Fill Prach Pdu */
- if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
- {
- pduIdx++;
- fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
- }
-
- /* Fill PUSCH PDU */
- if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
- {
- pduIdx++;
- fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
- }
- /* Fill PUCCH PDU */
- if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
- {
- pduIdx++;
- fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
- }
- }
+ FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
+ sizeof(fapi_ul_tti_req_t));
+ ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
+ memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
+ fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
+ ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
+ ulTtiReq->slot = ulTtiReqTimingInfo.slot;
+ ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
+ vendorUlTti->num_ul_pdu = ulTtiReq->nPdus;
+ vendorUlTti->sym = 0;
+ ulTtiReq->nGroup = 0;
+ if(ulTtiReq->nPdus > 0)
+ {
+ /* Fill Prach Pdu */
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
+ {
+ pduIdx++;
+ fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
+ ulTtiReq->rachPresent++;
+ }
+
+ /* Fill PUSCH PDU */
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
+ {
+ pduIdx++;
+ fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
+ ulTtiReq->nUlsch++;
+ }
+ /* Fill PUCCH PDU */
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
+ {
+ pduIdx++;
+ fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, currUlSlot);
+ ulTtiReq->nUlcch++;
+ }
+ }
#ifdef ODU_SLOT_IND_DEBUG_LOG
- DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
+ DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
#endif
- prevElem->p_next = ulTtiElem;
+ prevElem->p_next = ulTtiElem;
- memset(currUlSlot, 0, sizeof(MacUlSlot));
- return ROK;
+ memset(currUlSlot, 0, sizeof(MacUlSlot));
+ return ROK;
}
else
{
- DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
- memset(currUlSlot, 0, sizeof(MacUlSlot));
- return RFAILED;
+ DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
+ memset(currUlSlot, 0, sizeof(MacUlSlot));
+ return RFAILED;
}
}
else
{
- lwr_mac_procInvalidEvt(&currTimingInfo);
+ lwr_mac_procInvalidEvt(&currTimingInfo);
}
#endif
return ROK;
******************************************************************/
void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
{
+#ifdef CALL_FLOW_DEBUG_LOG
+ DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
+#endif
if(ulDciPtr != NULLP)
{
uint8_t numBytes =0;
ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
- ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
+ ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
/* Calculating freq domain resource allocation field value and size
* RBLen = length of contiguously allocted RBs
* Spec 38.214 Sec 5.1.2.2.2
*/
- if(schDciInfo->formatType == FORMAT0_0)
+ if(schDciInfo->dciFormatInfo.formatType == FORMAT0_0)
{
coreset1Size = schDciInfo->coresetCfg.coreSetSize;
- rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
- rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
+ rbLen = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.numPrb;
+ rbStart = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.startPrb;
if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
{
freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
}
/* Fetching DCI field values */
- dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
- timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
- freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
- modNCodScheme = schDciInfo->format.format0_0.mcs;
- ndi = schDciInfo->format.format0_0.ndi;
- redundancyVer = schDciInfo->format.format0_0.rv;
- harqProcessNum = schDciInfo->format.format0_0.harqProcId;
- puschTpc = schDciInfo->format.format0_0.tpcCmd;
- ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
+ dciFormatId = schDciInfo->dciFormatInfo.formatType; /* DCI indentifier for UL DCI */
+ timeDomResAssign = schDciInfo->dciFormatInfo.format.format0_0.rowIndex;
+ freqHopFlag = schDciInfo->dciFormatInfo.format.format0_0.freqHopFlag;
+ modNCodScheme = schDciInfo->dciFormatInfo.format.format0_0.mcs;
+ ndi = schDciInfo->dciFormatInfo.format.format0_0.ndi;
+ redundancyVer = schDciInfo->dciFormatInfo.format.format0_0.rvIndex;
+ harqProcessNum = schDciInfo->dciFormatInfo.format.format0_0.harqProcId;
+ puschTpc = schDciInfo->dciFormatInfo.format.format0_0.tpcCmd;
+ ul_SlInd = schDciInfo->dciFormatInfo.format.format0_0.sulIndicator;
/* Reversing bits in each DCI field */
dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
* @return ROK
*
******************************************************************/
-uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
+uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
{
if(ulDciReqPdu != NULLP)
{
/* Calculating PDU length. Considering only one Ul dci pdu for now */
ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
+
+ /* Vendor UL DCI PDU */
+ vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
+ vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
+ vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
}
return ROK;
}
* RFAILED - failure
*
******************************************************************/
-uint16_t fillUlDciReq(SlotIndInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem)
+uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
{
#ifdef INTEL_FAPI
uint8_t cellIdx =0;
uint8_t numPduEncoded = 0;
- SlotIndInfo ulDciReqTimingInfo ={0};
+ SlotTimingInfo ulDciReqTimingInfo ={0};
MacDlSlot *currDlSlot = NULLP;
fapi_ul_dci_req_t *ulDciReq =NULLP;
p_fapi_api_queue_elem_t ulDciElem;
if(lwrMacCb.phyState == PHY_STATE_RUNNING)
{
GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
- memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
- currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOTS];
+ memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
+ currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
if(ulDciElem)
ulDciReq->slot = ulDciReqTimingInfo.slot;
if(currDlSlot->dlInfo.ulGrant != NULLP)
{
+ vendorUlDciReq->sym = 0;
ulDciReq->numPdus = 1; // No. of PDCCH PDUs
+ vendorUlDciReq->num_pdus = ulDciReq->numPdus;
if(ulDciReq->numPdus > 0)
{
/* Fill PDCCH configuration Pdu */
- fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
+ fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
numPduEncoded++;
/* free UL GRANT at SCH */
MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
- currDlSlot->dlInfo.ulGrant = NULLP;
}
#ifdef ODU_SLOT_IND_DEBUG_LOG
DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
lwrMacCb.event = msgType;
fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
}
+
/**********************************************************************
End of file
**********************************************************************/
Code Review / o-du / l2.git / blobdiff