--- /dev/null
+/*******************************************************************************
+################################################################################
+# Copyright (c) [2017-2019] [Radisys] #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+################################################################################
+*******************************************************************************/
+
+/* Contains definitions for MAC CL modules */
+#ifndef __LWR_MAC_H__
+#define __LWR_MAC_H__
+
+#define MAX_NUM_CELL_SUPP 1
+
+#include "envdep.h"
+#include "gen.h"
+#include "ssi.h"
+#include "cm_hash.h"
+
+#include "gen.x"
+#include "ssi.x"
+#include "cm_hash.x"
+#include "cm_lib.x"
+#include "lcl.h"
+
+typedef enum
+{
+ PHY_STATE_IDLE,
+ PHY_STATE_CONFIGURED,
+ PHY_STATE_RUNNING,
+ MAX_STATE
+}PhyState;
+
+/* Events in Lower Mac */
+typedef enum{
+ PARAM_REQ,
+ CONFIG_REQ = 2,
+ START_REQ = 4,
+ STOP_REQ,
+ MAX_EVENT
+}EventState;
+
+typedef struct clCb
+{
+ Region region;
+ Pool pool;
+ Bool clCfgDone; /* CL configuration done */
+ CmHashListCp cellCbLst; /* List of Cells configured */
+ U8 numOfCells; /* Number of Cells configured */
+ PhyState phyState; /* State of PHY */
+ EventState event; /* State of Event */
+}ClCb;
+
+typedef struct cellCb
+{
+ U16 cellId;
+ ClCellCfg cellCfg;
+ PhyState phyState;
+}ClCellCb;
+
+typedef enum
+{
+ RELEASE_15
+}ReleaseCapab;
+
+typedef enum
+{
+ NOT_SUPPORTED,
+ SUPPORTED
+}ParamSupport;
+
+typedef enum
+{
+ NORMAL_CYCLIC_PREFIX_MASK,
+ EXTENDED_CYCLIC_PREFIX_MASK
+}CyclicPrefix;
+
+typedef enum
+{
+ SPACING_15_KHZ,
+ SPACING_30_KHZ,
+ SPACING_60_KHZ,
+ SPACING_120_KHZ
+}SubCarrierSpacing;
+
+typedef enum
+{
+ BW_5MHZ,
+ BW_10MHZ,
+ BW_15MHZ,
+ BW_20MHZ,
+ BW_40MHZ,
+ BW_50MHZ,
+ BW_60MHZ,
+ BW_70MHZ,
+ BW_80MHZ,
+ BW_90MHZ,
+ BW_100MHZ,
+ BW_200MHZ,
+ BW_400MHZ
+}SupportedBandwidth;
+
+typedef enum
+{
+ CCE_MAPPING_INTERLEAVED_MASK,
+ CCE_MAPPING_NONINTERLVD_MASK
+}CCEMappingType;
+
+typedef enum
+{
+ FORMAT_0,
+ FORMAT_1,
+ FORMAT_2,
+ FORMAT_3,
+ FORMAT_4
+}Formats;
+
+typedef enum
+{
+ MAPPING_TYPE_A,
+ MAPPING_TYPE_B,
+}MappingType;
+
+typedef enum
+{
+ ALLOCATION_TYPE_0,
+ ALLOCATION_TYPE_1,
+}AllocationType;
+
+typedef enum
+{
+ VRB_TO_PRB_MAP_NON_INTLV,
+ VRB_TO_PRB_MAP_INTLVD
+}VrbToPrbMap;
+
+typedef enum
+{
+ DMRS_CONFIG_TYPE_1,
+ DMRS_CONFIG_TYPE_2
+}DmrsConfigType;
+
+typedef enum
+{
+ DMRS_MAX_LENGTH_1,
+ DMRS_MAX_LENGTH_2
+}DmrMaxLen;
+
+typedef enum
+{
+ DMRS_ADDITIONAL_POS_0,
+ DMRS_ADDITIONAL_POS_1,
+ DMRS_ADDITIONAL_POS_2,
+ DMRS_ADDITIONAL_POS_3
+}DmrsPos;
+
+typedef enum
+{
+ MOD_QPSK,
+ MOD_16QAM,
+ MOD_64QAM,
+ MOD_256QAM
+}ModulationOrder;
+
+typedef enum
+{
+ AGG_FACTOR_1,
+ AGG_FACTOR_2,
+ AGG_FACTOR_4,
+ AGG_FACTOR_8
+}AggregationFactor;
+
+typedef enum
+{
+ SF_FORMAT_A1,
+ SF_FORMAT_A2,
+ SF_FORMAT_A3,
+ SF_FORMAT_B1,
+ SF_FORMAT_B2,
+ SF_FORMAT_B3,
+ SF_FORMAT_B4,
+ SF_FORMAT_C0,
+ SF_FORMAT_C2
+}ShortFormat;
+
+typedef enum
+{
+ PRACH_FD_OCC_IN_A_SLOT_1 = 1,
+ PRACH_FD_OCC_IN_A_SLOT_2 = 2,
+ PRACH_FD_OCC_IN_A_SLOT_4 = 4,
+ PRACH_FD_OCC_IN_A_SLOT_8 = 8
+}FdOccPerSlot;
+
+typedef enum
+{
+ RSSI_REPORT_DBM,
+ RSSI_REPORT_DBFS
+}RssiMeasurement;
+
+typedef struct clCellParam
+{
+ ReleaseCapab releaseCapability; /* Release Capability */
+ PhyState ParamPhystate;
+ ParamSupport skipBlankDlConfig;
+ ParamSupport skipBlankUlConfig;
+ ParamSupport numTlvsToReport;
+ CyclicPrefix cyclicPrefix;
+ SubCarrierSpacing supportedSubcarrierSpacingDl;
+ SupportedBandwidth supportedBandwidthDl;
+ SubCarrierSpacing supportedSubcarrierSpacingsUl;
+ SupportedBandwidth supportedBandwidthUl;
+ CCEMappingType cceMappingType;
+ ParamSupport coresetOutsideFirst3OfdmSymsOfSlot;
+ ParamSupport precoderGranularityCoreset;
+ ParamSupport pdcchMuMimo;
+ ParamSupport pdcchPrecoderCycling;
+ U8 maxPdcchsPerSlot;
+ Formats pucchFormats;
+ U8 maxPucchsPerSlot;
+ MappingType pdschMappingType;
+ AllocationType pdschAllocationTypes;
+ VrbToPrbMap pdschVrbToPrbMapping;
+ ParamSupport pdschCbg;
+ DmrsConfigType pdschDmrsConfigTypes;
+ DmrMaxLen pdschDmrsMaxLength;
+ DmrsPos pdschDmrsAdditionalPos;
+ U8 maxPdschsTBsPerSlot;
+ U8 maxNumberMimoLayersPdsch;
+ ModulationOrder supportedMaxModulationOrderDl;
+ U8 maxMuMimoUsersDl;
+ ParamSupport pdschDataInDmrsSymbols;
+ ParamSupport premptionSupport;
+ ParamSupport pdschNonSlotSupport;
+ ParamSupport uciMuxUlschInPusch;
+ ParamSupport uciOnlyPusch;
+ ParamSupport puschFrequencyHopping;
+ DmrsConfigType puschDmrsConfigTypes;
+ DmrMaxLen puschDmrsMaxLength;
+ DmrsPos puschDmrsAdditionalPos;
+ ParamSupport puschCbg;
+ MappingType puschMappingType;
+ AllocationType puschAllocationTypes;
+ VrbToPrbMap puschVrbToPrbMapping;
+ U8 puschMaxPtrsPorts;
+ U8 maxPduschsTBsPerSlot;
+ U8 maxNumberMimoLayersNonCbPusch;
+ ModulationOrder supportedModulationOrderUl;
+ U8 maxMuMimoUsersUl;
+ ParamSupport dftsOfdmSupport;
+ AggregationFactor puschAggregationFactor;
+ Formats prachLongFormats;
+ ShortFormat prachShortFormats;
+ ParamSupport prachRestrictedSets;
+ FdOccPerSlot maxPrachFdOccasionsInASlot;
+ RssiMeasurement rssiMeasurementSupport;
+}ClCellParam;
+
+
+EXTERN ClCb clGlobalCp;
+EXTERN ClCellCb * rgClUtlGetCellCb ARGS((U16 cellId));
+
+#endif
+
+/**********************************************************************
+ End of file
+**********************************************************************/
Code Review / o-du / l2.git / blobdiff