[Epic-ID: ODUHIGH-538] XML based input configuration
[o-du/l2.git] / build / config / odu_config.xml
diff --git a/build/config/odu_config.xml b/build/config/odu_config.xml
new file mode 100644 (file)
index 0000000..97f7b9d
--- /dev/null
@@ -0,0 +1,681 @@
+<?xml version="1.0" encoding="UTF-8"?>
+
+<DU_CFG_PARAMS xmlns = "odu_config.xml">
+   <DU_ID>1</DU_ID>
+   <DU_NAME>ORAN OAM DU</DU_NAME>
+   <MAX_NUM_DRB>29</MAX_NUM_DRB>
+   <MAX_NUM_UE_SUPPORTED>3</MAX_NUM_UE_SUPPORTED>
+   <MAX_NUM_UE>32</MAX_NUM_UE>
+   <DU_IP_V4_ADDR>192.168.130.71</DU_IP_V4_ADDR>
+   <CU_IP_V4_ADDR>192.168.130.72</CU_IP_V4_ADDR>
+   <RIC_IP_V4_ADDR>192.168.130.70</RIC_IP_V4_ADDR>
+   <SCTP>
+      <F1_SCTP_PORT>38472</F1_SCTP_PORT>
+      <E2_SCTP_PORT>36421</E2_SCTP_PORT>
+      <MAX_DU_PORT>2</MAX_DU_PORT>
+   </SCTP>
+   <EGTP>
+      <LOCAL_F1_EGTP_PORT>2152</LOCAL_F1_EGTP_PORT>
+      <DEST_F1_EGTP_PORT>2152</DEST_F1_EGTP_PORT>
+      <MIN_TEID>1</MIN_TEID>
+   </EGTP>
+   <F1_DU_SRVD_CELL_INFO>
+      <F1_DU_CELL_INFO>
+         <F1_CELL_INFO>
+            <NR_CGI>
+               <CELL_ID>1</CELL_ID>
+               <PLMN>
+                  <MCC>
+                     <PLMN_MCC0>3</PLMN_MCC0>
+                     <PLMN_MCC1>1</PLMN_MCC1>
+                     <PLMN_MCC2>1</PLMN_MCC2>
+                  </MCC>
+                  <MNC>
+                     <PLMN_MNC0>4</PLMN_MNC0>
+                     <PLMN_MNC1>8</PLMN_MNC1>
+                     <PLMN_MNC2>0</PLMN_MNC2>
+                 </MNC>
+               </PLMN>
+            </NR_CGI>
+            <NR_PCI>1</NR_PCI>
+            <F1_SRVD_PLMN>
+               <PLMN>
+                  <MCC>
+                     <PLMN_MCC0>3</PLMN_MCC0>
+                     <PLMN_MCC1>1</PLMN_MCC1>
+                     <PLMN_MCC2>1</PLMN_MCC2>
+                  </MCC>
+                  <MNC>
+                     <PLMN_MNC0>4</PLMN_MNC0>
+                     <PLMN_MNC1>8</PLMN_MNC1>
+                     <PLMN_MNC2>0</PLMN_MNC2>
+                  </MNC>
+               </PLMN>
+               <EXT_PLMN>
+                  <MCC>
+                     <PLMN_MCC0>3</PLMN_MCC0>
+                     <PLMN_MCC1>1</PLMN_MCC1>
+                     <PLMN_MCC2>1</PLMN_MCC2>
+                  </MCC>
+                  <MNC>
+                     <PLMN_MNC0>4</PLMN_MNC0>
+                     <PLMN_MNC1>8</PLMN_MNC1>
+                     <PLMN_MNC2>0</PLMN_MNC2>
+                  </MNC>
+               </EXT_PLMN>
+               <F1_SLICE_SUPP_LST>
+                  <NUM_SUPPORT_SLICE>2</NUM_SUPPORT_SLICE>
+                  <SNSSAI_LIST>
+                     <NUM_NSSAI>2</NUM_NSSAI>
+                     <LIST>
+                     <SNSSAI>
+                        <SST>1</SST>
+                        <SD_SIZE>
+                        <SD>2</SD>
+                        <SD>3</SD>
+                        <SD>4</SD>
+                        </SD_SIZE>
+                     </SNSSAI>
+                     <SNSSAI>
+                        <SST>5</SST>
+                        <SD_SIZE>
+                        <SD>6</SD>
+                        <SD>7</SD>
+                        <SD>8</SD>
+                        </SD_SIZE>
+                     </SNSSAI>
+                     </LIST>
+                  </SNSSAI_LIST>
+               </F1_SLICE_SUPP_LST>
+            </F1_SRVD_PLMN>
+         </F1_CELL_INFO>
+         <TAC>1</TAC>
+         <EPS_TAC>1</EPS_TAC>
+         <NR_MODE_INFO>
+            <NR_MODE>FDD</NR_MODE>
+            <F1_NR_FDD_INFO>
+               <F1_NR_FREQ_INFO_UL>
+                  <NR_ARFCN>390000</NR_ARFCN>
+                  <F1_SUL_INFO>
+                     <SUL_ARFCN>100</SUL_ARFCN>
+                     <F1_TX_BW>
+                        <F1_NR_SCS>0</F1_NR_SCS>
+                        <F1_NRB>14</F1_NRB>
+                     </F1_TX_BW>
+                  </F1_SUL_INFO>
+                  <F1_FREQ_BAND_LIST>
+                     <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
+                     <LIST>
+                     <F1_FREQ_BAND>
+                        <NR_FREQ_BAND>1</NR_FREQ_BAND>
+                        <SUL_BAND_LIST>
+                        <LIST>
+                           <SUL_BAND>2</SUL_BAND>
+                        </LIST>
+                        </SUL_BAND_LIST>
+                     </F1_FREQ_BAND>
+                     </LIST>
+                  </F1_FREQ_BAND_LIST>
+               </F1_NR_FREQ_INFO_UL>
+               <F1_NR_FREQ_INFO_DL>
+                  <NR_ARFCN>428000</NR_ARFCN>
+                  <F1_SUL_INFO>
+                     <SUL_ARFCN>100</SUL_ARFCN>
+                     <F1_TX_BW>
+                        <F1_NR_SCS>0</F1_NR_SCS>
+                        <F1_NRB>14</F1_NRB>
+                     </F1_TX_BW>
+                  </F1_SUL_INFO>
+                  <F1_FREQ_BAND_LIST>
+                     <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
+                     <LIST>
+                     <F1_FREQ_BAND>
+                        <NR_FREQ_BAND>1</NR_FREQ_BAND>
+                        <SUL_BAND_LIST>
+                        <LIST>
+                           <SUL_BAND>2</SUL_BAND>
+                        </LIST>
+                        </SUL_BAND_LIST>
+                     </F1_FREQ_BAND>
+                     </LIST>
+                  </F1_FREQ_BAND_LIST>
+               </F1_NR_FREQ_INFO_DL>
+               <F1_TX_BW_UL>
+                  <F1_NR_SCS>0</F1_NR_SCS>
+                  <F1_NRB>14</F1_NRB>
+               </F1_TX_BW_UL>
+               <F1_TX_BW_DL>
+                  <F1_NR_SCS>0</F1_NR_SCS>
+                  <F1_NRB>14</F1_NRB>
+               </F1_TX_BW_DL>
+            </F1_NR_FDD_INFO>
+            <F1_NR_TDD_INFO>
+               <F1_NR_FREQ_INFO>
+                  <NR_ARFCN>623400</NR_ARFCN>
+                  <F1_SUL_INFO>
+                     <SUL_ARFCN>100</SUL_ARFCN>
+                     <F1_TX_BW>
+                        <F1_NR_SCS>1</F1_NR_SCS>
+                        <F1_NRB>28</F1_NRB>
+                     </F1_TX_BW>
+                  </F1_SUL_INFO>
+                  <F1_FREQ_BAND_LIST>
+                     <MAX_NRCELL_BANDS>2</MAX_NRCELL_BANDS>
+                     <LIST>
+                     <F1_FREQ_BAND>
+                        <NR_FREQ_BAND>78</NR_FREQ_BAND>
+                        <SUL_BAND_LIST>
+                        <LIST>
+                              <SUL_BAND>2</SUL_BAND>
+                        </LIST>
+                        </SUL_BAND_LIST>
+                     </F1_FREQ_BAND>
+                     </LIST>
+                  </F1_FREQ_BAND_LIST>
+               </F1_NR_FREQ_INFO>
+               <F1_TX_BW>
+                  <F1_NR_SCS>1</F1_NR_SCS>
+                  <F1_NRB>28</F1_NRB>
+               </F1_TX_BW>
+            </F1_NR_TDD_INFO>
+         </NR_MODE_INFO>
+         <TIME_CFG>4</TIME_CFG>
+         <F1_CELL_DIR>2</F1_CELL_DIR>
+         <F1_CELL_TYPE>1</F1_CELL_TYPE>
+         <F1_BRDCST_PLMN_INFO>
+            <PLMN>
+               <MCC>
+                  <PLMN_MCC0>3</PLMN_MCC0>
+                  <PLMN_MCC1>1</PLMN_MCC1>
+                  <PLMN_MCC2>1</PLMN_MCC2>
+               </MCC>
+               <MNC>
+                  <PLMN_MNC0>4</PLMN_MNC0>
+                  <PLMN_MNC1>8</PLMN_MNC1>
+                  <PLMN_MNC2>0</PLMN_MNC2>
+               </MNC>
+            </PLMN>
+            <EXT_PLMN>
+               <MCC>
+                  <PLMN_MCC0>3</PLMN_MCC0>
+                  <PLMN_MCC1>1</PLMN_MCC1>
+                  <PLMN_MCC2>1</PLMN_MCC2>
+               </MCC>
+               <MNC>
+                  <PLMN_MNC0>4</PLMN_MNC0>
+                  <PLMN_MNC1>8</PLMN_MNC1>
+                  <PLMN_MNC2>0</PLMN_MNC2>
+               </MNC>
+            </EXT_PLMN>
+            <TAC>1</TAC>
+            <NR_CELL_ID>1</NR_CELL_ID>
+            <NR_RANAC>150</NR_RANAC>
+         </F1_BRDCST_PLMN_INFO>
+      </F1_DU_CELL_INFO>
+   </F1_DU_SRVD_CELL_INFO>
+   <F1_RRC_VERSION>
+      <RRC_VER>0</RRC_VER>
+      <EXT_RRC_VER>5</EXT_RRC_VER>
+   </F1_RRC_VERSION>
+   <MAC_CELL_CFG>
+      <CELL_ID>1</CELL_ID>
+      <CARRIER_CFG>
+         <DL_BW>20</DL_BW>
+         <NR_DL_ARFCN>428000</NR_DL_ARFCN>
+         <UL_BW>20</UL_BW>
+         <NR_UL_ARFCN>390000</NR_UL_ARFCN>
+         <NUM_TX_ANT>2</NUM_TX_ANT>
+         <NUM_RX_ANT>2</NUM_RX_ANT>
+      </CARRIER_CFG>
+      <CELL_CFG>
+         <MAC_OP_STATE>0</MAC_OP_STATE><!--OP_DISABLED-->
+         <MAC_ADMIN_STATE>1</MAC_ADMIN_STATE><!--ADMIN_UNLOCKED-->
+         <MAC_CELL_STATE>1</MAC_CELL_STATE><!--CELL_INACTIVE-->
+         <PLMN_INFO>
+            <PLMN>
+               <MCC>
+                  <PLMN_MCC0>3</PLMN_MCC0>
+                  <PLMN_MCC1>1</PLMN_MCC1>
+                  <PLMN_MCC2>1</PLMN_MCC2>
+               </MCC>
+               <MNC>
+                  <PLMN_MNC0>4</PLMN_MNC0>
+                  <PLMN_MNC1>8</PLMN_MNC1>
+                  <PLMN_MNC2>0</PLMN_MNC2>
+               </MNC>
+            </PLMN>
+            <F1_SLICE_SUPP_LST>
+               <NUM_SUPPORT_SLICE>2</NUM_SUPPORT_SLICE>
+               <SNSSAI_LIST>
+                     <NUM_NSSAI>2</NUM_NSSAI>
+                     <LIST>
+                     <SNSSAI>
+                        <SST>1</SST>
+                        <SD_SIZE>
+                        <SD>2</SD>
+                        <SD>3</SD>
+                        <SD>4</SD>
+                        </SD_SIZE>
+                     </SNSSAI>
+                     <SNSSAI>
+                        <SST>5</SST>
+                        <SD_SIZE>
+                        <SD>6</SD>
+                        <SD>7</SD>
+                        <SD>8</SD>
+                        </SD_SIZE>
+                     </SNSSAI>
+                     </LIST>
+                  </SNSSAI_LIST>
+            </F1_SLICE_SUPP_LST>
+         </PLMN_INFO>
+         <NR_PCI>1</NR_PCI>
+         <TAC>1</TAC>
+         <SSB_FREQUENCY>3000000</SSB_FREQUENCY>
+         <NR_SCS>0</NR_SCS>
+         <DUPLEX_MODE>0</DUPLEX_MODE>
+         <SIB1_CELL_CFG>
+            <SCH_PAGE_CFG>
+               <NUM_PO>1</NUM_PO>
+               <PO_PRESENT>TRUE</PO_PRESENT>
+               <PAGING_OCC>44</PAGING_OCC>
+            </SCH_PAGE_CFG>
+            <PDCCH_CONFIG_SIB1>
+               <CORESET_ZERO_INDEX>0</CORESET_ZERO_INDEX>
+               <SEARCH_SPACE_ZERO_INDEX>0</SEARCH_SPACE_ZERO_INDEX>
+            </PDCCH_CONFIG_SIB1>
+         </SIB1_CELL_CFG>
+         <BWP_DL_CFG>
+            <BWP_PARAMS>
+               <FIRST_PRB>0</FIRST_PRB>
+               <NUM_PRB>106</NUM_PRB>
+               <NR_SCS>0</NR_SCS>
+               <NORMAL_CYCLIC_PREFIX>0</NORMAL_CYCLIC_PREFIX>
+            </BWP_PARAMS>
+            <PDCCH_CFG_COMMON>
+               <SEARCH_SPACE_CFG>
+                  <SEARCHSPACE_1_INDEX>1</SEARCHSPACE_1_INDEX>
+                  <CORESET_0_INDEX>0</CORESET_0_INDEX>
+                  <SS_MONITORING_SLOT_SL1>0</SS_MONITORING_SLOT_SL1>
+                  <DURATION>0</DURATION>
+                  <SS_MONITORING_SYMBOL>8192</SS_MONITORING_SYMBOL>
+                  <CANDIDATE_INFO>
+                     <AGG_LEVEL1>8</AGG_LEVEL1>
+                     <AGG_LEVEL2>4</AGG_LEVEL2>
+                     <AGG_LEVEL4>2</AGG_LEVEL4>
+                     <AGG_LEVEL8>1</AGG_LEVEL8>
+                     <AGG_LEVEL16>0</AGG_LEVEL16>
+                  </CANDIDATE_INFO>
+               </SEARCH_SPACE_CFG>
+               <SEARCHSPACE_1_INDEX>1</SEARCHSPACE_1_INDEX>
+            </PDCCH_CFG_COMMON>
+            <PDSCH_CFG_COMMON>
+               <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
+               <PDSCH_COMM_TIME_ALLOC_LIST>
+                  <LIST>
+                  <PDSCH_COMM_TIME_ALLOC>
+                     <PDSCH_K0_CFG>0</PDSCH_K0_CFG>
+                     <PDSCH_MAPPING_TYPE>0</PDSCH_MAPPING_TYPE>
+                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
+                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
+                  </PDSCH_COMM_TIME_ALLOC>
+                  <PDSCH_COMM_TIME_ALLOC>
+                     <PDSCH_K0_CFG>1</PDSCH_K0_CFG>
+                     <PDSCH_MAPPING_TYPE>0</PDSCH_MAPPING_TYPE>
+                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
+                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
+                  </PDSCH_COMM_TIME_ALLOC>
+                  </LIST>
+               </PDSCH_COMM_TIME_ALLOC_LIST>
+            </PDSCH_CFG_COMMON>
+         </BWP_DL_CFG>
+         <BWP_UL_CFG>
+            <BWP_PARAMS>
+               <FIRST_PRB>0</FIRST_PRB>
+               <TOTAL_PRB_20MHZ_MU0>106</TOTAL_PRB_20MHZ_MU0>
+               <NR_SCS>0</NR_SCS>
+               <NORMAL_CYCLIC_PREFIX>0</NORMAL_CYCLIC_PREFIX>
+            </BWP_PARAMS>
+            <PUCCH_CFG_COMMON>
+               <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
+               <PUCCH_GROUP_HOPPING>0</PUCCH_GROUP_HOPPING>
+            </PUCCH_CFG_COMMON>
+            <PUSCH_CFG_COMMON>
+               <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
+               <PUSCH_COMM_TIME_ALLOC_LIST>
+                  <LIST>
+                  <PUSCH_COMM_TIME_ALLOC>
+                     <PUSCH_K2_CFG>0</PUSCH_K2_CFG>
+                     <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
+                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_COMM_TIME_ALLOC>
+                  <PUSCH_COMM_TIME_ALLOC>
+                     <PUSCH_K2_CFG>1</PUSCH_K2_CFG>
+                     <PUSCH_MAPPING_TYPE>0</PUSCH_MAPPING_TYPE>
+                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_COMM_TIME_ALLOC>
+                  </LIST>
+               </PUSCH_COMM_TIME_ALLOC_LIST>
+            </PUSCH_CFG_COMMON>  
+         </BWP_UL_CFG>
+      </CELL_CFG>
+      <SSB_CFG>
+         <SSB_PBSC_PWR>0</SSB_PBSC_PWR>
+         <SCS_CMN>0</SCS_CMN>  <!--SCS_15-->
+         <SSB_OFF_PT_A>24</SSB_OFF_PT_A>
+         <SSB_PERIOD>2</SSB_PERIOD>
+         <SSB_SC_OFF>0</SSB_SC_OFF>
+         <SSB_LIST>
+            <SSB_MASK>1</SSB_MASK>
+         </SSB_LIST>
+         <NUM_SSB>1</NUM_SSB>
+         <BEAM_LIST>
+            <BEAM_ID>0</BEAM_ID>
+         </BEAM_LIST>
+         <BETA_PSS>0</BETA_PSS>
+         <BCH_PAY_FLAG>1</BCH_PAY_FLAG>
+         <DMRS_TYPE_A_PROS>2</DMRS_TYPE_A_PROS>
+      </SSB_CFG>
+      <CSIRS_CFG>
+         <CSIRS_FREQ>0</CSIRS_FREQ>
+         <CSIRS_PORTS>0</CSIRS_PORTS>
+         <CSIRS_OFDM_PORT>0</CSIRS_OFDM_PORT>
+         <CSIRS_OFDM_PORT_2>0</CSIRS_OFDM_PORT_2>
+         <CSIRS_DM_TYPE>0</CSIRS_DM_TYPE>
+         <CSIRS_DENSITY>0</CSIRS_DENSITY>
+         <CSIRS_DENSITY_DOT_5>0</CSIRS_DENSITY_DOT_5>
+         <POWER_CONTROL_OFFSET>0</POWER_CONTROL_OFFSET>
+         <POWER_CONTROL_OFFSET_SS>0</POWER_CONTROL_OFFSET_SS>
+         <PERIODICITY_OFFSET>0</PERIODICITY_OFFSET>
+      </CSIRS_CFG>
+      <PRACH_CFG>
+         <PRACH_SEQ_LEN>0</PRACH_SEQ_LEN>
+         <NR_SCS>0</NR_SCS>
+         <PRACH_CONFIG_IDX>16</PRACH_CONFIG_IDX>
+         <NUM_PRACH_FDM>1</NUM_PRACH_FDM>
+         <FDM_LIST>
+            <FDM_INFO>
+               <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
+               <NUM_ROOT_SEQ>1</NUM_ROOT_SEQ>
+               <K1>0</K1>
+               <ZERO_CORR_ZONE_CFG>4</ZERO_CORR_ZONE_CFG>
+            </FDM_INFO>
+         </FDM_LIST>
+         <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
+         <SSB_PER_RACH>1</SSB_PER_RACH>
+         <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
+         <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
+         <MAX_NUM_RB>106</MAX_NUM_RB>
+         <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
+         <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
+         <RA_RSP_WINDOW>10</RA_RSP_WINDOW>
+      </PRACH_CFG>
+      <TDD_CFG>
+         <TDD_PERIODICITY>0</TDD_PERIODICITY>
+         <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
+         <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
+         <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
+         <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
+      </TDD_CFG>
+      <PRE_CODE_CFG>
+         <NUM_LAYERS>1</NUM_LAYERS>
+         <NUM_ANT_PORTS>0</NUM_ANT_PORTS>
+      </PRE_CODE_CFG>
+      <BEAM_FORM_CFG>
+         <NUM_OF_BEAMS>0</NUM_OF_BEAMS>
+         <NUM_TX_RUS>0</NUM_TX_RUS>
+         <BEAM_IDX>0</BEAM_IDX>
+         <BEAM_TYPE>0</BEAM_TYPE>
+         <BEAM_AZIMUTH>0</BEAM_AZIMUTH>
+         <BEAM_TILT>0</BEAM_TILT>
+         <BEAM_HORIZ_WIDTH>0</BEAM_HORIZ_WIDTH>
+         <BEAM_VERT_WIDTH>0</BEAM_VERT_WIDTH>
+         <COVER_SHAPE>0</COVER_SHAPE>
+         <DIGI_TILT>0</DIGI_TILT>
+         <DIGI_AZIMUTH>0</DIGI_AZIMUTH>
+      </BEAM_FORM_CFG>
+   </MAC_CELL_CFG>
+   <MIB_PARAMS>
+      <SYS_FRAME_NUM>0</SYS_FRAME_NUM>
+      <SUB_CARR_SPACE>0</SUB_CARR_SPACE>
+      <SSB_SC_OFFSET>0</SSB_SC_OFFSET>
+      <DMRS_TYPEA_POSITION>0</DMRS_TYPEA_POSITION>
+      <CORESET_0_INDEX>0</CORESET_0_INDEX>
+      <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
+      <CELL_BARRED>1</CELL_BARRED>
+      <INTRA_FREQ_RESELECT>1</INTRA_FREQ_RESELECT>
+   </MIB_PARAMS>
+   <SLICE_CFG>
+      <NUM_RRC_POLICY>1</NUM_RRC_POLICY>
+      <MAC_SLICE_RRM_POLICY>
+         <RESOURCE_TYPE>1</RESOURCE_TYPE>
+         <NUM_RRC_POLICY_MEM>1</NUM_RRC_POLICY_MEM>
+         <RRM_POLICY_MUM_LIST>
+            <PLMN>
+               <MCC>
+                  <PLMN_MCC0>3</PLMN_MCC0>
+                  <PLMN_MCC1>1</PLMN_MCC1>
+                  <PLMN_MCC2>1</PLMN_MCC2>
+               </MCC>
+               <MNC>
+                  <PLMN_MNC0>4</PLMN_MNC0>
+                  <PLMN_MNC1>8</PLMN_MNC1>
+                  <PLMN_MNC2>0</PLMN_MNC2>
+               </MNC>
+            </PLMN>
+            <SNSSAI>
+               <SST>1</SST>
+               <SD_SIZE>
+               <SD>2</SD>
+               <SD>3</SD>
+               <SD>4</SD>
+               </SD_SIZE>
+            </SNSSAI>
+         </RRM_POLICY_MUM_LIST>
+         <RRM_POLICY_RATIO>
+            <MAX_RATIO>90</MAX_RATIO>
+            <MIN_RATIO>30</MIN_RATIO>
+            <DEDICATED_RATIO>10</DEDICATED_RATIO>
+         </RRM_POLICY_RATIO>
+      </MAC_SLICE_RRM_POLICY>
+   </SLICE_CFG>
+   <SIB1_PARAMS>
+      <PLMN>
+         <MCC>
+            <PLMN_MCC0>3</PLMN_MCC0>
+            <PLMN_MCC1>1</PLMN_MCC1>
+            <PLMN_MCC2>1</PLMN_MCC2>
+         </MCC>
+         <MNC>
+         <PLMN_MNC0>4</PLMN_MNC0>
+         <PLMN_MNC1>8</PLMN_MNC1>
+         <PLMN_MNC2>0</PLMN_MNC2>
+         </MNC>
+      </PLMN>
+      <TAC>1</TAC>
+      <RANAC>1</RANAC>
+      <CELL_IDENTITY>1</CELL_IDENTITY>
+      <CELL_RESVD_OPUSE>1</CELL_RESVD_OPUSE>
+      <CONN_EST_FAIL_CNT>2</CONN_EST_FAIL_CNT>
+      <CONN_EST_FAIL_OFF_VALID>7</CONN_EST_FAIL_OFF_VALID>
+      <CONN_EST_FAIL_OFFSET>15</CONN_EST_FAIL_OFFSET>
+      <SI_SHED_INFO>
+         <WIN_LEN>0</WIN_LEN>
+         <BROADCAST_STA>0</BROADCAST_STA>
+         <PERIODICITY>0</PERIODICITY>
+         <SIB_TYPE>0</SIB_TYPE>
+         <SIB1_VAL_TAG>10</SIB1_VAL_TAG>
+      </SI_SHED_INFO>
+      <SRV_CELLCFG_COM_SIB>
+         <NR_SCS>0</NR_SCS>
+         <SSB_POS_INBURST>192</SSB_POS_INBURST>
+         <SSB_PERIODICITY>20</SSB_PERIODICITY>
+         <SSB_PBCH_PWR>0</SSB_PBCH_PWR>
+         <DL_CFG_COMMON>
+            <NR_FREQ_BAND>1</NR_FREQ_BAND>
+            <OFFSET_TO_POINT_A>24</OFFSET_TO_POINT_A>
+            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
+            <SCS_SPEC_CARRIER>
+               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
+               <NR_SCS>0</NR_SCS>
+               <SCS_BW>20</SCS_BW>
+            </SCS_SPEC_CARRIER>
+            <PDCCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <CORESET_0_INDEX>0</CORESET_0_INDEX>
+               <SEARCHSPACE_0_INDEX>0</SEARCHSPACE_0_INDEX>
+               <PDCCH_SEARCH_SPACE_ID>1</PDCCH_SEARCH_SPACE_ID>
+               <PDCCH_CTRL_RSRC_SET_ID>0</PDCCH_CTRL_RSRC_SET_ID>
+               <MONITOR_SLOT_PRD_OFFPRESENT>0</MONITOR_SLOT_PRD_OFFPRESENT>
+               <LIST>
+                  <MONITOR_LIST>
+                     <MONITOR_SYMBOL_INSLOT>128</MONITOR_SYMBOL_INSLOT>
+                  </MONITOR_LIST>
+                  <MONITOR_LIST>
+                     <MONITOR_SYMBOL_INSLOT>0</MONITOR_SYMBOL_INSLOT>
+                  </MONITOR_LIST>
+               </LIST>
+               <NUMC_AGG_LVL1>7</NUMC_AGG_LVL1>
+               <NUMC_AGG_LVL2>4</NUMC_AGG_LVL2>
+               <NUMC_AGG_LVL4>2</NUMC_AGG_LVL4>
+               <NUMC_AGG_LVL8>1</NUMC_AGG_LVL8>
+               <NUMC_AGG_LVL16>0</NUMC_AGG_LVL16>
+               <SEARCH_SPC_TYPE>1</SEARCH_SPC_TYPE>
+               <PDCCH_SERACH_SPACE_DCI_FORMAT>0</PDCCH_SERACH_SPACE_DCI_FORMAT>
+               <PDCCH_SEARCH_SPACE_ID_SIB1>1</PDCCH_SEARCH_SPACE_ID_SIB1>
+               <PDCCH_SEARCH_SPACE_ID_PAGING>1</PDCCH_SEARCH_SPACE_ID_PAGING>
+               <RA_PDCCH_SEARCH_SPACE_ID_PAGING>1</RA_PDCCH_SEARCH_SPACE_ID_PAGING>
+            </PDCCH_CFG_COMMON>
+            <PDSCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <NUM_TIME_DOM_RSRS_ALLOC>2</NUM_TIME_DOM_RSRS_ALLOC>
+               <PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
+                  <LIST>
+                  <PDSCH_TIME_DOM_RSRC_ALLOC>
+                     <K0>0</K0>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
+                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
+                  </PDSCH_TIME_DOM_RSRC_ALLOC>
+                  <PDSCH_TIME_DOM_RSRC_ALLOC>
+                     <K0>1</K0>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PDSCH_START_SYMBOL>3</PDSCH_START_SYMBOL>
+                     <PDSCH_LENGTH_SYMBOL>11</PDSCH_LENGTH_SYMBOL>
+                  </PDSCH_TIME_DOM_RSRC_ALLOC>
+                  </LIST>
+               </PDSCH_TIME_DOM_RSRC_ALLOC_LIST>
+            </PDSCH_CFG_COMMON>
+            <BCCH_CFG>
+               <MOB_PRD_COEFF>3</MOB_PRD_COEFF>
+            </BCCH_CFG>
+            <PCCH_CFG>
+               <DFLT_PAGING_CYCLE>3</DFLT_PAGING_CYCLE>
+               <NAND_PAGING_FRM_OFFSET>1</NAND_PAGING_FRM_OFFSET>
+               <PAGE_FRM_OFFSET>0</PAGE_FRM_OFFSET>
+               <NS>2</NS>
+               <FIRST_PDCCH_MONITORING_TYPE>2</FIRST_PDCCH_MONITORING_TYPE>
+               <LIST>
+                  <FIRST_PDCCH_LIST>
+                     <FIRST_PDCCH_MONITORING_INFO>44</FIRST_PDCCH_MONITORING_INFO>
+                  </FIRST_PDCCH_LIST>
+               </LIST>
+            </PCCH_CFG>
+         </DL_CFG_COMMON>
+         <UL_CFG_COMMON>
+            <NR_FREQ_BAND>1</NR_FREQ_BAND>
+            <UL_P_MAX>23</UL_P_MAX>
+            <FREQ_LOC_BW>28875</FREQ_LOC_BW>
+            <TIME_ALLIGN_TIMER_COMM>7</TIME_ALLIGN_TIMER_COMM>
+            <SCS_SPEC_CARRIER>
+               <SSB_SUBCARRIER_OFFSET>0</SSB_SUBCARRIER_OFFSET>
+               <NR_SCS>0</NR_SCS>
+               <NR_BANDWIDTH>20</NR_BANDWIDTH>
+            </SCS_SPEC_CARRIER>
+            <RACH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <PRACH_CONFIG_IDX>31</PRACH_CONFIG_IDX>
+               <MSG_1_FDM>0</MSG_1_FDM>
+               <MAX_NUM_RB>106</MAX_NUM_RB>
+               <PRACH_MAX_PRB>24</PRACH_MAX_PRB>
+               <ZERO_CORRELATION_ZONE_CFG>4</ZERO_CORRELATION_ZONE_CFG>
+               <PRACH_PREAMBLE_RCVD_TGT_PWR>-74</PRACH_PREAMBLE_RCVD_TGT_PWR>
+               <PREAMBLE_TRANS_MAX>10</PREAMBLE_TRANS_MAX>
+               <PWR_RAMPING_STEP>1</PWR_RAMPING_STEP>
+               <RA_RSP_WINDOW>4</RA_RSP_WINDOW>
+               <NUM_RA_PREAMBLE>63</NUM_RA_PREAMBLE>
+               <NUM_SSB_PER_RACH_OCC>1</NUM_SSB_PER_RACH_OCC>
+               <CB_PREAMBLE_PER_SSB>8</CB_PREAMBLE_PER_SSB>
+               <CONT_RES_TIMER>7</CONT_RES_TIMER>
+               <RSRP_THRESHOLD_SSB>31</RSRP_THRESHOLD_SSB>
+               <ROOT_SEQ_IDX_PRESENT>2</ROOT_SEQ_IDX_PRESENT>
+               <ROOT_SEQ_IDX>0</ROOT_SEQ_IDX>
+               <PRACH_SUBCARRIER_SPACING>0</PRACH_SUBCARRIER_SPACING>
+               <PRACH_RESTRICTED_SET_CFG>0</PRACH_RESTRICTED_SET_CFG>
+            </RACH_CFG_COMMON>
+            <PUSCH_CFG_COMMON>
+               <PUSCH_CFG_PRESENT>2</PUSCH_CFG_PRESENT>
+               <PUSCH_MSG3_DELTA_PREAMBLE>0</PUSCH_MSG3_DELTA_PREAMBLE>
+               <PUSCH_P0_NOMINAL_WITH_GRANT>-70</PUSCH_P0_NOMINAL_WITH_GRANT>
+               <NUM_TIME_DOM_RSRC_ALLOC>2</NUM_TIME_DOM_RSRC_ALLOC>
+               <PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
+                  <LIST>
+                  <PUSCH_TIME_DOM_RSRC_ALLOC>
+                     <K2>4</K2>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_TIME_DOM_RSRC_ALLOC>
+                  <PUSCH_TIME_DOM_RSRC_ALLOC>
+                     <K2>5</K2>
+                     <MAP_TYPE>0</MAP_TYPE>
+                     <PUSCH_START_SYMBOL>3</PUSCH_START_SYMBOL>
+                     <PUSCH_LENGTH_SYMBOL>11</PUSCH_LENGTH_SYMBOL>
+                  </PUSCH_TIME_DOM_RSRC_ALLOC>
+                  </LIST>
+               </PUSCH_TIME_DOM_RSRC_ALLOC_LIST>
+            </PUSCH_CFG_COMMON>
+            <PUCCH_CFG_COMMON>
+               <PRESENT>2</PRESENT>
+               <PUCCH_RSRC_COMMON>0</PUCCH_RSRC_COMMON>
+               <GRP_HOP>0</GRP_HOP>
+               <PUCCH_P0_NOMINAL>-74</PUCCH_P0_NOMINAL>
+            </PUCCH_CFG_COMMON>
+         </UL_CFG_COMMON>
+         <TDD_UL_DL_CFG_COMMON>
+            <REF_SCS>1</REF_SCS>
+            <TX_PRD>6</TX_PRD>
+            <NUM_DL_SLOTS>7</NUM_DL_SLOTS>
+            <NUM_DL_SYMBOLS>12</NUM_DL_SYMBOLS>
+            <NUM_UL_SLOTS>2</NUM_UL_SLOTS>
+            <NUM_UL_SYMBOLS>1</NUM_UL_SYMBOLS>
+         </TDD_UL_DL_CFG_COMMON>
+      </SRV_CELLCFG_COM_SIB>
+   </SIB1_PARAMS>
+   <RADIO_FRAME_DURATION>10</RADIO_FRAME_DURATION>
+   <MAX_NUM_CELL>2</MAX_NUM_CELL>
+   <MAX_NUM_MU>4</MAX_NUM_MU>
+   <MAX_NUM_UE_PER_TTI>1</MAX_NUM_UE_PER_TTI>
+   <MAX_DRB_LCID>32</MAX_DRB_LCID>
+   <MAX_NUM_SRB>3</MAX_NUM_SRB>
+   <MAX_NUM_SSB>64</MAX_NUM_SSB>
+   <MAX_NUM_HARQ_PROC>16</MAX_NUM_HARQ_PROC>
+   <MAX_NUM_TB_PER_UE>2</MAX_NUM_TB_PER_UE>
+   <PHY_DELTA_DL>1</PHY_DELTA_DL>
+   <ODU_START_CRNTI>100</ODU_START_CRNTI>
+   <ODU_END_CRNTI>500</ODU_END_CRNTI>
+   <DEFAULT_MCS>4</DEFAULT_MCS>
+   <BANDWIDTH>20</BANDWIDTH>
+   <MAX_NUM_RB>106</MAX_NUM_RB>
+   <ODU_UE_THROUGHPUT_PRINT_TIME_INTERVAL>5</ODU_UE_THROUGHPUT_PRINT_TIME_INTERVAL>
+   <ODU_SNSSAI_THROUGHPUT_PRINT_TIME_INTERVAL>60000</ODU_SNSSAI_THROUGHPUT_PRINT_TIME_INTERVAL>
+   <MAX_PO_PER_PF>4</MAX_PO_PER_PF>
+   <MAX_SLOTS>10</MAX_SLOTS>
+   <MAX_SFN>1024</MAX_SFN>
+   <BASE_SCS>15</BASE_SCS>
+   <MAX_SYMB_PER_SLOT>14</MAX_SYMB_PER_SLOT>
+</DU_CFG_PARAMS>   
+
+