+/* SIB1 interface structure */
+
+typedef struct coresetCfg
+{
+ uint8_t coreSet0Size;
+ uint8_t startSymbolIndex;
+ uint8_t durationSymbols;
+ uint8_t freqDomainResource[6];
+ uint8_t cceRegMappingType;
+ uint8_t regBundleSize;
+ uint8_t interleaverSize;
+ uint8_t coreSetType;
+ uint16_t shiftIndex;
+ uint8_t precoderGranularity;
+ uint8_t cceIndex;
+ uint8_t aggregationLevel;
+} CoresetCfg;
+
+typedef struct txPowerPdcchInfo
+{
+ uint8_t powerValue;
+ uint8_t powerControlOffsetSS;
+} TxPowerPdcchInfo;
+
+typedef struct dlDCI
+{
+ uint16_t rnti;
+ uint16_t scramblingId;
+ uint16_t scramblingRnti;
+ uint8_t cceIndex;
+ uint8_t aggregLevel;
+ BeamformingInfo beamPdcchInfo;
+ TxPowerPdcchInfo txPdcchPower;
+ PdschCfg *pdschCfg;
+} DlDCI;
+
+typedef struct pdcchCfg
+{
+ BwpCfg pdcchBwpCfg;
+ /* coreset-0 configuration */
+ CoresetCfg coreset0Cfg;
+
+ uint16_t numDlDci;
+ DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
+} PdcchCfg;
+/* end of SIB1 PDCCH structures */
+