+/* this MACRO set 1 bit at the bit position */
+#define SET_ONE_BIT(_bitPos, _out) \
+{ \
+ _out = ((1<<_bitPos) | _out); \
+}
+
+/* this MACRO un-set 1 bit at the bit position */
+#define UNSET_ONE_BIT(_bitPos, _out) \
+{ \
+ _out = (~(1<<_bitPos) & _out); \
+}
+
+/* this MACRO finds the index of the rightmost set bit */
+#define GET_RIGHT_MOST_SET_BIT( _in,_bitPos) \
+{ \
+ _bitPos = __builtin_ctz(_in); \
+}
+
+/* MACRO for checking CRNTI range*/
+#define CHECK_CRNTI(_crnti, _isCrntiValid) \
+{ \
+ _isCrntiValid = ((_crnti >= ODU_START_CRNTI && _crnti <= ODU_END_CRNTI ) ? 1 : 0); \
+}
+
+#define CHECK_LCID(_lcId, _isLcidValid) \
+{\
+ _isLcidValid = ((_lcId >= SRB0_LCID && _lcId <= MAX_DRB_LCID) ? 1 : 0);\
+}
+
+/**
+ * @def TMR_CALCUATE_WAIT
+ *
+ * This macro calculates and assigns wait time based on the value of the
+ * timer and the timer resolution. Timer value of 0 signifies that the
+ * timer is not configured
+ *
+ * @param[out] _wait Time for which to arm the timer changed to proper
+ * value according to the resolution
+ * @param[in] _tmrVal Value of the timer
+ * @param[in] _timerRes Resolution of the timer
+ *
+*/
+#define TMR_CALCUATE_WAIT(_wait, _tmrVal, _timerRes) \
+{ \
+ (_wait) = ((_tmrVal) * SS_TICKS_SEC)/((_timerRes) * 1000); \
+ if((0 != (_tmrVal)) && (0 == (_wait))) \
+ { \
+ (_wait) = 1; \
+ } \
+}
+
+typedef enum
+{
+ SUCCESSFUL,
+ CELLID_INVALID,
+ UEID_INVALID,
+ RESOURCE_UNAVAILABLE,
+ SLICE_NOT_FOUND,
+ DUPLICATE_ENTRY,
+ PARAM_INVALID,
+ STATS_ID_NOT_FOUND
+}CauseOfResult ;
+
+typedef enum
+{
+ UE_CFG_INACTIVE,
+ UE_CFG_INPROGRESS,
+ UE_CREATE_COMPLETE,
+ UE_DELETE_COMPLETE,
+ UE_RECFG_COMPLETE,
+ UE_RESET_COMPLETE
+}UeCfgState;
+
+typedef enum
+{
+ CONFIG_UNKNOWN,
+ CONFIG_ADD,
+ CONFIG_MOD,
+ CONFIG_DEL,
+ CONFIG_REESTABLISH
+}ConfigType;
+
+#ifdef NR_TDD
+typedef enum
+{
+ TX_PRDCTY_MS_0P5,
+ TX_PRDCTY_MS_0P625,
+ TX_PRDCTY_MS_1,
+ TX_PRDCTY_MS_1P25,
+ TX_PRDCTY_MS_2,
+ TX_PRDCTY_MS_2P5,
+ TX_PRDCTY_MS_5,
+ TX_PRDCTY_MS_10
+}DlUlTxPeriodicity;
+#endif
+
+typedef enum
+{
+ SCS_15KHZ,
+ SCS_30KHZ,
+ SCS_60KHZ,
+ SCS_120KHZ,
+ SCS_240KHZ
+}SCS;
+
+typedef enum
+{
+ SSB_5MS,
+ SSB_10MS,
+ SSB_20MS,
+ SSB_40MS,
+ SSB_80MS,
+ SSB_160MS
+}SSBPeriodicity;