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JIRA ID: ODUHIGH-314 : Time domain allocation for SSB in TDD mode
[o-du/l2.git]
/
src
/
cm
/
common_def.h
diff --git
a/src/cm/common_def.h
b/src/cm/common_def.h
index
5f18a97
..
1d3fa70
100644
(file)
--- a/
src/cm/common_def.h
+++ b/
src/cm/common_def.h
@@
-54,10
+54,13
@@
#include "cm_lib.x"
#include "du_log.h"
#include "cm_lib.x"
#include "du_log.h"
+#define RADIO_FRAME_DURATION 10 /* Time duration of a radio frame in ms */
/* MAX values */
#define MAX_NUM_CELL 1
#define MAX_NUM_UE 1
#define MAX_NUM_LC 11
/* MAX values */
#define MAX_NUM_CELL 1
#define MAX_NUM_UE 1
#define MAX_NUM_LC 11
+#define MAX_NUM_SRB 3 /* Max. no of Srbs */
+#define MAX_NUM_DRB 29 /* spec 38.331, maxDRB */
/* 5G ORAN phy delay */
#define PHY_DELTA 2
/* 5G ORAN phy delay */
#define PHY_DELTA 2
@@
-79,6
+82,11
@@
#define MAX_DRB_LCID 32
#define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */
#define MAX_DRB_LCID 32
#define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */
+#define PUCCH_FORMAT_0 0
+#define PUCCH_FORMAT_1 1
+#define PUCCH_FORMAT_2 2
+#define PUCCH_FORMAT_3 3
+#define PUCCH_FORMAT_4 4
#define BANDWIDTH_20MHZ 20
#define BANDWIDTH_100MHZ 100
#define BANDWIDTH_20MHZ 20
#define BANDWIDTH_100MHZ 100
@@
-113,6
+121,13
@@
#define ODU_SET_THREAD_AFFINITY SSetAffinity
#define ODU_CREATE_TASK SCreateSTsk
#define ODU_SET_THREAD_AFFINITY SSetAffinity
#define ODU_CREATE_TASK SCreateSTsk
+#ifdef NR_TDD
+/* Maximum slots for max periodicity and highest numerology is 320.
+ * However, aligning to fapi_interface.h, setting this macro to 160 */
+#define MAX_TDD_PERIODICITY_SLOTS 160
+#define MAX_SYMB_PER_SLOT 14
+#endif
+
#define GET_UE_IDX( _crnti,_ueIdx) \
{ \
_ueIdx = _crnti - ODU_START_CRNTI + 1; \
#define GET_UE_IDX( _crnti,_ueIdx) \
{ \
_ueIdx = _crnti - ODU_START_CRNTI + 1; \
@@
-174,6
+189,36
@@
typedef enum
CONFIG_DEL
}ConfigType;
CONFIG_DEL
}ConfigType;
+#ifdef NR_TDD
+typedef enum
+{
+ DL_SLOT,
+ UL_SLOT,
+ FLEXI_SLOT
+}SlotConfig;
+
+typedef enum
+{
+ TX_PRDCTY_MS_0P5,
+ TX_PRDCTY_MS_0P625,
+ TX_PRDCTY_MS_1,
+ TX_PRDCTY_MS_1P25,
+ TX_PRDCTY_MS_2,
+ TX_PRDCTY_MS_2P5,
+ TX_PRDCTY_MS_5,
+ TX_PRDCTY_MS_10
+}DlUlTxPeriodicity;
+#endif
+
+typedef enum
+{
+ SCS_15KHZ,
+ SCS_30KHZ,
+ SCS_60KHZ,
+ SCS_120KHZ,
+ SCS_240KHZ
+}SCS;
+
typedef struct slotIndInfo
{
uint16_t cellId;
typedef struct slotIndInfo
{
uint16_t cellId;
@@
-192,7
+237,18
@@
typedef struct oduCellId
uint16_t cellId;
}OduCellId;
uint16_t cellId;
}OduCellId;
+#ifdef NR_TDD
+typedef struct tddCfg
+{
+ bool pres;
+ DlUlTxPeriodicity tddPeriod; /* DL UL Transmission periodicity */
+ SlotConfig slotCfg[MAX_TDD_PERIODICITY_SLOTS][MAX_SYMB_PER_SLOT];
+}TDDCfg;
+#endif
+
+
uint64_t gSlotCount;
uint64_t gSlotCount;
+uint64_t gDlDataRcvdCnt; /* Number of DL data received at EGTP */
void freqDomRscAllocType0(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain);
void oduCpyFixBufToMsg(uint8_t *fixBuf, Buffer *mBuf, uint16_t len);
void freqDomRscAllocType0(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain);
void oduCpyFixBufToMsg(uint8_t *fixBuf, Buffer *mBuf, uint16_t len);