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Merge "[Epic-ID: ODUHIGH-461][Task-ID: ODUHIGH-468]Unused files and functions removed...
[o-du/l2.git]
/
src
/
5gnrsch
/
sch_rach.c
diff --git
a/src/5gnrsch/sch_rach.c
b/src/5gnrsch/sch_rach.c
index
162ed15
..
ed2612c
100644
(file)
--- a/
src/5gnrsch/sch_rach.c
+++ b/
src/5gnrsch/sch_rach.c
@@
-375,10
+375,8
@@
uint16_t calculateRaRnti(uint8_t symbolIdx, uint8_t slotIdx, uint8_t freqIdx)
* @param[in] shed instance
* @return void
**/
* @param[in] shed instance
* @return void
**/
-void createSchRaCb(SchRaReq *raReq, Inst schInst)
+void createSchRaCb(
uint8_t ueId,
SchRaReq *raReq, Inst schInst)
{
{
- uint8_t ueId = 0;
-
if(raReq->isCFRA)
{
/* If a UE in handover has triggered CFRA, its UE CB context is already present in SCH,
if(raReq->isCFRA)
{
/* If a UE in handover has triggered CFRA, its UE CB context is already present in SCH,
@@
-572,7
+570,7
@@
bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin
}
/* Calculating time frame to send DCI for RAR */
}
/* Calculating time frame to send DCI for RAR */
- ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
+ ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA
, cell->numSlots
);
dciSlot = dciTime.slot;
#ifdef NR_TDD
/* Consider this slot for sending DCI, only if it is a DL slot */
dciSlot = dciTime.slot;
#ifdef NR_TDD
/* Consider this slot for sending DCI, only if it is a DL slot */
@@
-597,7
+595,7
@@
bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin
k0 = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
/* Calculating time frame to send RAR PDSCH */
k0 = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
/* Calculating time frame to send RAR PDSCH */
- ADD_DELTA_TO_TIME(dciTime, rarTime, k0);
+ ADD_DELTA_TO_TIME(dciTime, rarTime, k0
, cell->numSlots
);
rarSlot = rarTime.slot;
/* If PDSCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
rarSlot = rarTime.slot;
/* If PDSCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
@@
-612,9
+610,9
@@
bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin
for(k1TblIdx = 0; k1TblIdx < numK1; k1TblIdx++)
{
k1Index = k0K1InfoTbl->k0k1TimingInfo[dciTime.slot].k0Indexes[k0TblIdx].k1TimingInfo.k1Indexes[k1TblIdx];
for(k1TblIdx = 0; k1TblIdx < numK1; k1TblIdx++)
{
k1Index = k0K1InfoTbl->k0k1TimingInfo[dciTime.slot].k0Indexes[k0TblIdx].k1TimingInfo.k1Indexes[k1TblIdx];
- if(cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCell
C
fg.initUlBwp.pucchCfg.dlDataToUlAck)
+ if(cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCell
Rec
fg.initUlBwp.pucchCfg.dlDataToUlAck)
{
{
- k1 = cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCell
C
fg.initUlBwp.pucchCfg.dlDataToUlAck->\
+ k1 = cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCell
Rec
fg.initUlBwp.pucchCfg.dlDataToUlAck->\
dlDataToUlAckList[k1Index];
}
else
dlDataToUlAckList[k1Index];
}
else
@@
-622,7
+620,7
@@
bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin
k1 = defaultUlAckTbl[k1Index];
}
k1 = defaultUlAckTbl[k1Index];
}
- ADD_DELTA_TO_TIME(rarTime, pucchTime, k1);
+ ADD_DELTA_TO_TIME(rarTime, pucchTime, k1
, cell->numSlots
);
#ifdef NR_TDD
if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
continue;
#ifdef NR_TDD
if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
continue;
@@
-645,7
+643,7
@@
bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin
k2 = k2 + msg3Delta;
if(k2 >= msg3MinSchTime)
{
k2 = k2 + msg3Delta;
if(k2 >= msg3MinSchTime)
{
- ADD_DELTA_TO_TIME(rarTime, msg3Time, k2);
+ ADD_DELTA_TO_TIME(rarTime, msg3Time, k2
, cell->numSlots
);
#ifdef NR_TDD
if(schGetSlotSymbFrmt(msg3Time.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
continue;
#ifdef NR_TDD
if(schGetSlotSymbFrmt(msg3Time.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
continue;
@@
-760,7
+758,7
@@
bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uin
cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId;
/* Create raCb at SCH */
cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId;
/* Create raCb at SCH */
- createSchRaCb(cell->raReq[ueId-1], schInst);
+ createSchRaCb(
ueId,
cell->raReq[ueId-1], schInst);
/* Remove RachInd from pending RA request list */
SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo));
/* Remove RachInd from pending RA request list */
SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo));
@@
-832,7
+830,7
@@
uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst)
winNumSlots = (float)cell->cellCfg.schRachCfg.raRspWindow / slotDuration;
/* Adding window size to window start time to get window end time */
winNumSlots = (float)cell->cellCfg.schRachCfg.raRspWindow / slotDuration;
/* Adding window size to window start time to get window end time */
- ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots);
+ ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots
, cell->numSlots
);
cell->raReq[ueId -1] = raReq;
/* Adding UE Id to list of pending UEs to be scheduled */
cell->raReq[ueId -1] = raReq;
/* Adding UE Id to list of pending UEs to be scheduled */