+/**
+ * @brief Processes any pending RA request
+ *
+ * @details
+ *
+ * Function : schProcessRaReq
+ *
+ * This function process pending RA request
+ *
+ * @param[in] Current timing of the cell
+ * @return ROK
+ **/
+void schProcessRaReq(SlotTimingInfo currTime, SchCellCb *cell)
+{
+ bool k2Found = false;
+ uint8_t ueIdx = 0, k0TblIdx = 0, k2TblIdx = 0;
+ uint8_t k0Index = 0, k2Index = 0;
+ uint8_t k0 = 0, k2 = 0;
+ uint8_t puschMu = 0;
+ uint8_t msg3Delta = 0, msg3MinSchTime = 0;
+#ifdef NR_TDD
+ uint8_t totalCfgSlot = 0;
+#endif
+ uint16_t dciSlot = 0, rarSlot = 0, msg3Slot = 0;
+ SlotTimingInfo dciTime, rarTime;
+ RarAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for RAR */
+ RarAlloc *rarSlotAlloc = NULLP; /* Stores info for transmission of RAR PDSCH */
+ SchPuschInfo *msg3PuschInfo = NULLP; /* Stores MSG3 PUSCH scheduling information */
+ PduTxOccsaion ssbOccasion=0, sib1Occasion=0;
+ SchK0K1TimingInfoTbl *k0K1InfoTbl=NULLP;
+ SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
+ RaRspWindowStatus windowStatus=0;
+
+ while(ueIdx < MAX_NUM_UE)
+ {
+ if(cell->raReq[ueIdx] == NULLP)
+ {
+ ueIdx++;
+ continue;
+ }
+
+#ifdef NR_TDD
+ totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
+#endif
+ k0K1InfoTbl = &cell->cellCfg.schInitialDlBwp.k0K1InfoTbl;
+ msg3K2InfoTbl = &cell->cellCfg.schInitialUlBwp.msg3K2InfoTbl;
+ puschMu = cell->cellCfg.numerology;
+ msg3Delta = puschDeltaTable[puschMu];
+ msg3MinSchTime = minMsg3SchTime[cell->cellCfg.numerology];
+
+ /* Calculating time frame to send DCI for RAR */
+ ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
+ dciSlot = dciTime.slot;
+#ifdef NR_TDD
+ /* Consider this slot for sending DCI, only if it is a DL slot */
+ if(schGetSlotSymbFrmt(dciSlot, cell->slotFrmtBitMap) == DL_SLOT)
+#endif
+ {
+
+ /* Check if this slot is within RA response window */
+ windowStatus = isInRaRspWindow(cell->raReq[ueIdx], dciTime, cell->numSlots);
+ if(windowStatus == WITHIN_WINDOW)
+ {
+ /* For all k0 values, search for a suitable k2 value to schedule MSG3.
+ * RAR DCI, RAR PDSCH and MSG3 is scheduled only if one such k0-k2 combination
+ * is found. Else no scheduling happens.
+ */
+ for(k0TblIdx = 0; k0TblIdx < k0K1InfoTbl->k0k1TimingInfo[dciSlot].numK0; k0TblIdx++)
+ {
+ k0Index = k0K1InfoTbl->k0k1TimingInfo[dciSlot].k0Indexes[k0TblIdx].k0Index;
+ k0 = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
+
+ /* Calculating time frame to send RAR PDSCH */
+ ADD_DELTA_TO_TIME(dciTime, rarTime, k0);
+ rarSlot = rarTime.slot;
+
+ for(k2TblIdx = 0; k2TblIdx < msg3K2InfoTbl->k2TimingInfo[rarSlot].numK2; k2TblIdx++)
+ {
+ k2Index = msg3K2InfoTbl->k2TimingInfo[rarSlot].k2Indexes[k2TblIdx];
+ k2 = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
+
+ /* Delta is added to the slot allocation for msg3 based on 38.214 section 6.1.2.1 */
+ k2 = k2 + msg3Delta;
+ if(k2 >= msg3MinSchTime)
+ {
+ msg3Slot = (rarSlot + k2) % cell->numSlots;
+#ifdef NR_TDD
+ if(schGetSlotSymbFrmt(msg3Slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
+ continue;
+#endif
+ k2Found = true;
+ break;
+ }
+ }
+ if(k2Found)
+ break;
+ }
+ }
+ else if(windowStatus == WINDOW_EXPIRED)
+ {
+ SCH_FREE(cell->raReq[ueIdx]->rachInd, sizeof(RachIndInfo));
+ SCH_FREE(cell->raReq[ueIdx], sizeof(SchRaReq));
+ ueIdx++;
+ continue;
+ }
+
+ /* If K0-K2 combination not found, no scheduling happens */
+ if(!k2Found)
+ {
+ ueIdx++;
+ continue;
+ }
+
+ /* Allocate memory for RAR PDCCH slot, pointer will be checked at schProcessSlotInd() */
+ SCH_ALLOC(dciSlotAlloc, sizeof(RarAlloc));
+ if(dciSlotAlloc == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
+ return;
+ }
+ cell->schDlSlotInfo[dciSlot]->rarAlloc = dciSlotAlloc;
+
+ /* Check if RAR PDSCH occasion same as SSB and SIB1 occasion */
+ ssbOccasion = schCheckSsbOcc(rarTime, cell);
+ sib1Occasion = schCheckSib1Occ(rarTime, cell);
+
+ /* Fill PDCCH and PDSCH scheduling information for RAR */
+ schFillRar(dciSlotAlloc, cell->raReq[ueIdx]->raRnti,
+ cell->cellCfg.phyCellId, cell->cellCfg.ssbSchCfg.ssbOffsetPointA, k0Index,
+ ssbOccasion, sib1Occasion);
+
+ /* Allocate resources for msg3 */
+ msg3PuschInfo = schAllocMsg3Pusch(cell->instIdx, cell->raReq[ueIdx]->rachInd->crnti, k2Index, msg3Slot);
+ if(msg3PuschInfo)
+ {
+ /* Fill RAR info */
+ dciSlotAlloc->rarInfo.raRnti = cell->raReq[ueIdx]->raRnti;
+ dciSlotAlloc->rarInfo.tcrnti = cell->raReq[ueIdx]->rachInd->crnti;
+ dciSlotAlloc->rarInfo.RAPID = cell->raReq[ueIdx]->rachInd->preambleIdx;
+ dciSlotAlloc->rarInfo.ta = cell->raReq[ueIdx]->rachInd->timingAdv;
+ dciSlotAlloc->rarInfo.ulGrant.bwpSize = cell->cellCfg.schInitialUlBwp.bwp.freqAlloc.numPrb;
+ /* Spec 38.213, section 8.2, 0 : MSG3 PUSCH will be transmitted without frequency hopping */
+ dciSlotAlloc->rarInfo.ulGrant.freqHopFlag = 0;
+ dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.startPrb = msg3PuschInfo->fdAlloc.startPrb;
+ dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.numPrb = msg3PuschInfo->fdAlloc.numPrb;
+ dciSlotAlloc->rarInfo.ulGrant.k2Index = k2Index;
+ dciSlotAlloc->rarInfo.ulGrant.mcs = msg3PuschInfo->tbInfo.mcs;
+ dciSlotAlloc->rarInfo.ulGrant.tpc = 3; /* TODO : Check appropriate value to be filled */
+ /* Spec 38.213, section 8.2 : In a contention based random access
+ * procedure, the CSI request field is reserved. */
+ dciSlotAlloc->rarInfo.ulGrant.csiReq = 0;
+ }
+
+ /* Check if both DCI and RAR are sent in the same slot.
+ * If not, allocate memory RAR PDSCH slot to store RAR info
+ */
+ if(dciSlot == rarSlot)
+ dciSlotAlloc->pduPres = BOTH;
+ else
+ {
+ /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
+ SCH_ALLOC(rarSlotAlloc, sizeof(RarAlloc));
+ if(rarSlotAlloc == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH : Memory Allocation failed for rarSlotAlloc");
+ SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
+ return;
+ }
+ cell->schDlSlotInfo[rarSlot]->rarAlloc = rarSlotAlloc;
+
+ /* Copy all RAR info */
+ memcpy(rarSlotAlloc, dciSlotAlloc, sizeof(RarAlloc));
+ rarSlotAlloc->rarPdcchCfg.dci.pdschCfg = &rarSlotAlloc->rarPdschCfg;
+
+ /* Assign correct PDU types in corresponding slots */
+ rarSlotAlloc->pduPres = PDSCH_PDU;
+ dciSlotAlloc->pduPres = PDCCH_PDU;
+ dciSlotAlloc->pdschSlot = rarSlot;
+ }
+
+ /* Create raCb at SCH */
+ createSchRaCb(cell->raReq[ueIdx]->rachInd->crnti, cell->instIdx);
+
+ SCH_FREE(cell->raReq[ueIdx]->rachInd, sizeof(RachIndInfo));
+ SCH_FREE(cell->raReq[ueIdx], sizeof(SchRaReq));
+ }
+ ueIdx++;
+ } /* End of while(ueIdx < MAX_NUM_UE) */
+}