+void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
+{
+ if(resrcInfo->SchPucchFormat.format1)
+ {
+ ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
+ ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
+ ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
+ ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
+ ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
+ ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
+ }
+}
+
+/**
+ * @brief Function to fill Pucch format for UL Sched Info
+ *
+ * @details
+ *
+ * Function : fillUlSchedPucchFormat
+ *
+ * Function to fill Pucch format for UL Sched Info
+ *
+ * @param[in] pucchFormat , SchPucchInfo pointer,
+ * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
+ * @return void
+ **/
+
+uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
+ SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
+{
+ uint8_t ret = ROK;
+
+ switch(pucchFormat)
+ {
+ case PUCCH_FORMAT_0:
+ {
+ if(resrcInfo)
+ fillPucchFormat0(ulSchedPucch, resrcInfo);
+ return ret;
+ }
+ case PUCCH_FORMAT_1:
+ {
+ if(resrcInfo)
+ {
+ fillPucchFormat1(ulSchedPucch, resrcInfo);
+ }
+ if(formatCfg)
+ {
+ memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
+ }
+ return ret;
+ }/* To Add support for more Pucch Format */
+
+ default:
+ DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
+ ret = RFAILED;
+ return ret;
+ }
+ return ret;
+}
+
+/**
+ * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
+ *
+ * @details
+ *
+ * Function : fillUlSchedPucchDedicatedCfg
+ *
+ * Function to fill Pucch Dedicated Cfg for UL Sched Info
+ *
+ * @param[in] pucchFormat to be filled
+ * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
+ * @return void
+ **/
+
+uint8_t fillUlSchedPucchDedicatedCfg(uint16_t numSlots, SchPucchCfg *pucchDedCfg,\
+ SlotIndInfo *slotInfo, SchPucchInfo *ulSchedPucch)
+{
+ uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
+ uint16_t srOffset = 0;
+
+ ret = ROK;
+ if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
+ {
+ //Assuming one entry in the list
+ for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
+ {
+ for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
+ {
+ if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
+ pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
+ {
+ ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
+ ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
+ ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
+ ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
+ ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
+ &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
+ if(ret == RFAILED)
+ return ret;
+ }
+ }
+ }
+ }
+ if(pucchDedCfg->format1)
+ {
+ memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
+ ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
+ if(ret == RFAILED)
+ return ret;
+ }
+
+ /* setting SR and UCI flag */
+ if(pucchDedCfg->schedReq)
+ {
+ for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
+ {
+ srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
+ srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
+ break;
+ }
+ if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
+ {
+ ulSchedPucch->srFlag = true;
+ ulSchedPucch->uciFlag = true;
+ }
+ }
+ return ret;
+}
+
+/**
+ * @brief Function to fill Pucch Resource Info
+ *
+ * @details
+ *
+ * Function : fillPucchResourceInfo
+ *
+ * Function to fill Pucch Resource Info
+ *
+ * @param[in] SchPucchInfo *schPucchInfo, Inst inst
+ * @return ROK/RFAILED
+ **/
+
+uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst)
+{
+ uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
+ SchCellCb *cell = schCb[inst].cells[inst];
+ SchPucchCfgCmn *pucchCfg = NULLP;
+ SchBwpParams *ulBwp = NULLP;
+
+ GET_UE_IDX(schPucchInfo->rnti, ueIdx);
+ if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
+ {
+ /* fill pucch dedicated cfg */
+ ret = fillUlSchedPucchDedicatedCfg(cell->numSlots,\
+ &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg, &cell->slotInfo, schPucchInfo);
+ if(ret == RFAILED)
+ {
+ memset(schPucchInfo, 0, sizeof(SchPucchInfo));
+ DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
+ return ret;
+ }
+ }
+ else
+ {
+ /* fill pucch common cfg */
+ /* derive pucchResourceSet from schCellCfg */
+ pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
+ pucchIdx = pucchCfg->pucchResourceCommon;
+ ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
+ schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
+ schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
+ schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
+ schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
+ schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
+
+ /* set SR and UCI flag to false */
+ schPucchInfo->srFlag = true;
+ schPucchInfo->uciFlag = true;
+ }
+ /* set HARQ flag to true */
+ schPucchInfo->harqFlag = true;
+ schPucchInfo->numHarqBits = 1; /* 1 bit for HARQ */
+
+ return ROK;
+}
+
+/**
+ * @brief resource allocation for UL
+ *
+ * @details
+ *
+ * Function : schUlResAlloc
+ *
+ * This function handles UL Resource allocation
+ *
+ * @param[in] SchCellCb *cell, cellCb
+ * @return void
+ **/
+uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
+{
+ int ret = ROK;
+ UlSchedInfo ulSchedInfo;
+ SchUlSlotInfo *schUlSlotInfo = NULLP;
+ SlotIndInfo ulTimingInfo;
+ memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
+
+ /* add PHY delta */
+ ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA+SCHED_DELTA);
+
+ ulSchedInfo.cellId = cell->cellId;
+ ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
+ ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
+ ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
+
+ /* Schedule resources for PRACH */
+ schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
+
+ schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
+ if(schUlSlotInfo->schPuschInfo)
+ {
+ ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
+ ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
+ memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
+ sizeof(SchPuschInfo));
+ SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
+ schUlSlotInfo->schPuschInfo = NULL;
+ }
+
+ if(schUlSlotInfo->pucchPres)
+ {
+ ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
+ fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst);
+ memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
+ sizeof(SchPucchInfo));
+ memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
+ }
+
+ //send msg to MAC
+ ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
+ if(ret != ROK)
+ {
+ DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
+ }
+
+ schInitUlSlot(schUlSlotInfo);
+ return ret;
+}
+
+/*******************************************************************
+ *
+ * @brief Fills pdcch and pdsch info for msg4
+ *
+ * @details
+ *
+ * Function : schDlRsrcAllocMsg4
+ *
+ * Functionality:
+ * Fills pdcch and pdsch info for msg4
+ *
+ * @params[in]
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint8_t schDlRsrcAllocMsg4(DlMsgAlloc *msg4Alloc, SchCellCb *cell, uint16_t slot)
+{
+ uint8_t coreset0Idx = 0;
+ uint8_t numRbs = 0;
+ uint8_t firstSymbol = 0;
+ uint8_t numSymbols = 0;
+ uint8_t offset = 0;
+ uint8_t offsetPointA;
+ uint8_t FreqDomainResource[6] = {0};
+ uint16_t tbSize = 0;
+ uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */
+ uint8_t mcs = 4; /* MCS fixed to 4 */
+ SchBwpDlCfg *initialBwp;
+
+ PdcchCfg *pdcch = &msg4Alloc->dlMsgPdcchCfg;
+ PdschCfg *pdsch = &msg4Alloc->dlMsgPdschCfg;
+ BwpCfg *bwp = &msg4Alloc->bwp;
+
+ initialBwp = &cell->cellCfg.schInitialDlBwp;
+ offsetPointA = cell->cellCfg.ssbSchCfg.ssbOffsetPointA;
+ coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
+
+ /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
+ numRbs = coresetIdxTable[coreset0Idx][1];
+ numSymbols = coresetIdxTable[coreset0Idx][2];
+ offset = coresetIdxTable[coreset0Idx][3];
+
+ /* calculate time domain parameters */
+ uint16_t mask = 0x2000;
+ for(firstSymbol=0; firstSymbol<14;firstSymbol++)
+ {
+ if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
+ break;
+ else
+ mask = mask>>1;
+ }
+
+ /* calculate the PRBs */
+ freqDomRscAllocType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
+
+ /* fill BWP */
+ bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
+ bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
+ bwp->subcarrierSpacing = initialBwp->bwp.scs;
+ bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
+
+ /* fill the PDCCH PDU */
+ pdcch->coresetCfg.startSymbolIndex = firstSymbol;
+ pdcch->coresetCfg.durationSymbols = numSymbols;
+ memcpy(pdcch->coresetCfg.freqDomainResource,FreqDomainResource,6);
+ pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
+ pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
+ pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
+ pdcch->coresetCfg.coreSetType = 0;
+ pdcch->coresetCfg.coreSetSize = numRbs;
+ pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
+ pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
+ pdcch->numDlDci = 1;
+ pdcch->dci.rnti = cell->schDlSlotInfo[slot]->dlMsgInfo->crnti;
+ pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
+ pdcch->dci.scramblingRnti = 0;
+ pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
+ pdcch->dci.aggregLevel = 4;
+ pdcch->dci.beamPdcchInfo.numPrgs = 1;
+ pdcch->dci.beamPdcchInfo.prgSize = 1;
+ pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
+ pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
+ pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
+ pdcch->dci.txPdcchPower.powerValue = 0;
+ pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
+
+ /* fill the PDSCH PDU */
+ uint8_t cwCount = 0;
+ pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
+ pdsch->rnti = cell->schDlSlotInfo[slot]->dlMsgInfo->crnti;
+ pdsch->pduIndex = 0;
+ pdsch->numCodewords = 1;
+ for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
+ {
+ pdsch->codeword[cwCount].targetCodeRate = 308;
+ pdsch->codeword[cwCount].qamModOrder = 2;
+ pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
+ pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
+ pdsch->codeword[cwCount].rvIndex = 0;
+ /* 38.214: Table 5.1.3.2-1, divided by 8 to get the value in bytes */
+ /* TODO : Calculate tbSize based of DL CCCH msg size */
+ tbSize = schCalcTbSize(2664/8); /* send this value to the func in bytes when considering msg4 size */
+ pdsch->codeword[cwCount].tbSize = tbSize;
+ }
+ pdsch->dataScramblingId = cell->cellCfg.phyCellId;
+ pdsch->numLayers = 1;
+ pdsch->transmissionScheme = 0;
+ pdsch->refPoint = 0;
+ pdsch->dmrs.dlDmrsSymbPos = 2;
+ pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
+ pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
+ pdsch->dmrs.scid = 0;
+ pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
+ pdsch->dmrs.dmrsPorts = 0;
+ pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
+ pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
+ pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
+ pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
+ /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
+ pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB;
+ pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols);
+ pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
+ pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */
+ pdsch->pdschTimeAlloc.timeAlloc.numSymb = 12;
+ pdsch->beamPdschInfo.numPrgs = 1;
+ pdsch->beamPdschInfo.prgSize = 1;
+ pdsch->beamPdschInfo.digBfInterfaces = 0;
+ pdsch->beamPdschInfo.prg[0].pmIdx = 0;
+ pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
+ pdsch->txPdschPower.powerControlOffset = 0;
+ pdsch->txPdschPower.powerControlOffsetSS = 0;
+
+ pdcch->dci.pdschCfg = pdsch;
+
+ return ROK;
+}
+
+uint16_t schAllocPucchResource(SchCellCb *cell, uint16_t crnti, uint16_t slot)
+{
+ uint8_t k1 = SCH_DEFAULT_K1, ueIdx = 0, dlToUlAckIdx;
+ uint16_t pucchSlot = 0;
+ SchUlSlotInfo *schUlSlotInfo = NULLP;
+ SchPucchCfg *schPucchCfg = NULLP;
+
+ GET_UE_IDX(crnti, ueIdx);
+ if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
+ {
+ schPucchCfg = &(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg);
+ if(schPucchCfg->dlDataToUlAck)
+ {
+ for(dlToUlAckIdx = 0; dlToUlAckIdx < schPucchCfg->dlDataToUlAck->dlDataToUlAckListCount; dlToUlAckIdx++)
+ {
+ //For now considering only the first value in the list
+ k1 = schPucchCfg->dlDataToUlAck->dlDataToUlAckList[dlToUlAckIdx];
+ break;