+/*******************************************************************
+ *
+ * @brief Fills k0 and k1 information table for FDD
+ *
+ * @details
+ *
+ * Function : BuildK0K1TableForFdd
+ *
+ * Functionality:
+ * Fills k0 and k1 information table for FDD
+ *
+ * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
+ * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
+ * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
+ * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
+SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
+{
+
+ uint8_t k1TmpVal =0, cfgIdx=0;
+ uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
+
+ /* TODO Commented these below lines for resolving warnings. Presently these variable are not
+ * required but this will require for harq processing */
+ // uint8_t k0TmpVal = 0;
+ // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
+ // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
+
+ /* Initialization the structure and storing the total slot values. */
+ memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
+ k0K1InfoTbl->tblSize = cell->numSlots;
+
+ /* Storing time domain resource allocation list based on common or dedicated configuration. */
+ if(pdschCfgCmnPres == true)
+ {
+ numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
+ for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
+ {
+ /*TODO uncomment this line during harq processing */
+ //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
+ }
+ }
+ else
+ {
+ numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
+ for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
+ {
+ /*TODO uncomment this line during harq processing */
+ //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
+ }
+ }
+
+ /* Checking all the slots for K0 and K1 values. */
+ for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
+ {
+ numK0 = 0;
+ /* Storing the values of k0 based on time domain resource
+ * allocation list. If the value is unavailable then fill default values,
+ * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
+ for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
+ {
+ /* TODO These if 0 we will remove during harq processing */
+#if 0
+ if(pdschCfgCmnPres == true)
+ {
+ k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
+ }
+ else
+ {
+ if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
+ {
+ k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
+ }
+ else
+ {
+ k0TmpVal = DEFAULT_K0_VALUE;
+ }
+ }
+#endif
+ /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
+ * then skip else continue storing the values. */
+ numK1 = 0;
+ for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
+ {
+ k1TmpVal = UlAckTbl[k1Index];
+ if(k1TmpVal <= MIN_NUM_K1_IDX)
+ {
+ continue;
+ }
+
+ k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
+ /* TODO Store K1 index where harq feedback will be received in harq table. */
+ }
+ if(numK1)
+ {
+ k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
+ k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
+ numK0++;
+ }
+ }
+ if(numK0)
+ {
+ k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
+ }
+ }
+}
+
+/*******************************************************************
+ *
+ * @brief Fills k0 and k1 information table
+ *
+ * @details
+ *
+ * Function : BuildK0K1Table
+ *
+ * Functionality:
+ * Fills K0 and k1 information table
+ *
+ * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
+ * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
+ * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
+ * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
+SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
+{
+
+#ifdef NR_TDD
+ SlotConfig slotCfg;
+ bool ulSlotPresent = false;
+ uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
+ uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
+ SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
+ SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
+#endif
+
+ if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
+ {
+ BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
+ }
+ else
+ {
+#ifdef NR_TDD
+
+ /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
+ memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
+ k0K1InfoTbl->tblSize = cell->numSlots;
+ totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod);
+
+ /* Storing time domain resource allocation list based on common or
+ * dedicated configuration availability. */
+ if(pdschCfgCmnPres == true)
+ {
+ numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
+ for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
+ {
+ cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
+ }
+ }
+ else
+ {
+ numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
+ for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
+ {
+ dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
+ }
+ }
+
+ /* Checking all possible indexes for K0 and K1 values. */
+ for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
+ {
+ /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
+ slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
+ if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
+ {
+ continue;
+ }
+
+ ulSlotPresent = false;
+ /* Storing K0 , start symbol and length symbol for further processing.
+ * If K0 value is not available then we can fill the default values
+ * given in spec 38.331. */
+ numK0 = 0;
+ for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
+ {
+ if(pdschCfgCmnPres == true)
+ {
+ k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
+ startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
+ endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
+ }
+ else
+ {
+ if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
+ {
+ k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
+ }
+ else
+ {
+ k0TmpVal = DEFAULT_K0_VALUE;
+ }
+ startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
+ endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
+ }
+
+ /* If current slot + k0 is UL then skip the slot
+ * else if it is DL slot then continue the next steps
+ * else if it is a FLEXI slot then check symbols of slot, It should not
+ * contain any UL slot. */
+ tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
+ slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
+ if(slotCfg == UL_SLOT)
+ {
+ continue;
+ }
+ if(slotCfg == FLEXI_SLOT)
+ {
+ for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
+ {
+ slotCfg = cell->slotCfg[tmpSlot][checkSymbol];
+ if(slotCfg == UL_SLOT)
+ {
+ ulSlotPresent = true;
+ break;
+ }
+ }
+ if(ulSlotPresent == true)
+ {
+ continue;
+ }
+ }
+
+ ulSlotPresent = false; //Re-initializing
+
+ /* If current slot + k0 + k1 is a DL slot then skip the slot
+ * else if it is UL slot then store the information
+ * else if it is FLEXI slot then check the symbols, it must have
+ * at least one UL symbol. */
+ numK1 = 0;
+ for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
+ {
+ k1TmpVal = UlAckTbl[k1Index];
+ if(k1TmpVal > MIN_NUM_K1_IDX)
+ {
+ tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
+ slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
+ if(slotCfg == DL_SLOT)
+ {
+ continue;
+ }
+ if(slotCfg == FLEXI_SLOT)
+ {
+ for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
+ {
+ if(cell->slotCfg[tmpSlot][checkSymbol] == UL_SYMBOL)
+ {
+ ulSlotPresent = true;
+ break;
+ }
+ }
+ }
+ if(ulSlotPresent == true || slotCfg == UL_SLOT)
+ {
+ k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
+ /* TODO Store K1 index where harq feedback will be received
+ * in harq table. */
+ }
+ }
+ }
+
+ /* Store all the values if all condition satisfies. */
+ if(numK1)
+ {
+ k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
+ k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
+ numK0++;
+ }
+ }
+ if(numK0)
+ {
+ k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
+ }
+ }
+#endif
+ }
+}
+
+/*******************************************************************
+*
+* @brief Fills K2 information table for FDD
+*
+* @details
+*
+* Function : BuildK2InfoTableForFdd
+*
+* Functionality:
+* Fills K2 information table for FDD
+*
+* @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
+* uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
+* @return ROK - success
+* RFAILED - failure
+*
+* ****************************************************************/
+void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
+SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
+{
+ uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
+
+ /* Initialization the structure and storing the total slot values. */
+ memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
+ k2InfoTbl->tblSize = cell->numSlots;
+ if(msg3K2InfoTbl)
+ msg3K2InfoTbl->tblSize = cell->numSlots;
+
+ /* Checking all possible indexes for K2. */
+ for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
+ {
+ /* Storing K2 values. */
+ for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
+ {
+ k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
+ k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
+ k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
+
+ /* Updating K2 values for MSG3 */
+ if(msg3K2InfoTbl)
+ {
+ msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
+ msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
+ msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
+ }
+ }
+ }
+}
+
+/*******************************************************************
+ *
+ * @brief Fills K2 information table
+ *
+ * @details
+ *
+ * Function : BuildK2InfoTable
+ *
+ * Functionality:
+ * Fills K2 information table
+ *
+ * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
+ * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
+SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
+{
+
+#ifdef NR_TDD
+ bool dlSymbolPresent = false;
+ uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
+ uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
+ SlotConfig currentSlot;
+#endif
+
+ if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
+ {
+ BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
+ }
+ else
+ {
+#ifdef NR_TDD
+
+ /* Initialization the structure and storing the total slot values. */
+ memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
+ k2InfoTbl->tblSize = cell->numSlots;
+ if(msg3K2InfoTbl)
+ msg3K2InfoTbl->tblSize = cell->numSlots;
+ totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod);
+
+ /* Checking all possible indexes for K2. */
+ for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
+ {
+ currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
+
+ /* If current slot is UL then skip because PDCCH is sent only in DL slots */
+ if(currentSlot != UL_SLOT)
+ {
+ for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
+ {
+ /* Storing k2, startSymbol, endSymbol information for further processing.
+ * If k2 is absent then fill the default values given in spec 38.331
+ * PUSCH-TimeDomainResourceAllocationList field descriptions */
+ k2Val = timeDomRsrcAllocList[k2Index].k2;
+ if(!k2Val)
+ {
+ switch(cell->cellCfg.ssbScs)
+ {
+ case SCS_15KHZ:
+ k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
+ break;
+ case SCS_30KHZ:
+ k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
+ break;
+ case SCS_60KHZ:
+ k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
+ break;
+ case SCS_120KHZ:
+ k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
+ break;
+ }
+ }
+
+ /* Current slot + k2 should be either UL or FLEXI slot.
+ * If slot is FLEXI then check all the symbols of that slot,
+ * it should not contain any DL or FLEXI slot */
+ k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
+ slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
+ if(slotCfg != DL_SLOT)
+ {
+ if(slotCfg == FLEXI_SLOT)
+ {
+ startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
+ endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
+ dlSymbolPresent = false;
+ for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
+ {
+ currentSymbol = cell->slotCfg[k2TmpVal][checkSymbol];
+ if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
+ {
+ dlSymbolPresent = true;
+ break;
+ }
+ }
+ }
+ /* Store all the values if all condition satisfies. */
+ if(dlSymbolPresent != true || slotCfg == UL_SLOT)
+ {
+ numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
+ k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
+ k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
+ }
+ }
+
+ if(msg3K2InfoTbl)
+ {
+ msg3Delta = puschDeltaTable[cell->numerology];
+
+ /* Check for K2 for MSG3 */
+ /* Current slot + k2 should be either UL or FLEXI slot.
+ * If slot is FLEXI then check all the symbols of that slot,
+ * it should not contain any DL or FLEXI slot */
+ msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
+ slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
+ if(slotCfg != DL_SLOT)
+ {
+ if(slotCfg == FLEXI_SLOT)
+ {
+ startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
+ endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
+ dlSymbolPresent = false;
+ for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
+ {
+ currentSymbol = cell->slotCfg[msg3K2TmpVal][checkSymbol];
+ if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
+ {
+ dlSymbolPresent = true;
+ break;
+ }
+ }
+ }
+ /* Store all the values if all condition satisfies. */
+ if(dlSymbolPresent != true || slotCfg == UL_SLOT)
+ {
+ numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
+ msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
+ msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
+ }
+ }
+ }
+ }
+ }
+ }
+#endif
+ }
+}
+
+/*******************************************************************************************
+ *
+ * @brief Allocate the PRB using RRM policy
+ *
+ * @details
+ *
+ * Function : prbAllocUsingRRMPolicy
+ *
+ * Functionality:
+ * [Step1]: Traverse each Node in the LC list
+ * [Step2]: Check whether the LC has ZERO requirement then clean this LC
+ * [Step3]: Calcualte the maxPRB for this LC.
+ * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
+ * sharedPRB
+ * b. For Default, just SharedPRB count
+ * [Step4]: If the LC is the First one to be allocated for this UE then add
+ * TX_PAYLODN_LEN to reqBO
+ * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
+ * based on reqBO and maxPRB left.
+ * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
+ * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
+ * [Step8]: Continue the next loop from List->head
+ *
+ * [Loop Exit]:
+ * [Exit1]: If all the LCs are allocated in list
+ * [Exit2]: If PRBs are exhausted
+ *
+ * @params[in] I/P > lcLinkList pointer (LcInfo list)
+ * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
+ * I/P > mcsIdx and PDSCH symbols count
+ * I/P & O/P > Shared PRB , reserved PRB Count
+ * I/P & O/P > Total TBS size accumulated
+ * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
+ * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
+ *
+ * @return void
+ *
+ * *******************************************************************************************/
+void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
+ uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
+{
+ CmLList *node = NULLP;
+ LcInfo *lcNode = NULLP;
+ uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
+
+ if(lcLL == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH: LcList not present");
+ return;
+ }
+ node = lcLL->first;
+
+ /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
+ * For Other LcList, remReservedPRB = 0*/
+ if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
+ {
+ remReservedPRB = *reservedPRB;
+ }
+
+ /*[Step1]*/
+ while(node)
+ {
+#if 0
+ /*For Debugging purpose*/
+ printLcLL(lcLL);
+#endif
+ lcNode = (LcInfo *)node->node;
+
+ /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
+ * process of LCID which was fully allocated. Check is just for safety purpose*/
+ if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
+ {
+ DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
+ lcNode->lcId);
+ deleteNodeFromLList(lcLL, node);
+ SCH_FREE(lcNode, sizeof(LcInfo));
+ node = lcLL->first;
+ continue;
+ }
+
+ /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
+ if(lcNode->allocBO != 0)
+ {
+ DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
+ return;
+ }
+
+ /*[Exit2]: If PRBs are exhausted*/
+ if(isDedicatedPRB)
+ {
+ /*Loop Exit: All resources exhausted*/
+ if(remReservedPRB == 0 && *sharedPRB == 0)
+ {
+ DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
+ return;
+ }
+ }
+ else
+ {
+ /*Loop Exit: All resources exhausted*/
+ if(*sharedPRB == 0)
+ {
+ DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
+ return;
+ }
+ }
+
+ /*[Step3]*/
+ maxPRB = remReservedPRB + *sharedPRB;
+
+ /*[Step4]*/
+ if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
+ {
+ DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
+ lcNode->lcId);
+ *isTxPayloadLenAdded = TRUE;
+ lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
+ mcsIdx, numSymbols, maxPRB, &estPrb);
+ lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
+ }
+ else if((srRcvd != NULLP) && (*srRcvd == TRUE))
+ {
+ DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
+ lcNode->lcId);
+ *srRcvd = FALSE;
+ lcNode->reqBO += UL_GRANT_SIZE;
+ lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
+ }
+ else
+ {
+ /*[Step4]*/
+ lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
+ mcsIdx, numSymbols, maxPRB, &estPrb);
+ }
+
+ /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
+ * estimated PRB allocated*/
+ if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
+ {
+ remReservedPRB = remReservedPRB - estPrb;
+ }
+ else /*LC requirement need PRB share from SharedPRB*/
+ {
+ if(*sharedPRB <= (estPrb - remReservedPRB))
+ {
+ DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
+ *sharedPRB = 0;
+ }
+ else
+ {
+ *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
+ }
+ remReservedPRB = 0;
+ }
+
+ /*[Step7]*/
+ lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
+ lcNode->allocPRB = estPrb;
+ cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
+
+ /*[Step8]:Next loop: First LC to be picked from the list
+ * because Allocated Nodes are moved to the last*/
+ node = lcLL->first;
+
+ }
+ return;
+}
+
+/*******************************************************************************************
+ *
+ * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
+ * BO Report
+ *
+ * @details
+ *
+ * Function : updateGrantSizeForBoRpt
+ *
+ * Functionality:
+ * Check the LC List and fill the LC and GrantSize to be sent to MAC as
+ * BO Report in dlMsgAlloc Pointer
+ *
+ * @params[in] I/P > lcLinkList pointer (LcInfo list)
+ * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
+ * I/P & O/P > BsrInfo (applicable for UL)
+ * I/P & O/P > accumalatedBOSize
+ * @return void
+ *
+ * *******************************************************************************************/
+void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgSchInfo *dlMsgAlloc,\
+ BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
+{
+ CmLList *node = NULLP, *next = NULLP;
+ LcInfo *lcNode = NULLP;
+
+ if(lcLL == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH: LcList not present");
+ return;
+ }
+
+ if(lcLL->count)
+ {
+ node = lcLL->first;
+ }
+ else
+ {
+ /*lcLL is empty*/
+ return;
+ }
+
+ /*Traverse List*/
+ while(node)
+ {
+ next = node->next;
+ lcNode = (LcInfo *)node->node;
+ if(lcNode != NULLP)
+ {
+ DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
+ lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
+ if(dlMsgAlloc != NULLP)
+ {
+
+ /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
+ * report for allocation can be sent to MAC*/
+ dlMsgAlloc->numOfTbs = 1;
+ dlMsgAlloc->transportBlock[0].lcSchInfo[dlMsgAlloc->transportBlock[0].numLc].lcId = lcNode->lcId;
+ dlMsgAlloc->transportBlock[0].lcSchInfo[dlMsgAlloc->transportBlock[0].numLc].schBytes = lcNode->allocBO;
+
+ /*Calculate the Total Payload/BO size allocated*/
+ *accumalatedBOSize += dlMsgAlloc->transportBlock[0].lcSchInfo[dlMsgAlloc->transportBlock[0].numLc].schBytes;
+
+ DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
+ lcNode->lcId,lcNode->reqBO, dlMsgAlloc->transportBlock[0].numLc, *accumalatedBOSize);
+
+ dlMsgAlloc->transportBlock[0].numLc++;
+ handleLcLList(lcLL, lcNode->lcId, DELETE);
+ }
+ else if(bsrInfo != NULLP)
+ {
+ *accumalatedBOSize += lcNode->allocBO;
+ DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
+ lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
+ }
+ }
+ node = next;
+ }/*End of while*/
+ return;
+}
+
+/*******************************************************************
+*
+* @brief fill DL message information for MSG4 and Dedicated DL Msg
+*
+* @details
+*
+* Function : fillDlMsgInfo
+*
+* Functionality:
+* fill DL message information for MSG4 and Dedicated DL Msg
+*
+* @params[in] DlMsgInfo *dlMsgInfo, uint16_t crnti
+* @params[in] bool isRetx, SchDlHqProcCb *hqP
+* @return void
+*
+*******************************************************************/
+void fillDlMsgInfo(DlMsgSchInfo *dlMsgSchInfo, uint16_t crnti, bool isRetx, SchDlHqProcCb *hqP)
+{
+ hqP->tbInfo[0].isEnabled = TRUE;
+ hqP->tbInfo[0].state = HQ_TB_WAITING;
+ hqP->tbInfo[0].txCntr++;
+ hqP->tbInfo[1].isEnabled = TRUE;
+ hqP->tbInfo[1].state = HQ_TB_WAITING;
+ hqP->tbInfo[1].txCntr++;
+ dlMsgSchInfo->crnti = crnti;
+ dlMsgSchInfo->transportBlock[0].ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
+ dlMsgSchInfo->harqProcNum = hqP->procId;
+ dlMsgSchInfo->dlAssignIdx = 0;
+ dlMsgSchInfo->pucchTpc = 0;
+ dlMsgSchInfo->pucchResInd = PUCCH_RES_IND;
+ dlMsgSchInfo->harqFeedbackInd = hqP->k1;
+ dlMsgSchInfo->dciFormatId = 1;
+}
+
+/*******************************************************************
+ *
+ * @brief sch Process pending Msg4 Req
+ *
+ * @details
+ *
+ * Function : schProcessMsg4Req
+ *
+ * Functionality:
+ * sch Process pending Msg4 Req
+ *
+ * @params[in] SchCellCb *cell, cell cb struct pointer
+ * @params[in] SlotTimingInfo currTime, current timing info
+ * @params[in] uint8_t ueId, ue ID
+ * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
+ * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ *******************************************************************/
+
+uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
+{
+ uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
+ SlotTimingInfo pdcchTime, pdschTime, pucchTime;
+ DlMsgSchInfo *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
+ DlMsgSchInfo *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
+
+ if(cell == NULL)
+ {
+ DU_LOG("\nERROR --> SCH: schProcessMsg4Req() : Cell is NULL");
+ return RFAILED;
+ }
+
+ if (isRetxMsg4 == FALSE)
+ {
+ if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
+ {
+ DU_LOG("\nERROR --> SCH: schProcessMsg4Req() : No process");
+ return RFAILED;
+ }
+ }
+
+ if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
+ &pucchTime, isRetxMsg4, *msg4HqProc, NULLP) != true )
+ {
+ DU_LOG("\nERROR --> SCH: schProcessMsg4Req() : k0 k1 not found");
+ return RFAILED;
+ }
+
+ if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
+ {
+ SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgSchInfo));
+ if(dciSlotAlloc == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
+ return RFAILED;
+ }
+ cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
+ memset(dciSlotAlloc, 0, sizeof(DlMsgSchInfo));
+ }
+ else
+ dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
+
+ /* Fill PDCCH and PDSCH scheduling information for Msg4 */
+ if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
+ {
+ DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
+ if(!dciSlotAlloc->dlMsgPdschCfg)
+ {
+ SCH_FREE(dciSlotAlloc, sizeof(DlMsgSchInfo));
+ cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
+ }
+ return RFAILED;
+ }
+
+ /* Check if both DCI and RAR are sent in the same slot.
+ * If not, allocate memory RAR PDSCH slot to store RAR info
+ */
+ if(pdcchTime.slot == pdschTime.slot)
+ {
+ SCH_ALLOC(dciSlotAlloc->dlMsgPdschCfg, sizeof(PdschCfg));
+ if(!dciSlotAlloc->dlMsgPdschCfg)
+ {
+ DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc->dlMsgPdschCfg");
+ SCH_FREE(dciSlotAlloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
+ SCH_FREE(dciSlotAlloc, sizeof(DlMsgSchInfo));
+ cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
+ return RFAILED;
+ }
+ memcpy(dciSlotAlloc->dlMsgPdschCfg, &dciSlotAlloc->dlMsgPdcchCfg->dci[0].pdschCfg, sizeof(PdschCfg));
+ }
+ else
+ {
+ /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
+ if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
+ {
+ SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgSchInfo));
+ if(msg4SlotAlloc == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
+ SCH_FREE(dciSlotAlloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
+ if(!dciSlotAlloc->dlMsgPdschCfg)
+ {
+ SCH_FREE(dciSlotAlloc, sizeof(DlMsgSchInfo));
+ cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
+ }
+ return RFAILED;
+ }
+ cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
+ memset(msg4SlotAlloc, 0, sizeof(DlMsgSchInfo));
+ }
+ else
+ msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
+
+ /* Copy all msg4 pdschcfg info */
+ msg4SlotAlloc->crnti =dciSlotAlloc->crnti;
+ msg4SlotAlloc->bwp = dciSlotAlloc->bwp;
+ SCH_ALLOC(msg4SlotAlloc->dlMsgPdschCfg, sizeof(PdschCfg));
+ if(msg4SlotAlloc->dlMsgPdschCfg)
+ {
+ memcpy(msg4SlotAlloc->dlMsgPdschCfg, &dciSlotAlloc->dlMsgPdcchCfg->dci[0].pdschCfg, sizeof(PdschCfg));
+ }
+ else
+ {
+ SCH_FREE(dciSlotAlloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
+ if(dciSlotAlloc->dlMsgPdschCfg == NULLP)
+ {
+ SCH_FREE(dciSlotAlloc, sizeof(DlMsgSchInfo));
+ cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
+
+ }
+ SCH_FREE(msg4SlotAlloc, sizeof(DlMsgSchInfo));
+ cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
+ DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc->dlMsgPdschCfg");
+ return RFAILED;
+ }
+ }
+
+ cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
+
+ cell->raCb[ueId-1].msg4recvd = FALSE;
+ if(isRetxMsg4)
+ {
+ cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
+ }
+ return ROK;
+}
+
+/*******************************************************************
+ *
+ * @brief sch Process pending Sr or Bsr Req
+ *
+ * @details
+ *
+ * Function : updateBsrAndLcList
+ *
+ * Functionality:
+ * Updating the BSRInfo in UECB and Lclist
+ *
+ * @params[in] SchCellCb *cell, SlotTimingInfo currTime
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ *******************************************************************/
+void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
+{
+ CmLList *node = NULLP, *next = NULLP;
+ LcInfo *lcNode = NULLP;
+
+ if(lcLL == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH: LcList not present");
+ return;
+ }
+
+ if(lcLL->count)
+ {
+ node = lcLL->first;
+ }
+ else
+ {
+ /*lcLL is empty*/
+ return;
+ }
+
+ while(node)
+ {
+ next = node->next;
+ lcNode = (LcInfo *)node->node;
+ if(lcNode != NULLP)
+ {
+ /*Only when Status is OK then allocation is marked as ZERO and reqBO
+ * is updated in UE's DB. If Failure, then allocation is added to reqBO
+ * and same is updated in Ue's DB inside BSR Info structure*/
+ if(status == ROK)
+ {
+ lcNode->allocBO = 0;
+ }
+
+ lcNode->reqBO += lcNode->allocBO;
+ bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
+ if(lcNode->reqBO == 0)
+ {
+ handleLcLList(lcLL, lcNode->lcId, DELETE);
+ }
+ }
+ node = next;
+ }
+}
+
+/*******************************************************************
+ *
+ * @brief sch Process pending Sr or Bsr Req
+ *
+ * @details
+ *
+ * Function : schProcessSrOrBsrReq
+ *
+ * Functionality:
+ * sch Process pending Sr or Bsr Req
+ *
+ * @params[in] SchCellCb *cell, SlotTimingInfo currTime
+ * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
+ * @return true - success
+ * false - failure
+ *
+ *******************************************************************/
+bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
+{
+ bool k2Found = FALSE;
+ uint8_t startSymb = 0, symbLen = 0;
+ uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
+ SchUeCb *ueCb;
+ SchK2TimingInfoTbl *k2InfoTbl=NULLP;
+ SlotTimingInfo dciTime, puschTime;
+
+ if(cell == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
+ return false;
+ }
+
+ ueCb = &cell->ueCb[ueId-1];
+
+ if(ueCb == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
+ return false;
+ }
+
+ if (isRetx == FALSE)
+ {
+ if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
+ {
+ return RFAILED;
+ }
+ }
+
+ /* Calculating time frame to send DCI for SR */
+ ADD_DELTA_TO_TIME(currTime, dciTime, gConfigInfo.gPhyDeltaDl + SCHED_DELTA, cell->numSlots);
+#ifdef NR_TDD
+ if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
+#endif
+ {
+ if(ueCb->k2TblPrsnt)
+ k2InfoTbl = &ueCb->k2InfoTbl;
+ else
+ k2InfoTbl = &cell->k2InfoTbl;
+
+ for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
+ {
+ k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
+
+ if(!ueCb->k2TblPrsnt)
+ {
+ k2Val = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
+ startSymb = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
+ symbLen = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
+ }
+ else
+ {
+ k2Val = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
+ startSymb = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
+ symbLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
+ }
+ /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
+ /* Calculating time frame to send PUSCH for SR */
+ ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots);
+#ifdef NR_TDD
+ if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
+ continue;
+#endif
+ if((cell->schUlSlotInfo[puschTime.slot]->schPuschInfo[ueId - 1] != NULLP)
+ && cell->schUlSlotInfo[puschTime.slot]->schPuschInfo[ueId - 1]->crnti == ueCb->crnti)
+ {
+ continue;
+ }
+ k2Found = true;
+ if(hqP)
+ {
+ ADD_DELTA_TO_TIME(puschTime, (*hqP)->puschTime, 0, cell->numSlots);
+ }
+ break;
+ }
+ }
+
+ if(k2Found == true)
+ {
+ if(cell->api->SchScheduleUlLc(dciTime, puschTime, startSymb, symbLen, isRetx, hqP) != ROK)
+ return false;
+ }
+ else
+ {
+ /* K2 value not found*/
+ return false;
+ }
+ return true;
+}
+
+/********************************************************************************
+ *
+ * @brief Increment the Slot by a input factor
+ *
+ * @details
+ *
+ * Function : schIncrSlot
+ *
+ * Functionality:
+ * Increment the slot by a input factor till num of Slots configured in a
+ * Radio Frame. If it exceeds, move to next sfn.
+ *
+ * @params[in/out] SlotTimingInfo timingInfo
+ * [in] uint8_t incr [Increment factor]
+ * [in] numSlotsPerRF [Number of Slots configured per RF as per
+ * numerology]
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ *******************************************************************/
+void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
+{
+ timingInfo->slot += incr;
+ if(timingInfo->slot >= numSlotsPerRF)
+ {
+ timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
+ timingInfo->slot %= numSlotsPerRF;
+ if(timingInfo->sfn > MAX_SFN)
+ {
+ timingInfo->sfn %= MAX_SFN;
+ }
+ }
+}
+
+/*******************************************************************
+*
+* @brief Fill PDSCH info in Page Alloc
+*
+* @details
+*
+* Function : schFillPagePdschCfg
+*
+* Functionality: Fill PDSCH info in Page Alloc
+*
+* @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
+* uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
+*
+* @return pointer to return Value(ROK, RFAILED)
+*
+* ****************************************************************/
+uint8_t schFillPagePdschCfg(SchCellCb *cell, PageDlSch *pageDlSch, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
+{
+ uint8_t dmrsStartSymbol, startSymbol, numSymbol;
+
+ /* fill the PDSCH PDU */
+
+ pageDlSch->tbInfo.mcs = mcs;
+ tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
+ pageDlSch->tbInfo.tbSize = tbSize;
+ pageDlSch->dmrs.dmrsType = 0; /* type-1 */
+ pageDlSch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
+ pageDlSch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
+
+ /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
+ pageDlSch->freqAlloc.startPrb = startPrb;
+ pageDlSch->freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
+ pageDlSch->vrbPrbMapping = 0; /* non-interleaved */
+ /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
+ pageDlSch->timeAlloc.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
+ pageDlSch->timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
+ pageDlSch->timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
+
+ /* Find total symbols occupied including DMRS */
+ dmrsStartSymbol = findDmrsStartSymbol(4);
+ /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
+ * in that case only PDSCH symbols are marked as occupied */
+ if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
+ {
+ startSymbol = pageDlSch->timeAlloc.startSymb;
+ numSymbol = pageDlSch->timeAlloc.numSymb;
+ }
+ /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
+ else
+ {
+ startSymbol = dmrsStartSymbol;
+ numSymbol = pageDlSch->dmrs.nrOfDmrsSymbols + pageDlSch->timeAlloc.numSymb;
+ }
+
+ /* Allocate the number of PRBs required for DL PDSCH */
+ if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
+ &pageDlSch->freqAlloc.startPrb, pageDlSch->freqAlloc.numPrb)) != ROK)
+ {
+ DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
+ return RFAILED;
+ }
+ return ROK;
+}
+
+/**
+ * @brief Handles retransmission for MSG3
+ *
+ * @details
+ *
+ * Function : schMsg3RetxSchedulingForUe
+ *
+ * This function handles retransmission for MSG3
+ *
+ * @param[in] SchRaCb *raCb, RA cb pointer
+ * @return
+ * -# ROK
+ * -# RFAILED
+ **/
+uint8_t schMsg3RetxSchedulingForUe(SchRaCb *raCb)
+{
+ bool k2Found = false;
+ uint16_t dciSlot = 0;
+ SlotTimingInfo dciTime, msg3Time;
+ SchCellCb *cell = NULLP;
+ SlotTimingInfo currTime;
+ DciInfo *dciInfo = NULLP;
+ cell = raCb->cell;
+ currTime = cell->slotInfo;
+
+ /* Calculating time frame to send DCI for MSG3 Retx*/
+ ADD_DELTA_TO_TIME(currTime, dciTime, gConfigInfo.gPhyDeltaDl + SCHED_DELTA, cell->numSlots);
+#ifdef NR_TDD
+ /* Consider this slot for sending DCI, only if it is a DL slot */
+ if(schGetSlotSymbFrmt(dciSlot, raCb->cell->slotFrmtBitMap) == DL_SLOT)
+#endif
+ {
+ /* If PDCCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
+ if(cell->schDlSlotInfo[dciSlot]->pdcchUe != 0)
+ return false;
+
+ k2Found = schGetMsg3K2(cell, raCb->ueId, &raCb->msg3HqProc, dciTime.slot, &msg3Time, TRUE);
+
+ if (!k2Found)
+ {
+ return RFAILED;
+ }
+ SCH_ALLOC(dciInfo, sizeof(DciInfo));
+ if(!dciInfo)
+ {
+ DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
+ return RFAILED;
+ }
+ cell->schDlSlotInfo[msg3Time.slot]->ulGrant = dciInfo;
+ SCH_ALLOC(cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo[raCb->ueId - 1], sizeof(SchPuschInfo));
+ cell->schUlSlotInfo[msg3Time.slot]->puschPres = true;
+ memset(dciInfo,0,sizeof(DciInfo));
+ schFillUlDciForMsg3Retx(raCb, cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo[raCb->ueId - 1], dciInfo);
+ }
+ raCb->retxMsg3HqProc = NULLP;
+ return ROK;
+}
+
+/**
+ * @brief Get K2 value for MSG3
+ *
+ * @details
+ *
+ * Function : schGetMsg3K2
+ *
+ * This function gets K2 for MSG3
+ *
+ * @param[in] SchCellCb *cell, Cell cb struc pointer
+ * @param[in] SchUlHqProcCb* msg3HqProc, msg3 harq proc pointer
+ * @param[in] uint16_t dlTime, DL time of scheduling
+ * @param[in] SlotTimingInfo *msg3Time, MSG3 timing info
+ * @param[in] bool isRetx, indicates MSG3 retransmission
+ * @return
+ * -# true
+ * -# false
+ **/
+bool schGetMsg3K2(SchCellCb *cell, uint8_t ueId, SchUlHqProcCb* msg3HqProc, uint16_t dlTime, SlotTimingInfo *msg3Time, bool isRetx)
+{
+ bool k2Found = false;
+ uint8_t k2TblIdx = 0;
+ uint8_t k2Index = 0;
+ uint8_t k2 = 0;
+ uint8_t numK2 = 0;
+ uint8_t puschMu = 0;
+ uint8_t msg3Delta = 0, msg3MinSchTime = 0;
+#ifdef NR_TDD
+ uint8_t totalCfgSlot = 0;
+#endif
+ uint16_t crnti = 0;
+ SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
+ SlotTimingInfo currTime, msg3TempTime;
+ currTime = cell->slotInfo;
+ puschMu = cell->numerology;
+
+ if (isRetx)
+ {
+ if(!msg3HqProc)
+ return false;
+
+ numK2 = cell->k2InfoTbl.k2TimingInfo[dlTime].numK2;
+ msg3K2InfoTbl = &cell->msg3K2InfoTbl;
+ msg3MinSchTime = 0;
+ msg3Delta = 0;
+ }
+ else
+ {
+ numK2 = cell->msg3K2InfoTbl.k2TimingInfo[dlTime].numK2;
+ msg3K2InfoTbl = &cell->k2InfoTbl;
+ msg3MinSchTime = minMsg3SchTime[cell->numerology];
+ msg3Delta = puschDeltaTable[puschMu];
+ }
+
+ GET_UE_ID(crnti, ueId);
+ for(k2TblIdx = 0; k2TblIdx < numK2; k2TblIdx++)
+ {
+ k2Index = msg3K2InfoTbl->k2TimingInfo[dlTime].k2Indexes[k2TblIdx];
+
+ k2 = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
+ if (isRetx)
+ {
+ if ((msg3HqProc->strtSymbl != cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol) ||
+ (msg3HqProc->numSymbl != cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength))
+ {
+ continue;
+ }
+ }
+ /* Delta is added to the slot allocation for msg3 based on 38.214 section 6.1.2.1 */
+ k2 = k2 + msg3Delta;
+ if(k2 >= msg3MinSchTime)
+ {
+ ADD_DELTA_TO_TIME(currTime, msg3TempTime, k2, cell->numSlots);
+#ifdef NR_TDD
+ if(schGetSlotSymbFrmt(msg3TempTime.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
+ continue;
+#endif
+ /* If PUSCH is already scheduled on this slot for this UE, another PUSCH
+ * pdu cannot be scheduled here for same UE*/
+ if((cell->schUlSlotInfo[msg3TempTime.slot]->schPuschInfo[ueId - 1] != NULLP)
+ && cell->schUlSlotInfo[msg3TempTime.slot]->schPuschInfo[ueId - 1]->crnti == crnti)
+ continue;
+ k2Found = true;
+ break;
+ }
+ }
+ if (k2Found == true)
+ {
+ msg3Time->slot = msg3TempTime.slot;
+ msg3Time->sfn = msg3TempTime.sfn;
+ msg3Time->slot = msg3TempTime.slot;
+ }
+ return k2Found;
+}
+
+/*
+ * * @brief : This Function fills the Coreset and SS info based on PDCCH Cfg received for a UE
+ *
+ * Function : fillUeCoresetAndSsInfo
+ *
+ * For a Coreset, capture the following details which will be used during pdcch allocation
+ * [Step 1]: Count number of RBG and calculate TotalPRBs which can be used
+ * [Step 2]: Get the reference pointer for Coreset and Its SearchSpace.
+ * [Step 3]: A CCE will have 6 RBs in TOTAL. If duration increases, CCE will
+ * occupy less number of PRBs(1RB x 1 OFDM Symbol). Eg. If duration = 2, then
+ * instead of 6 PRBs, CCE will only occupy 3 PRBs and 2 OFDM symbols.
+ * [Step 4]: Based on CoresetSize, fill AggLvl-CQI mapping by calculating the dciSize.
+ * [Step 5]: Calculate Y value for this coreset and UE
+ *
+ * @Params[in]: UeCb,
+ * [return]: ROK, RFAILED : Memory allocation failure.
+ **/
+uint8_t fillUeCoresetAndSsInfo(SchUeCb *ue)
+{
+ uint8_t cRSetIdx = 0,ssIdx = 0;
+ uint16_t rbgCount = 0;
+ SchPdcchConfig *pdcchCfg = NULLP;
+
+ pdcchCfg = &ue->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg;
+ if(pdcchCfg == NULLP)
+ {
+ DU_LOG("\nERROR --> SCH: PDCCH Cfg is not received thus skip filling of Coreset & SS info");
+ return RFAILED;
+ }
+ for(cRSetIdx = 0; cRSetIdx < pdcchCfg->numCRsetToAddMod; cRSetIdx++ )
+ {
+ /*[Step 1]: *//*Size of coreset: Number of PRBs in a coreset*/
+ rbgCount = countRBGFrmCoresetFreqRsrc(pdcchCfg->cRSetToAddModList[cRSetIdx].freqDomainRsrc);
+ if(rbgCount)
+ {
+ ue->pdcchInfo[cRSetIdx].totalPrbs = ((rbgCount) * NUM_PRBS_PER_RBG);
+ }
+ else
+ {
+ DU_LOG("\nERROR --> SCH : CORESETSize is zero in fillCoresetAndSsConfg");
+ continue;
+ }
+ /*[Step 2]:*/
+ ue->pdcchInfo[cRSetIdx].cRSetRef = &pdcchCfg->cRSetToAddModList[cRSetIdx];
+ for(ssIdx = 0; ssIdx < pdcchCfg->numSearchSpcToAddMod; ssIdx++)
+ {
+ if(pdcchCfg->searchSpcToAddModList[ssIdx].cRSetId == pdcchCfg->cRSetToAddModList[cRSetIdx].cRSetId)
+ {
+ ue->pdcchInfo[cRSetIdx].ssRef = &pdcchCfg->searchSpcToAddModList[ssIdx];
+ break;
+ }
+ }
+
+ /*[Step 3]:*/
+ /*nrOfPRBPerCce is Number of PRBs occupied by a CCE based on Duration*/
+ ue->pdcchInfo[cRSetIdx].nrOfPRBPerCce = NUM_PRBS_PER_RBG/pdcchCfg->cRSetToAddModList[cRSetIdx].duration;
+ ue->pdcchInfo[cRSetIdx].totalCceCount = rbgCount * pdcchCfg->cRSetToAddModList[cRSetIdx].duration;
+
+ /*[Step 4]:*/
+ fillCqiAggLvlMapping(&ue->pdcchInfo[cRSetIdx]);
+
+ /*[Step 5]:*/
+ if(RFAILED == schUpdValY(ue, &ue->pdcchInfo[cRSetIdx]))
+ {
+ return RFAILED;
+ }
+ }
+ return ROK;
+}
+
+/*
+ * @brief: Function will validate a slot for PDCCH allocation
+ *
+ * Function: schPdcchSlotValidation
+ *
+ * As per 3gpp Spec 38.331, SearchSpace parameter, Every SearchSpace will have
+ * details of which slot and after how many slot the UE will monitor for PDCCH.
+ * Thus, while PDCCH allocation we need to ensure the above validation passes.
+ *
+ * @param [IN]: PDCCH time, SearchSpace Info, numSlots in Cell
+ * [RETURN]: Flag depicting the slot validation
+ * */
+bool schPdcchSlotValidation(SlotTimingInfo pdcchTime, SchSearchSpace *searchSpace, uint16_t numSlots)
+{
+ bool isSlotValid = false;
+ uint16_t slotNum = 0, mSlotPeriodicityVal = 0;
+
+ /*Converting the timing info in units of Slots*/
+ slotNum = (pdcchTime.sfn * numSlots)+pdcchTime.slot;
+
+ mSlotPeriodicityVal = \
+ schConvertSlotPeriodicityEnumToValue(searchSpace->mSlotPeriodicityAndOffset.mSlotPeriodicity);
+
+ if(!mSlotPeriodicityVal)
+ {
+ DU_LOG("\nERROR --> SCH: Slot Periodicity is ZERO thus cant proceed with this SearchSpace");
+ return false;
+ }
+ /*The Monitoring slot begins from offset thus skip the slots which are less
+ * than offset value*/
+ if((slotNum >= searchSpace->mSlotPeriodicityAndOffset.mSlotOffset))
+ {
+ /*A pdcch Slot will start after Slotoffset and will get repeated after every
+ * SlotPeriodicity*/
+ if(((slotNum - searchSpace->mSlotPeriodicityAndOffset.mSlotOffset) % mSlotPeriodicityVal) == 0)
+ {
+ DU_LOG("\nINFO --> SCH: SFN:%d/Slot:%d, is a Valid PDCCH slot",pdcchTime.sfn, pdcchTime.slot);
+ isSlotValid = true;
+ }
+ else
+ {
+ DU_LOG("\nINFO --> SCH: SFN:%d/Slot:%d, is InValid PDCCH slot",pdcchTime.sfn, pdcchTime.slot);
+ }
+ }
+ return (isSlotValid);
+}
+
+/*
+ * @brief: Function to check if PDCCH is available for a cceIndex
+ *
+ * Function: schCheckPdcchAvail
+ *
+ * This function checks if the PRBs available for a particular CCE during
+ * PDCCH allocation
+ * [Step 1]: Calculate the rbgIndex from cceIndex which depends on Coreset symbol duration
+ * i.e. a) If symbolDuration = 1; numPrbs in RBG (6) = numPrbPerCCE thus one on
+ * one mapping between rbgIndex and cceIndex
+ * b) if SymbolDuration =2; NumPrbs in RBG(6) = numPrbPerCCE * duration
+ * as CCE needs 6 REG thus in 3 PRBs whole CCE can contain
+ * c) and so on
+ *
+ * [Step 2]: Again StartPRB for a rbgIndex may not be same for CCE Index which
+ * depends on duration. If duration=2, then two CCE can be occupied
+ * in one RBGIndex thus StarPrb for secondCCE will be
+ * numPrbsPerCCE(3) away.
+ *
+ * @params[in]: CellCb, SlotTime, cceIndex, PDcchInfo, aggLvl
+ * */
+bool schCheckPdcchAvail(SchCellCb *cellCb, SlotTimingInfo slotTime, uint8_t cceIndex,\
+ SchPdcchInfo *pdcchInfo, uint8_t aggLvl )
+{
+ uint8_t rbgIndex = 0, ret = 0, startSymbol = 0;
+ uint16_t startPrb = MAX_NUM_RB, numPrb = 0;
+
+ /*[Step 1]: rbgIndex to locate in FreqDomainResource parmaeter in
+ * SearchSpace*/
+ rbgIndex = cceIndex / (pdcchInfo->cRSetRef->duration);
+
+ /*Extract StartPRB for that RBGIndex*/
+ startPrb = extractStartPrbForRBG(pdcchInfo->cRSetRef->freqDomainRsrc, rbgIndex);
+ if(startPrb == MAX_NUM_RB)
+ {
+ DU_LOG("\nERROR --> SCH: No RBG is allocated for PDCCH in this Coreset");
+ return false;
+ }
+ /*[Step 2]: Adjust StartPrb based on CCEIndex and duration*/
+ startPrb = startPrb + ((cceIndex % pdcchInfo->cRSetRef->duration) * (pdcchInfo->nrOfPRBPerCce));
+ startSymbol = findSsStartSymbol(pdcchInfo->ssRef->mSymbolsWithinSlot);
+
+ /*numPrb will also get adjusted with duration*/
+ numPrb = (NUM_PRBS_PER_RBG * aggLvl) / pdcchInfo->cRSetRef->duration;
+ DU_LOG("\nDEBUG --> SCH: RBG found for cceIndex:%d, AggLvl:%d and SymbolDuration%d with StartPrb:%d, numPrb:%d",\
+ cceIndex, aggLvl, pdcchInfo->cRSetRef->duration, startPrb, numPrb);
+
+ ret = allocatePrbDl(cellCb, slotTime, startSymbol,\
+ pdcchInfo->cRSetRef->duration, &startPrb, numPrb);
+
+ if(ret == RFAILED)
+ {
+ DU_LOG("\nERROR --> SCH: PRBs can't be allocated as they are unavailable");
+ return false;
+ }
+ return true;
+
+}
+
+/*
+ * @brief: Function to select particular UE based on validation of PDCCH allocation
+ *
+ * Function:
+ * This function will have multiple layers of validation for PDCCH allocation
+ * based on CORESET and SearchSpace configuration and availability.
+ *
+ * [Step 1]: Check if the slot is pdcch Slot or not based on SearchSpace's
+ * monitoringSlotInfo.
+ * [Step 2]: Check the CQI for this UE and decide upon which Agg Level has to
+ * be used for this PDCCH transmission
+ * [Step 3]: find the AggLevel for this CQI = base aggregation level
+ * [Step 4]: NextLowerAggLvl will be the next lower aggLevel when PDCCH
+ * allocation fails for base agg Level.
+ * [Step 5]: For each candidate , calculate the CCE Index as per TS
+ * 38.213v15, Sec 10.1 and also check PRBs falling in that CCEIndex is free.
+ * [Step 6]: If Step 5 fails, move to next candidate and if Candidate gets
+ * exhausted then fallback to nextAggLevel. Because as we decrease aggLevel,
+ * numberOfCCEReq decreases so chances of PDCCH allocation increases even
+ * though lowerAggLevel will not guarantee transmission of PDCCH as per CQI
+ * reported.(CQI less, AggiLvlRequried is More)
+ *
+ * @params[IN]: SchUeCb and PdcchTime
+ * [RETURN]: isPDCCHAllocted flag(true = UE can be selected as a
+ * candidate )
+ * */
+bool schDlCandidateSelection(SchUeCb *ueCb, SlotTimingInfo pdcchTime, SchPdcchAllocInfo *pdcchAllocInfo)
+{
+ uint8_t cRSetIdx = 0, cceIndex = 0;
+ uint8_t cqi = 0, candIdx = 0;
+ uint8_t baseAggLvl = 0, nextLowerAggLvl = 0, numCandidates = 0;
+ SchPdcchInfo *pdcchInfo = NULLP;
+ uint32_t a = 0, b = 0;
+
+ for(cRSetIdx = 0; cRSetIdx < MAX_NUM_CRSET; cRSetIdx++)
+ {
+ pdcchInfo = &ueCb->pdcchInfo[cRSetIdx];
+ if(pdcchInfo->cRSetRef == NULLP)
+ {
+ DU_LOG("\nINFO --> SCH: Coreset is not availabe at Index:%d",cRSetIdx);
+ continue;
+ }
+ /*[Step 1]:*/
+ if(false == schPdcchSlotValidation(pdcchTime, pdcchInfo->ssRef, ueCb->cellCb->numSlots))
+ {
+ DU_LOG("\nINFO --> SCH: This slot is not valid for PDCCH in this CORESET:%d.",pdcchInfo->cRSetRef->cRSetId);
+ break;
+ }
+ /*[Step 2]:*/
+ /*TODO: CQI is reported in DL_CQI_IND which has to be processed and
+ * report has to be stored in ueCb.For now, HardCoding the value*/
+ cqi = 5;
+
+ /*[Step 3]: */
+ baseAggLvl = pdcchInfo->cqiIndxAggLvlMap[cqi];
+
+ /*[Step 4]:*/
+ nextLowerAggLvl = baseAggLvl;
+
+ /*Loop to traverse through each AggLvl from higher value of aggLevel to
+ * 1 AggLvl*/
+ do
+ {
+ /*Configured num of candidates for each Agg Level in search space */
+ numCandidates = extractNumOfCandForAggLvl(pdcchInfo->ssRef, nextLowerAggLvl);
+ if(!numCandidates)
+ {
+ DU_LOG("\nINFO --> SCH: Num Of Candidates configured for this AggLvel:%d is ZERO",baseAggLvl);
+ }
+
+ /*[Step 5]:*/
+ for(candIdx= 0; candIdx < numCandidates; candIdx++)
+ {
+ /*Formula reference 3GPP TS 38.213v15, Sec 10.1, Variable 'a' and
+ * 'b' is used for segmenting the formulat for readability purpose
+ * */
+ a = pdcchInfo->y[pdcchTime.slot] + \
+ ceil((candIdx * pdcchInfo->totalCceCount)/(baseAggLvl * numCandidates));
+ b = ceil(pdcchInfo->totalCceCount * baseAggLvl);
+ cceIndex = baseAggLvl * (a % b);
+ if(schCheckPdcchAvail(ueCb->cellCb, pdcchTime, cceIndex, pdcchInfo,nextLowerAggLvl) == true)
+ {
+ DU_LOG("\nINFO --> SCH: PDCCH allocation is successful at cceIndex:%d",cceIndex);
+ pdcchAllocInfo->cRSetId = pdcchInfo->cRSetRef->cRSetId;
+ pdcchAllocInfo->aggLvl = nextLowerAggLvl;
+ pdcchAllocInfo->cceIndex = cceIndex;
+ pdcchAllocInfo->ssId = pdcchInfo->ssRef->searchSpaceId;
+ return true;
+ }
+ }
+ nextLowerAggLvl = nextLowerAggLvl >> 1;
+ }while(nextLowerAggLvl > 0 && nextLowerAggLvl <= 16);
+ }
+ return false;
+}