+typedef enum
+{
+ HQ_TB_ACKED=0,
+ HQ_TB_NACKED,
+ HQ_TB_WAITING
+}SchHqTbState;
+
+/*Following structures to keep record and estimations of PRB allocated for each
+ * LC taking into consideration the RRM policies*/
+typedef struct lcInfo
+{
+ uint8_t lcId; /*LCID for which BO are getting recorded*/
+ uint32_t reqBO; /*Size of the BO requested/to be allocated for this LC*/
+ uint32_t allocBO; /*TBS/BO Size which is actually allocated*/
+ uint8_t allocPRB; /*PRB count which is allocated based on RRM policy/FreePRB*/
+}LcInfo;
+
+typedef struct schLcPrbEstimate
+{
+ /* TODO: For Multiple RRMPolicies, Make DedicatedLcInfo as array/Double Pointer
+ * and have separate DedLCInfo for each RRMPolcyMemberList*/
+ /* Dedicated LC List will be allocated, if any available*/
+ CmLListCp dedLcList; /*Contain LCInfo per RRMPolicy*/
+ CmLListCp defLcList; /*Linklist of LC assoc with Default S-NSSAI(s)*/
+ /* SharedPRB number can be used by any LC.
+ * Need to calculate in every Slot based on PRB availability*/
+ uint16_t sharedNumPrb;
+}SchLcPrbEstimate;
+typedef struct schUlHqTbCb
+{
+ uint32_t tbSzReq;
+ uint32_t tbSzAllc;
+ uint8_t ndi;
+ uint8_t rv;
+ uint8_t rvIdx;
+ uint8_t qamOrder;
+ SchMcsTable mcsTable;
+ uint8_t iMcs;
+ uint8_t iMcsInDci;
+ uint8_t numLyrs;
+ uint8_t txCntr;
+ SchHqTbState state;
+ uint8_t cntrRetxAllocFail;
+ uint8_t statsBitmap;
+}SchUlHqTbCb;
+
+typedef struct schDlHqTbCb
+{
+ uint8_t tbIdx;
+ Bool isEnabled;
+ uint32_t tbSzReq;
+ uint8_t txCntr;
+ uint8_t ndi;
+ uint8_t rv;
+ uint8_t rvIdx;
+ uint8_t iMcs;
+ uint8_t iMcsInDci;
+ uint8_t numLyrs;
+ SchHqTbState state;
+ uint8_t isAckNackDtx;
+ uint8_t cntrRetxAllocFail;
+ //InfUeTbInfo tbCompInfo;
+ uint8_t statsBitmap;
+}SchDlHqTbCb;
+
+#ifdef NR_DRX
+typedef struct schDrxHarqCb
+{
+ uint32_t rttExpIndex;
+ CmLList *rttExpNode;
+ uint32_t retxStrtIndex;
+ CmLList *retxStrtNode;
+ uint32_t retxExpIndex;
+ CmLList *retxExpNode;
+}SchDrxHarqCb;
+#endif
+
+typedef struct schUlHqProcCb
+{
+ uint8_t procId; /*!< HARQ Process ID */
+ SchUlHqEnt *hqEnt;
+ uint8_t maxHqTxPerHqP;
+ SchUlHqTbCb tbInfo;
+ CmLList ulHqEntLnk;
+ CmLList ulSlotLnk;
+ uint8_t strtSymbl;
+ uint8_t numSymbl;
+ SchLcPrbEstimate ulLcPrbEst; /*UL PRB Alloc Estimate among different LC*/
+ CmLList ulHqProcLink;
+ uint8_t puschResType; /* Resource allocation type */
+ uint16_t puschStartPrb;
+ uint16_t puschNumPrb;
+ uint8_t dmrsMappingType;
+ uint8_t nrOfDmrsSymbols;
+ uint8_t dmrsAddPos;
+ SlotTimingInfo puschTime;
+#ifdef NR_DRX
+ SchDrxHarqCb ulDrxHarqCb;
+#endif
+}SchUlHqProcCb;
+
+struct schDlHqProcCb
+{
+ uint8_t procId; /*!< HARQ Process ID */
+ SchDlHqEnt *hqEnt;
+ uint8_t maxHqTxPerHqP;
+ CmLList dlHqEntLnk;
+ CmLList ulSlotLnk;
+ SchDlHqTbCb tbInfo[2];
+ uint8_t k1;
+ SchLcPrbEstimate dlLcPrbEst; /*DL PRB Alloc Estimate among different LC*/
+ CmLList dlHqProcLink;
+ SlotTimingInfo pucchTime;
+#ifdef NR_DRX
+ SchDrxHarqCb dlDrxHarqCb;
+#endif
+};
+struct schUlHqEnt
+{
+ SchCellCb *cell; /*!< Contains the pointer to cell*/
+ SchUeCb *ue; /*!< Contains the pointer to ue*/
+ CmLListCp free; /*!< List of free HARQ processes */
+ CmLListCp inUse; /*!< List of in-use HARQ processes */
+ uint8_t maxHqTx; /*!< Maximum number of harq re-transmissions */
+ uint8_t numHqPrcs; /*!< Number of HARQ Processes */
+ SchUlHqProcCb procs[SCH_MAX_NUM_UL_HQ_PROC]; /*!< Uplink harq process info */
+};
+struct schDlHqEnt
+{
+ SchCellCb *cell; /*!< Contains the pointer to cell */
+ SchUeCb *ue; /*!< Contains the pointer to UE */
+ CmLListCp free; /*!< List of free HARQ processes */
+ CmLListCp inUse; /*!< List of in-use HARQ processes */
+ uint8_t maxHqTx; /*!< Maximum number of harq transmissions */
+ uint8_t numHqPrcs; /*!< Number of HARQ Processes */
+ SchDlHqProcCb procs[SCH_MAX_NUM_DL_HQ_PROC];/*!< Downlink harq processes */
+};
+