+/*******************************************************************
+ *
+ * @brief fills Dl DCI PDU required for DL TTI info in MAC
+ *
+ * @details
+ *
+ * Function : fillSib1DlDciPdu
+ *
+ * Functionality:
+ * -Fills the Dl DCI PDU
+ *
+ * @params[in] Pointer to fapi_dl_dci_t
+ * Pointer to PdcchCfg
+ * @return ROK
+ *
+ ******************************************************************/
+
+void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
+{
+ if(dlDciPtr != NULLP)
+ {
+ uint8_t numBytes;
+ uint8_t bytePos;
+ uint8_t bitPos;
+
+ uint16_t coreset0Size;
+ uint16_t rbStart;
+ uint16_t rbLen;
+ uint32_t freqDomResAssign;
+ uint32_t timeDomResAssign;
+ uint8_t VRB2PRBMap;
+ uint32_t modNCodScheme;
+ uint8_t redundancyVer;
+ uint32_t sysInfoInd;
+ uint32_t reserved;
+
+ /* Size(in bits) of each field in DCI format 0_1
+ * as mentioned in spec 38.214 */
+ uint8_t freqDomResAssignSize;
+ uint8_t timeDomResAssignSize = 4;
+ uint8_t VRB2PRBMapSize = 1;
+ uint8_t modNCodSchemeSize = 5;
+ uint8_t redundancyVerSize = 2;
+ uint8_t sysInfoIndSize = 1;
+ uint8_t reservedSize = 15;
+
+ dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
+ dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
+ dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
+ dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
+ dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
+ dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
+ dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
+ dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->powerControlOfssetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset0Size = Size of coreset 0
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+ coreset0Size= sib1PdcchInfo->coreset0Cfg.coreSet0Size;
+ rbStart = 0; /* For SIB1 */
+ //rbStart = sib1PdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
+ rbLen = sib1PdcchInfo->dci.pdschCfg->freqAlloc.rbSize;
+
+ if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
+ {
+ if((rbLen - 1) <= floor(coreset0Size / 2))
+ freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
+ + (coreset0Size - 1 - rbStart);
+
+ freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
+ }
+
+ /* Fetching DCI field values */
+ timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->timeAlloc.
+ rowIndex -1;
+ VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->freqAlloc.\
+ vrbPrbMapping;
+ modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
+ redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
+ sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
+ reserved = 0;
+
+ /* Reversing bits in each DCI field */
+ freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
+ modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
+ redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
+ sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
+
+ /* Calulating total number of bytes in buffer */
+ dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
+ + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
+ + sysInfoIndSize + reservedSize;
+
+ numBytes = dlDciPtr->payloadSizeBits / 8;
+ if(dlDciPtr->payloadSizeBits % 8)
+ numBytes += 1;
+
+ if(numBytes > DCI_PAYLOAD_BYTE_LEN)
+ {
+ DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
+ return;
+ }
+
+ /* Initialize buffer */
+ for(bytePos = 0; bytePos < numBytes; bytePos++)
+ dlDciPtr->payload[bytePos] = 0;
+
+ bytePos = numBytes - 1;
+ bitPos = 0;
+
+ /* Packing DCI format fields */
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ freqDomResAssign, freqDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ timeDomResAssign, timeDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ VRB2PRBMap, VRB2PRBMapSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ modNCodScheme, modNCodSchemeSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ redundancyVer, redundancyVerSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ sysInfoInd, sysInfoIndSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ reserved, reservedSize);
+
+ }
+} /* fillSib1DlDciPdu */
+
+/*******************************************************************
+ *
+ * @brief fills Dl DCI PDU required for DL TTI info in MAC
+ *
+ * @details
+ *
+ * Function : fillRarDlDciPdu
+ *
+ * Functionality:
+ * -Fills the Dl DCI PDU
+ *
+ * @params[in] Pointer to fapi_dl_dci_t
+ * Pointer to PdcchCfg
+ * @return ROK
+ *
+ ******************************************************************/
+
+void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
+{
+ if(dlDciPtr != NULLP)
+ {
+ uint8_t numBytes;
+ uint8_t bytePos;
+ uint8_t bitPos;
+
+ uint16_t coreset0Size;
+ uint16_t rbStart;
+ uint16_t rbLen;
+ uint32_t freqDomResAssign;
+ uint8_t timeDomResAssign;
+ uint8_t VRB2PRBMap;
+ uint8_t modNCodScheme;
+ uint8_t tbScaling;
+ uint32_t reserved;
+
+ /* Size(in bits) of each field in DCI format 1_0 */
+ uint8_t freqDomResAssignSize;
+ uint8_t timeDomResAssignSize = 4;
+ uint8_t VRB2PRBMapSize = 1;
+ uint8_t modNCodSchemeSize = 5;
+ uint8_t tbScalingSize = 2;
+ uint8_t reservedSize = 16;
+
+ dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
+ dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
+ dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
+ dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
+ dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
+ dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
+ dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
+ dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->powerControlOfssetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset0Size = Size of coreset 0
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+
+ /* TODO: Fill values of coreset0Size, rbStart and rbLen */
+ coreset0Size= rarPdcchInfo->coreset0Cfg.coreSet0Size;
+ rbStart = 0; /* For SIB1 */
+ //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
+ rbLen = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbSize;
+
+ if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
+ {
+ if((rbLen - 1) <= floor(coreset0Size / 2))
+ freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
+ + (coreset0Size - 1 - rbStart);
+
+ freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
+ }
+
+ /* Fetching DCI field values */
+ timeDomResAssign = rarPdcchInfo->dci.pdschCfg->timeAlloc.rowIndex -1;
+ VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->freqAlloc.vrbPrbMapping;
+ modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
+ tbScaling = 0; /* configured to 0 scaling */
+ reserved = 0;
+
+ /* Reversing bits in each DCI field */
+ freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
+ modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
+ tbScaling = reverseBits(tbScaling, tbScalingSize);
+
+ /* Calulating total number of bytes in buffer */
+ dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
+ + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
+
+ numBytes = dlDciPtr->payloadSizeBits / 8;
+ if(dlDciPtr->payloadSizeBits % 8)
+ numBytes += 1;
+
+ if(numBytes > DCI_PAYLOAD_BYTE_LEN)
+ {
+ DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
+ return;
+ }
+
+ /* Initialize buffer */
+ for(bytePos = 0; bytePos < numBytes; bytePos++)
+ dlDciPtr->payload[bytePos] = 0;
+
+ bytePos = numBytes - 1;
+ bitPos = 0;
+
+ /* Packing DCI format fields */
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ freqDomResAssign, freqDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ timeDomResAssign, timeDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ VRB2PRBMap, VRB2PRBMapSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ modNCodScheme, modNCodSchemeSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ tbScaling, tbScalingSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ reserved, reservedSize);
+ }
+} /* fillRarDlDciPdu */
+
+/*******************************************************************
+ *
+ * @brief fills msg4 Dl DCI PDU required for DL TTI info in MAC
+ *
+ * @details
+ *
+ * Function : fillMsg4DlDciPdu
+ *
+ * Functionality:
+ * -Fills the Msg4 Dl DCI PDU
+ *
+ * @params[in] Pointer to fapi_dl_dci_t
+ * Pointer to PdcchCfg
+ * @return ROK
+ *
+ ******************************************************************/
+void fillMsg4DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *msg4PdcchInfo,\
+Msg4Info *msg4Info)
+{
+ if(dlDciPtr != NULLP)
+ {
+ uint8_t numBytes;
+ uint8_t bytePos;
+ uint8_t bitPos;
+
+ uint16_t coreset0Size = 0;
+ uint16_t rbStart = 0;
+ uint16_t rbLen = 0;
+ uint8_t dciFormatId;
+ uint32_t freqDomResAssign;
+ uint8_t timeDomResAssign;
+ uint8_t VRB2PRBMap;
+ uint8_t modNCodScheme;
+ uint8_t ndi = 0;
+ uint8_t redundancyVer = 0;
+ uint8_t harqProcessNum = 0;
+ uint8_t dlAssignmentIdx = 0;
+ uint8_t pucchTpc = 0;
+ uint8_t pucchResoInd = 0;
+ uint8_t harqFeedbackInd = 0;
+
+ /* Size(in bits) of each field in DCI format 1_0 */
+ uint8_t dciFormatIdSize = 1;
+ uint8_t freqDomResAssignSize;
+ uint8_t timeDomResAssignSize = 4;
+ uint8_t VRB2PRBMapSize = 1;
+ uint8_t modNCodSchemeSize = 5;
+ uint8_t ndiSize = 1;
+ uint8_t redundancyVerSize = 2;
+ uint8_t harqProcessNumSize = 4;
+ uint8_t dlAssignmentIdxSize = 2;
+ uint8_t pucchTpcSize = 2;
+ uint8_t pucchResoIndSize = 3;
+ uint8_t harqFeedbackIndSize = 3;
+
+ dlDciPtr->rnti = msg4PdcchInfo->dci.rnti;
+ dlDciPtr->scramblingId = msg4PdcchInfo->dci.scramblingId;
+ dlDciPtr->scramblingRnti = msg4PdcchInfo->dci.scramblingRnti;
+ dlDciPtr->cceIndex = msg4PdcchInfo->dci.cceIndex;
+ dlDciPtr->aggregationLevel = msg4PdcchInfo->dci.aggregLevel;
+ dlDciPtr->pc_and_bform.numPrgs = msg4PdcchInfo->dci.beamPdcchInfo.numPrgs;
+ dlDciPtr->pc_and_bform.prgSize = msg4PdcchInfo->dci.beamPdcchInfo.prgSize;
+ dlDciPtr->pc_and_bform.digBfInterfaces = msg4PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = msg4PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
+ dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = msg4PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
+ dlDciPtr->beta_pdcch_1_0 = msg4PdcchInfo->dci.txPdcchPower.powerValue;
+ dlDciPtr->powerControlOfssetSS = msg4PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset0Size = Size of coreset 0
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+
+ /* TODO: Fill values of coreset0Size, rbStart and rbLen */
+ coreset0Size = msg4PdcchInfo->coreset0Cfg.coreSet0Size;
+ //rbStart = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
+ rbLen = msg4PdcchInfo->dci.pdschCfg->freqAlloc.rbSize;
+
+ if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
+ {
+ if((rbLen - 1) <= floor(coreset0Size / 2))
+ freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
+ else
+ freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
+ + (coreset0Size - 1 - rbStart);
+
+ freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
+ }
+
+ /* Fetching DCI field values */
+ dciFormatId = msg4Info->dciFormatId; /* DCI indentifier for DL */
+ timeDomResAssign = msg4PdcchInfo->dci.pdschCfg->timeAlloc.rowIndex -1;
+ VRB2PRBMap = msg4PdcchInfo->dci.pdschCfg->freqAlloc.vrbPrbMapping;
+ modNCodScheme = msg4PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
+ ndi = msg4Info->ndi;
+ redundancyVer = msg4PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
+ harqProcessNum = msg4Info->harqProcNum;
+ dlAssignmentIdx = msg4Info->dlAssignIdx;
+ pucchTpc = msg4Info->pucchTpc;
+ pucchResoInd = msg4Info->pucchResInd;
+ harqFeedbackInd = msg4Info->harqFeedbackInd;
+
+ /* Reversing bits in each DCI field */
+ dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
+ freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
+ timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
+ VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
+ modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
+ ndi = reverseBits(ndi, ndiSize);
+ redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
+ harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
+ dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
+ pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
+ pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
+ harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
+
+
+ /* Calulating total number of bytes in buffer */
+ dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
+ + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
+ + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
+ + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
+
+ numBytes = dlDciPtr->payloadSizeBits / 8;
+ if(dlDciPtr->payloadSizeBits % 8)
+ numBytes += 1;
+
+ if(numBytes > DCI_PAYLOAD_BYTE_LEN)
+ {
+ DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
+ return;
+ }
+
+ /* Initialize buffer */
+ for(bytePos = 0; bytePos < numBytes; bytePos++)
+ dlDciPtr->payload[bytePos] = 0;
+
+ bytePos = numBytes - 1;
+ bitPos = 0;
+
+ /* Packing DCI format fields */
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ dciFormatId, dciFormatIdSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ freqDomResAssign, freqDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ timeDomResAssign, timeDomResAssignSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ VRB2PRBMap, VRB2PRBMapSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ modNCodScheme, modNCodSchemeSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ ndi, ndiSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ redundancyVer, redundancyVerSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ redundancyVer, redundancyVerSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ harqProcessNum, harqProcessNumSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ dlAssignmentIdx, dlAssignmentIdxSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ pucchTpc, pucchTpcSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ pucchResoInd, pucchResoIndSize);
+ fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
+ harqFeedbackInd, harqFeedbackIndSize);
+ }
+} /* fillMsg4DlDciPdu */
+
+/*******************************************************************
+ *
+ * @brief fills PDCCH PDU required for DL TTI info in MAC
+ *
+ * @details
+ *
+ * Function : fillPdcchPdu
+ *
+ * Functionality:
+ * -Fills the Pdcch PDU info
+ * stored in MAC
+ *
+ * @params[in] Pointer to FAPI DL TTI Req
+ * Pointer to PdcchCfg
+ * Pointer to msgLen of DL TTI Info
+ * @return ROK
+ *
+ ******************************************************************/
+
+S16 fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlAlloc *dlAlloc, uint32_t *msgLen, RntiType rntiType)
+{
+ if(dlTtiReqPdu != NULLP)
+ {
+ PdcchCfg *pdcchInfo = NULLP;
+ if(rntiType == SI_RNTI_TYPE)
+ {
+ pdcchInfo = &dlAlloc->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
+ fillSib1DlDciPdu(dlTtiReqPdu->u.pdcch_pdu.dlDci, pdcchInfo);
+ }
+ else if(rntiType == RA_RNTI_TYPE)
+ {
+ pdcchInfo = &dlAlloc->rarAlloc.rarPdcchCfg;
+ fillRarDlDciPdu(dlTtiReqPdu->u.pdcch_pdu.dlDci, pdcchInfo);
+ }
+ else if(rntiType == TC_RNTI_TYPE)
+ {
+ pdcchInfo = &dlAlloc->msg4Alloc->msg4PdcchCfg;
+ fillMsg4DlDciPdu(dlTtiReqPdu->u.pdcch_pdu.dlDci, pdcchInfo,\
+ &dlAlloc->msg4Alloc->msg4Info);
+ }
+ else
+ {
+ DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
+ return RFAILED;;
+ }
+ dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
+ dlTtiReqPdu->u.pdcch_pdu.bwpSize = pdcchInfo->pdcchBwpCfg.BWPSize;
+ dlTtiReqPdu->u.pdcch_pdu.bwpPart = pdcchInfo->pdcchBwpCfg.BWPStart;
+ dlTtiReqPdu->u.pdcch_pdu.subCarrierSpacing = pdcchInfo->pdcchBwpCfg.subcarrierSpacing;
+ dlTtiReqPdu->u.pdcch_pdu.cyclicPrefix = pdcchInfo->pdcchBwpCfg.cyclicPrefix;
+ dlTtiReqPdu->u.pdcch_pdu.startSymbolIndex = pdcchInfo->coreset0Cfg.startSymbolIndex;
+ dlTtiReqPdu->u.pdcch_pdu.durationSymbols = pdcchInfo->coreset0Cfg.durationSymbols;
+ memcpy(dlTtiReqPdu->u.pdcch_pdu.freqDomainResource, pdcchInfo->coreset0Cfg.freqDomainResource, 6);
+ dlTtiReqPdu->u.pdcch_pdu.cceRegMappingType = pdcchInfo->coreset0Cfg.cceRegMappingType;
+ dlTtiReqPdu->u.pdcch_pdu.regBundleSize = pdcchInfo->coreset0Cfg.regBundleSize;
+ dlTtiReqPdu->u.pdcch_pdu.interleaverSize = pdcchInfo->coreset0Cfg.interleaverSize;
+ dlTtiReqPdu->u.pdcch_pdu.coreSetSize = pdcchInfo->coreset0Cfg.coreSetType;
+ dlTtiReqPdu->u.pdcch_pdu.shiftIndex = pdcchInfo->coreset0Cfg.shiftIndex;
+ dlTtiReqPdu->u.pdcch_pdu.precoderGranularity = pdcchInfo->coreset0Cfg.precoderGranularity;
+ dlTtiReqPdu->u.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
+ dlTtiReqPdu->u.pdcch_pdu.dlDci = (fapi_dl_dci_t *)(dlTtiReqPdu + \
+ (sizeof(fapi_dl_tti_req_pdu_t) - sizeof(dlTtiReqPdu->u)) + \
+ (sizeof(fapi_dl_pdcch_pdu_t) - sizeof(fapi_dl_dci_t*)));
+
+ /* Calculating PDU length. Considering only one dl dci pdu for now */
+ dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t) + sizeof(fapi_dl_dci_t);
+ SET_MSG_LEN(*msgLen, (sizeof(dlTtiReqPdu->pduType) + \
+ sizeof(dlTtiReqPdu->pduSize) + dlTtiReqPdu->pduSize));
+
+ }
+ return ROK;
+
+}
+
+/*******************************************************************
+ *
+ * @brief fills PDSCH PDU required for DL TTI info in MAC
+ *
+ * @details
+ *
+ * Function : fillPdschPdu
+ *
+ * Functionality:
+ * -Fills the Pdsch PDU info
+ * stored in MAC
+ *
+ * @params[in] Pointer to FAPI DL TTI Req
+ * Pointer to PdschCfg
+ * Pointer to msgLen of DL TTI Info
+ * @return ROK
+ *
+ ******************************************************************/
+
+void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
+uint32_t *msgLen, uint16_t pduIndex)
+{
+ uint8_t idx;
+
+ if(dlTtiReqPdu != NULLP)
+ {
+ dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
+ dlTtiReqPdu->u.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
+ dlTtiReqPdu->u.pdsch_pdu.rnti = pdschInfo->rnti;
+ dlTtiReqPdu->u.pdsch_pdu.pduIndex = pduIndex;
+ dlTtiReqPdu->u.pdsch_pdu.bwpSize = pdschInfo->pdschBwpCfg.BWPSize;
+ dlTtiReqPdu->u.pdsch_pdu.bwpStart = pdschInfo->pdschBwpCfg.BWPStart;
+ dlTtiReqPdu->u.pdsch_pdu.subCarrierSpacing = pdschInfo->pdschBwpCfg.subcarrierSpacing;
+ dlTtiReqPdu->u.pdsch_pdu.cyclicPrefix = pdschInfo->pdschBwpCfg.cyclicPrefix;
+ dlTtiReqPdu->u.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
+ for(idx = 0; idx < MAX_CODEWORDS ; idx++)
+ {
+ dlTtiReqPdu->u.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
+ dlTtiReqPdu->u.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
+ dlTtiReqPdu->u.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
+ dlTtiReqPdu->u.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
+ dlTtiReqPdu->u.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
+ dlTtiReqPdu->u.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
+ }
+ dlTtiReqPdu->u.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
+ dlTtiReqPdu->u.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
+ dlTtiReqPdu->u.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
+ dlTtiReqPdu->u.pdsch_pdu.refPoint = pdschInfo->refPoint;
+ dlTtiReqPdu->u.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
+ dlTtiReqPdu->u.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
+ dlTtiReqPdu->u.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
+ dlTtiReqPdu->u.pdsch_pdu.scid = pdschInfo->dmrs.scid;
+ dlTtiReqPdu->u.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
+ dlTtiReqPdu->u.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
+ dlTtiReqPdu->u.pdsch_pdu.resourceAlloc = pdschInfo->freqAlloc.resourceAlloc;
+ /* since we are using type-1, hence rbBitmap excluded */
+ dlTtiReqPdu->u.pdsch_pdu.rbStart = pdschInfo->freqAlloc.rbStart;
+ dlTtiReqPdu->u.pdsch_pdu.rbSize = pdschInfo->freqAlloc.rbSize;
+ dlTtiReqPdu->u.pdsch_pdu.vrbToPrbMapping = pdschInfo->freqAlloc.vrbPrbMapping;
+ dlTtiReqPdu->u.pdsch_pdu.startSymbIndex = pdschInfo->timeAlloc.startSymbolIndex;
+ dlTtiReqPdu->u.pdsch_pdu.nrOfSymbols = pdschInfo->timeAlloc.numSymbols;
+ dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
+ dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
+ dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
+ dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
+ pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
+ dlTtiReqPdu->u.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
+ beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
+ dlTtiReqPdu->u.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
+ dlTtiReqPdu->u.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
+ dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
+
+ SET_MSG_LEN(*msgLen, (sizeof(dlTtiReqPdu->pduType) + \
+ sizeof(dlTtiReqPdu->pduSize) + sizeof(fapi_dl_pdsch_pdu_t)));
+
+ }
+
+}
+
+/***********************************************************************
+ *
+ * @brief calculates the total size to be allocated for DL TTI Req
+ *
+ * @details
+ *
+ * Function : calcDlTtiReqPduCount
+ *
+ * Functionality:
+ * -calculates the total pdu count to be allocated for DL TTI Req
+ *
+ * @params[in] DlBrdcstAlloc *cellBroadcastInfo
+ * @return count
+ *
+ * ********************************************************************/
+uint8_t calcDlTtiReqPduCount(DlAlloc *dlInfo)
+{
+ uint8_t count = 0;
+ uint8_t idx = 0;
+
+ if(dlInfo->isBroadcastPres)
+ {
+ if(dlInfo->brdcstAlloc.ssbTrans)
+ {
+ for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
+ {
+ count++;
+ }
+ }
+ if(dlInfo->brdcstAlloc.sib1Trans)
+ {
+ count += 2;
+ }
+ }
+ if(dlInfo->isRarPres)
+ {
+ count += 2;
+ }
+ if(dlInfo->msg4Alloc)
+ {
+ count += 2;
+ }
+
+ return count;
+}
+
+/***********************************************************************
+ *
+ * @brief calculates the total size to be allocated for DL TTI Req
+ *
+ * @details
+ *
+ * Function : calcTxDataReqPduCount
+ *
+ * Functionality:
+ * -calculates the total pdu count to be allocated for DL TTI Req
+ *
+ * @params[in] DlBrdcstAlloc *cellBroadcastInfo
+ * @return count
+ *
+ * ********************************************************************/
+uint8_t calcTxDataReqPduCount(DlAlloc *dlInfo)
+{
+ uint8_t count = 0;
+
+ if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
+ {
+ count++;
+ }
+ if(dlInfo->isRarPres)
+ {
+ count++;
+ }
+ if(dlInfo->msg4Alloc)
+ {
+ count++;
+ }
+
+ return count;
+}
+/***********************************************************************
+ *
+ * @brief fills the SIB1 TX-DATA request message
+ *
+ * @details
+ *
+ * Function : fillSib1TxDataReq
+ *
+ * Functionality:
+ * - fills the SIB1 TX-DATA request message
+ *
+ * @params[in] fapi_tx_pdu_desc_t *pduDesc
+ * @params[in] macCellCfg consist of SIB1 pdu
+ * @params[in] uint32_t *msgLen
+ * @params[in] uint16_t pduIndex
+ * @return ROK
+ *
+ * ********************************************************************/
+uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
+ uint32_t *msgLen, uint16_t pduIndex)
+{
+ uint32_t pduLen = 0;
+ uint32_t *sib1TxdataValue = NULLP;
+
+ pduDesc[pduIndex].pduIndex = pduIndex;
+ pduDesc[pduIndex].numTlvs = 1;
+
+ /* fill the TLV */
+ /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
+ pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
+ pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
+ LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
+ if(sib1TxdataValue == NULLP)
+ {
+ return RFAILED;
+ }
+ memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
+ macCellCfg->sib1Cfg.sib1PduLen);
+ pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
+
+ /* The total length of the PDU description and PDU data */
+ pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
+ pduLen += sizeof(fapi_uint32_tlv_t); /* only 1 TLV is present */
+ pduDesc[pduIndex].pduLength = pduLen;
+ msgLen += pduLen;
+
+#ifndef INTEL_WLS
+ MAC_FREE(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
+#endif
+
+ return ROK;
+}
+
+/***********************************************************************
+ *
+ * @brief fills the RAR TX-DATA request message
+ *
+ * @details
+ *
+ * Function : fillRarTxDataReq
+ *
+ * Functionality:
+ * - fills the RAR TX-DATA request message
+ *
+ * @params[in] fapi_tx_pdu_desc_t *pduDesc
+ * @params[in] RarInfo *rarInfo
+ * @params[in] uint32_t *msgLen
+ * @params[in] uint16_t pduIndex
+ * @return ROK
+ *
+ * ********************************************************************/
+uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
+ uint32_t *msgLen, uint16_t pduIndex)
+{
+ uint32_t pduLen = 0;
+ uint32_t *rarTxdataValue = NULLP;
+
+ pduDesc[pduIndex].pduIndex = pduIndex;
+ pduDesc[pduIndex].numTlvs = 1;
+
+ /* fill the TLV */
+ /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
+ pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
+ pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
+ LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
+ if(rarTxdataValue == NULLP)
+ {
+ return RFAILED;
+ }
+ memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
+ pduDesc[pduIndex].tlvs[0].value = (uint32_t)rarTxdataValue;
+
+ /* The total length of the PDU description and PDU data */
+ pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
+ pduLen += sizeof(fapi_uint32_tlv_t); /* only 1 TLV is present */
+ pduDesc[pduIndex].pduLength = pduLen;
+ msgLen += pduLen;
+
+/* TODO: The pointer value which was stored, needs to be free-ed at PHY *
+ * But since we did not implement WLS, this has to be done here
+ */
+#ifndef INTEL_WLS
+ MAC_FREE(rarTxdataValue,rarInfo->rarPduLen);
+#endif
+
+ return ROK;
+}
+
+/***********************************************************************
+ *
+ * @brief fills the Msg4 TX-DATA request message
+ *
+ * @details
+ *
+ * Function : fillMsg4TxDataReq
+ *
+ * Functionality:
+ * - fills the Msg4 TX-DATA request message
+ *
+ * @params[in] fapi_tx_pdu_desc_t *pduDesc
+ * @params[in] Msg4Info *msg4Info
+ * @params[in] uint32_t *msgLen
+ * @params[in] uint16_t pduIndex
+ * @return ROK
+ *
+ * ********************************************************************/
+uint8_t fillMsg4TxDataReq(fapi_tx_pdu_desc_t *pduDesc, Msg4Info *msg4Info,
+ uint32_t *msgLen, uint16_t pduIndex)
+{
+ uint32_t pduLen = 0;
+ uint32_t *msg4TxDataValue = NULLP;
+
+ pduDesc[pduIndex].pduIndex = pduIndex;
+ pduDesc[pduIndex].numTlvs = 1;
+
+ /* fill the TLV */
+ /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
+ pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
+ pduDesc[pduIndex].tlvs[0].tl.length = msg4Info->msg4PduLen;
+ LWR_MAC_ALLOC(msg4TxDataValue, msg4Info->msg4PduLen);
+ if(msg4TxDataValue == NULLP)
+ {
+ return RFAILED;
+ }
+ memcpy(msg4TxDataValue, msg4Info->msg4Pdu, msg4Info->msg4PduLen);
+ pduDesc[pduIndex].tlvs[0].value = (uint32_t)msg4TxDataValue;
+
+ /* The total length of the PDU description and PDU data */
+ pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
+ pduLen += sizeof(fapi_uint32_tlv_t); /* only 1 TLV is present */
+ pduDesc[pduIndex].pduLength = pduLen;
+ msgLen += pduLen;
+
+ /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
+ * But since we did not implement WLS, this has to be done here
+ */
+ #ifndef INTEL_WLS
+ MAC_FREE(msg4TxDataValue, msg4Info->msg4PduLen);
+ #endif
+
+ return ROK;
+}
+
+#endif /* FAPI */