+ DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request");
+ memset(currDlSlot, 0, sizeof(MacDlSlot));
+ return RFAILED;
+ }
+ }
+ else
+ {
+ lwr_mac_procInvalidEvt(&currTimingInfo);
+ return RFAILED;
+ }
+#endif
+ return ROK;
+}
+
+/*******************************************************************
+ *
+ * @brief Sends TX data Request to PHY
+ *
+ * @details
+ *
+ * Function : sendTxDataReq
+ *
+ * Functionality:
+ * -Sends FAPI TX data req to PHY
+ *
+ * @params[in] timing info
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ * ****************************************************************/
+uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
+{
+#ifdef INTEL_FAPI
+ uint8_t nPdu = 0;
+ uint16_t cellIdx;
+ uint32_t msgLen = 0;
+ uint16_t pduIndex = 0;
+ uint32_t txDataReqMsgSize = 0;
+ fapi_tx_data_req_t *txDataReq = NULLP;
+
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+
+ /* send TX_Data request message */
+ nPdu = calcTxDataReqPduCount(dlInfo);
+ if(nPdu > 0)
+ {
+ txDataReqMsgSize = sizeof(fapi_tx_data_req_t);
+ if(dlInfo->brdcstAlloc.sib1Trans)
+ {
+ txDataReqMsgSize += macCb.macCell[cellIdx]->macCellCfg.sib1Cfg.sib1PduLen;
+ }
+ if(dlInfo->rarAlloc != NULLP)
+ {
+ txDataReqMsgSize += dlInfo->rarAlloc->rarInfo.rarPduLen;
+ }
+ if(dlInfo->msg4Alloc != NULLP)
+ {
+ txDataReqMsgSize += dlInfo->msg4Alloc->msg4Info.msg4PduLen;
+ }
+
+ LWR_MAC_ALLOC(txDataReq, txDataReqMsgSize);
+ if(txDataReq == NULLP)
+ {
+ DU_LOG("\nLWR_MAC: Failed to allocate memory for TX data Request");
+ return RFAILED;
+ }
+
+ memset(txDataReq, 0, txDataReqMsgSize);
+ txDataReq->sfn = currTimingInfo.sfn;
+ txDataReq->slot = currTimingInfo.slot;
+ if(dlInfo->brdcstAlloc.sib1Trans)
+ {
+ fillSib1TxDataReq(txDataReq->pdu_desc,
+ &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
+ pduIndex++;
+ txDataReq->num_pdus++;
+ }
+ if(dlInfo->rarAlloc != NULLP)
+ {
+ fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
+ pduIndex++;
+ txDataReq->num_pdus++;
+
+ MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
+ dlInfo->rarAlloc = NULLP;
+ }
+ if(dlInfo->msg4Alloc != NULLP && dlInfo->msg4Alloc->msg4Info.msg4Pdu != NULLP)
+ {
+ fillMsg4TxDataReq(txDataReq->pdu_desc, &dlInfo->msg4Alloc->\
+ msg4Info, pduIndex);
+ pduIndex++;
+ txDataReq->num_pdus++;
+
+ MAC_FREE(dlInfo->msg4Alloc->msg4Info.msg4Pdu,\
+ dlInfo->msg4Alloc->msg4Info.msg4PduLen);
+ dlInfo->msg4Alloc->msg4Info.msg4Pdu = NULLP;
+ MAC_FREE(dlInfo->msg4Alloc,sizeof(Msg4Alloc));
+ dlInfo->msg4Alloc = NULLP;
+ }
+ msgLen = txDataReqMsgSize - sizeof(fapi_msg_t);
+ fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, msgLen);
+ LwrMacSendToPhy(txDataReq->header.msg_id, txDataReqMsgSize, \
+ (void *)txDataReq);
+ }
+#endif
+ return ROK;
+}
+
+/***********************************************************************
+ *
+ * @brief calculates the total size to be allocated for UL TTI Req
+ *
+ * @details
+ *
+ * Function : getnPdus
+ *
+ * Functionality:
+ * -calculates the total pdu count to be allocated for UL TTI Req
+ *
+ * @params[in] Pointer to fapi Ul TTI Req
+ * Pointer to CurrUlSlot
+ * @return count
+ * ********************************************************************/
+#ifdef INTEL_FAPI
+uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
+{
+ uint8_t pduCount = 0;
+
+ if(ulTtiReq && currUlSlot)
+ {
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
+ {
+ pduCount++;
+ ulTtiReq->rachPresent++;
+ }
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
+ {
+ pduCount++;
+ ulTtiReq->nUlsch++;
+ }
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
+ {
+ pduCount++;
+ ulTtiReq->nUlsch++;
+ }
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
+ {
+ pduCount++;
+ ulTtiReq->nUlcch++;
+ }
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
+ {
+ pduCount++;
+ }
+ }
+ return pduCount;
+}
+#endif
+
+/***********************************************************************
+ *
+ * @brief Set the value of zero correlation config in PRACH PDU
+ *
+ * @details
+ *
+ * Function : setNumCs
+ *
+ * Functionality:
+ * -Set the value of zero correlation config in PRACH PDU
+ *
+ * @params[in] Pointer to zero correlation config
+ * Pointer to MacCellCfg
+ * ********************************************************************/
+
+void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
+{
+#ifdef INTEL_FAPI
+ uint8_t idx;
+ if(macCellCfg != NULLP)
+ {
+ idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
+ *numCs = UnrestrictedSetNcsTable[idx];
+ }
+#endif
+}
+
+/***********************************************************************
+ *
+ * @brief Fills the PRACH PDU in UL TTI Request
+ *
+ * @details
+ *
+ * Function : fillPrachPdu
+ *
+ * Functionality:
+ * -Fills the PRACH PDU in UL TTI Request
+ *
+ * @params[in] Pointer to Prach Pdu
+ * Pointer to CurrUlSlot
+ * Pointer to macCellCfg
+ * Pointer to msgLen
+ * ********************************************************************/
+
+#ifdef INTEL_FAPI
+void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
+{
+ if(ulTtiReqPdu != NULLP)
+ {
+ ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
+ ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
+ ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
+ currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
+ ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
+ currUlSlot->ulInfo.prachSchInfo.prachFormat;
+ ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
+ ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
+ currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
+ setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
+ ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
+ ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
+ ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
+ ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
+ ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
+ }
+}
+
+void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
+{
+ if(ulTtiReqPdu != NULLP)
+ {
+ ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
+ memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
+ ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
+ ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
+ /* TODO : Fill handle in raCb when scheduling pusch and access here */
+ ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
+ ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
+ macCellCfg->initialUlBwp.bwp.scs;
+ ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
+ macCellCfg->initialUlBwp.bwp.cyclicPrefix;
+ ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
+ ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = 2;
+ ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = \
+ currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
+ ulTtiReqPdu->pdu.pusch_pdu.mcsTable = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
+ ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
+ ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
+ ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
+ ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
+ ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
+ ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
+ currUlSlot->ulInfo.schPuschInfo.resAllocType;
+ ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
+ currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
+ currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
+ ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
+ ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
+ currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
+ ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
+ currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
+ ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
+ currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
+ ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
+ currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
+ ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
+ currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
+ currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
+ currUlSlot->ulInfo.schPuschInfo.harqProcId;
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
+ currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
+ currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
+ /* numCb is 0 for new transmission */
+ ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
+
+ ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
+ }
+}
+
+void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
+ MacUlSlot *currUlSlot)
+{
+ if(ulTtiReqPdu != NULLP)
+ {
+ ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
+ memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
+ ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
+ /* TODO : Fill handle in raCb when scheduling pucch and access here */
+ ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
+ ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
+ ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
+ ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
+ ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
+ ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = 0; /* Disabled */
+ ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
+ ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
+ ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
+ ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = 0; /* Disabled */
+ ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = 0; /* Valid for Format 1 */
+ ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = 0; /* Valid for Format 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = 0; /* Valid for Format 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = 0; /* Valid for Format 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
+ ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
+ ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
+
+ ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
+ }
+}
+
+#endif
+
+/*******************************************************************
+ *
+ * @brief Sends UL TTI Request to PHY
+ *
+ * @details
+ *
+ * Function : fillUlTtiReq
+ *
+ * Functionality:
+ * -Sends FAPI Param req to PHY
+ *
+ * @params[in] Pointer to CmLteTimingInfo
+ * @return ROK - success
+ * RFAILED - failure
+ *
+ ******************************************************************/
+uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
+{
+#ifdef INTEL_FAPI
+ uint16_t cellIdx;
+ uint8_t pduIdx = -1;
+ uint32_t msgLen = 0;
+ uint32_t msgSize = 0;
+
+ fapi_ul_tti_req_t *ulTtiReq = NULLP;
+ SlotIndInfo ulTtiReqTimingInfo;
+
+ MacUlSlot *currUlSlot = NULLP;
+ MacCellCfg macCellCfg;
+
+ if(lwrMacCb.phyState == PHY_STATE_RUNNING)
+ {
+ GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
+ macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
+
+ /* add PHY delta */
+ ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
+
+ currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
+ msgSize = sizeof(fapi_ul_tti_req_t);
+ LWR_MAC_ALLOC(ulTtiReq, msgSize);
+
+ if(ulTtiReq != NULLP)
+ {
+ memset(ulTtiReq, 0, msgSize);
+ ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
+ ulTtiReq->slot = ulTtiReqTimingInfo.slot;
+ ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
+ ulTtiReq->nGroup = 0;
+ if(ulTtiReq->nPdus > 0)
+ {
+ /* Fill Prach Pdu */
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
+ {
+ pduIdx++;
+ fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
+ }
+
+ /* Fill PUSCH PDU */
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
+ {
+ pduIdx++;
+ fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
+ }
+ /* Fill PUCCH PDU */
+ if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
+ {
+ pduIdx++;
+ fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
+ }
+ }
+ msgLen = sizeof(fapi_ul_tti_req_t) - sizeof(fapi_msg_t);
+ fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, msgLen);
+
+ DU_LOG("\nLWR_MAC: Sending UL TTI Request");
+ LwrMacSendToPhy(ulTtiReq->header.msg_id, msgSize, (void *)ulTtiReq);
+
+ memset(currUlSlot, 0, sizeof(MacUlSlot));
+ return ROK;
+ }
+ else
+ {
+ DU_LOG("\nLWR_MAC: Failed to allocate memory for UL TTI Request");
+ memset(currUlSlot, 0, sizeof(MacUlSlot));
+ return RFAILED;
+ }
+ }
+ else
+ {
+ lwr_mac_procInvalidEvt(&currTimingInfo);
+ }
+#endif
+ return ROK;
+}
+
+#ifdef INTEL_FAPI
+/*******************************************************************
+ *
+ * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
+ *
+ * @details
+ *
+ * Function : fillUlDciPdu
+ *
+ * Functionality:
+ * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
+ *
+ * @params[in] Pointer to fapi_dl_dci_t
+ * Pointer to DciInfo
+ * @return ROK
+ *
+ ******************************************************************/
+void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
+{
+ if(ulDciPtr != NULLP)
+ {
+ uint8_t numBytes;
+ uint8_t bytePos;
+ uint8_t bitPos;
+
+ uint8_t coreset1Size = 0;
+ uint16_t rbStart = 0;
+ uint16_t rbLen = 0;
+ uint8_t dciFormatId = 0;
+ uint32_t freqDomResAssign;
+ uint8_t timeDomResAssign;
+ uint8_t freqHopFlag;
+ uint8_t modNCodScheme;
+ uint8_t ndi;
+ uint8_t redundancyVer = 0;
+ uint8_t harqProcessNum = 0;
+ uint8_t puschTpc = 0;
+ uint8_t ul_SlInd = 0;
+
+ /* Size(in bits) of each field in DCI format 0_0 */
+ uint8_t dciFormatIdSize = 1;
+ uint8_t freqDomResAssignSize = 0;
+ uint8_t timeDomResAssignSize = 4;
+ uint8_t freqHopFlagSize = 1;
+ uint8_t modNCodSchemeSize = 5;
+ uint8_t ndiSize = 1;
+ uint8_t redundancyVerSize = 2;
+ uint8_t harqProcessNumSize = 4;
+ uint8_t puschTpcSize = 2;
+ uint8_t ul_SlIndSize = 1;
+
+ ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
+ ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
+ ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
+ ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
+ ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
+ ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
+ ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
+ ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
+ ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
+ ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
+ ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
+ ulDciPtr->powerControlOfssetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
+
+ /* Calculating freq domain resource allocation field value and size
+ * coreset1Size = Size of coreset 1
+ * RBStart = Starting Virtual Rsource block
+ * RBLen = length of contiguously allocted RBs
+ * Spec 38.214 Sec 5.1.2.2.2
+ */
+ if(schDciInfo->formatType == FORMAT0_0)
+ {
+ coreset1Size = schDciInfo->coresetCfg.coreSetSize;
+ rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
+ rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
+
+ if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))