*******************************************************************************/
/* macros */
-#define SCH_INST_START 1
-#define SCH_MAX_INST 1
#define SCH_MU0_NUM_SLOTS 10
#define SCH_MU1_NUM_SLOTS 20
#define SCH_MU2_NUM_SLOTS 30
#define NUM_DMRS_SYMBOLS 1
#define DMRS_ADDITIONAL_POS 0
#define SCH_DEFAULT_K1 1
-#define SCH_TQ_SIZE 10
#define SSB_IDX_SUPPORTED 1
#define CRC_FAILED 0
#define NUM_SCH_TYPE 2 /*Supported number of Scheduler Algorithm types*/
+#define SCH_TQ_SIZE 10
+
+/*3GPP 38.331,'frequencyDomainResources' :Number of PRBs per Resource Block Group*/
+#define NUM_PRBS_PER_RBG 6
+
+/*3GPP 38.214 Table 5.2.2.1-2*/
+#define MAX_NUM_CQI_IDX 16
+
+/*3GPP 38.211 Table 7.3.2.1-1*/
+#define MAX_NUM_AGG_LVL 5
+
+#define PUCCH_RES_IND 0
+
typedef struct schDlHqProcCb SchDlHqProcCb;
typedef struct schUlHqEnt SchUlHqEnt;
typedef struct schRaReq SchRaReq;
SchDlHqEnt *hqEnt;
uint8_t maxHqTxPerHqP;
CmLList dlHqEntLnk;
- CmLList ulSlotLnk;
+ CmLList dlSlotLnk;
SchDlHqTbCb tbInfo[2];
uint8_t k1;
void *schSpcDlHqProcCb; /*!< Scheduler specific HARQ Proc CB */
*/
typedef struct schGenCb
{
- uint8_t tmrRes; /*!< Timer resolution */
uint8_t startCellId; /*!< Starting Cell Id */
#ifdef LTE_ADV
bool forceCntrlSrbBoOnPCel; /*!< value 1 means force scheduling
{
CmLListCp freePrbBlockList; /*!< List of continuous blocks for available PRB */
uint64_t prbBitMap[ MAX_SYMB_PER_SLOT][PRB_BITMAP_MAX_IDX]; /*!< BitMap to store the allocated PRBs */
+ uint16_t numPrbAlloc;
}SchPrbAlloc;
+
+typedef struct schPdcchAllocInfo
+{
+ uint8_t cRSetId;
+ uint8_t ssId;
+ uint8_t aggLvl;
+ uint16_t cceIndex;
+}SchPdcchAllocInfo;
+
/**
* @brief
* scheduler allocationsfor DL per cell.
uint8_t ssbIdxSupported; /*!< Max SSB index */
SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */
bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */
- uint8_t pdcchUe; /*!< UE for which PDCCH is scheduled in this slot */
- uint8_t pdschUe; /*!< UE for which PDSCH is scheduled in this slot */
+ uint8_t pdcchUe; /*!< UE for which PDCCH Common is scheduled in this slot */
RarAlloc *rarAlloc[MAX_NUM_UE]; /*!< RAR allocation per UE*/
DciInfo *ulGrant;
DlMsgSchInfo *dlMsgAlloc[MAX_NUM_UE]; /*!< Dl msg allocation per UE*/
typedef struct schUlSlotInfo
{
SchPrbAlloc prbAlloc; /*!< PRB allocated/available per symbol */
- uint8_t puschCurrentPrb; /*!< Current PRB for PUSCH allocation */
- bool puschPres; /*!< PUSCH presence field */
- SchPuschInfo *schPuschInfo; /*!< PUSCH info */
- bool pucchPres; /*!< PUCCH presence field */
- SchPucchInfo schPucchInfo; /*!< PUCCH info */
- uint8_t pucchUe; /*!< Store UE id for which PUCCH is scheduled */
- uint8_t puschUe; /*!< Store UE id for which PUSCH is scheduled */
+ bool puschPres;
+ SchPuschInfo *schPuschInfo[MAX_NUM_UE]; /*!< PUSCH info */
+ bool pucchPres;
+ SchPucchInfo schPucchInfo[MAX_NUM_UE]; /*!< PUCCH info */
}SchUlSlotInfo;
/**
CmLList *shortCycleTmrExpiryNodeInfo; /* Node present in short cycle exp list*/
}SchDrxUeCb;
#endif
+
+typedef struct schPdcchInfo
+{
+ SchControlRsrcSet *cRSetRef; /*Coreset Cfg reference from SchUeCfgCb*/
+ SchSearchSpace *ssRef; /*SearchSpace Cfg reference from SchUeCfgCb*/
+ uint16_t totalPrbs; /*Total PRBs configured for this CORESET*/
+ uint8_t nrOfPRBPerCce; /*CCE Size*/
+ uint8_t totalCceCount; /*Count of CCE in this CORESET*/
+ uint8_t cqiIndxAggLvlMap[MAX_NUM_CQI_IDX];/*Agg Level to be used for each CQI Index*/
+ uint32_t *y; /*Coefficient variable to calculate CCE Index as per 3gpp Spec 38.213 Sec 10.1*/
+}SchPdcchInfo;
+
/**
* @brief
* UE control block
SchK0K1TimingInfoTbl k0K1InfoTbl;
bool k2TblPrsnt;
SchK2TimingInfoTbl k2InfoTbl;
+ SchPdcchInfo pdcchInfo[MAX_NUM_CRSET];
}SchUeCb;
/**
PdschCfg sib1PdschCfg;
}SchSib1Cfg;
+typedef struct dlTotalPrbUsage
+{
+ uint16_t numPrbUsedForTx;
+ uint16_t totalPrbAvailForTx;
+}TotalPrbUsage;
+
+typedef struct
+{
+ TotalPrbUsage *dlTotalPrbUsage;
+ TotalPrbUsage *ulTotalPrbUsage;
+}SchKpiSupported;
+
+typedef struct
+{
+ CmLListCp dlTotPrbUseList;
+ CmLListCp ulTotPrbUseList;
+}SchKpiActive;
+
+typedef struct schStatsGrp
+{
+ Inst schInst;
+ uint64_t subscriptionId;
+ uint8_t groupId;
+ uint16_t periodicity; /* In milliseconds */
+ CmTimer periodTimer;
+ SchKpiSupported kpiStats;
+}SchStatsGrp;
+
+typedef struct schStatistics
+{
+ CmLListCp statsGrpList;
+ SchKpiActive activeKpiList;
+}SchStatistics;
+
/**
* @brief
* Cell Control block per cell.
uint8_t maxMsg3Tx; /* MAximum num of msg3 tx*/
}SchCellCb;
+typedef struct schTimer
+{
+ CmTqCp tmrTqCp; /*!< Timer Task Queue Cntrl Point */
+ CmTqType tmrTq[SCH_TQ_SIZE]; /*!< Timer Task Queue */
+ uint8_t tmrRes; /*!< Timer resolution */
+}SchTimer;
/**
* @brief
{
TskInit schInit; /*!< Task Init info */
SchGenCb genCfg; /*!< General Config info */
- CmTqCp tmrTqCp; /*!< Timer Task Queue Cntrl Point */
- CmTqType tmrTq[SCH_TQ_SIZE]; /*!< Timer Task Queue */
+ SchTimer schTimersInfo; /*!< Sch timer queues and resolution */
SchAllApis allApis[NUM_SCH_TYPE]; /*!<List of All Scheduler Type dependent Function pointers*/
SchCellCb *cells[MAX_NUM_CELL]; /* Array to store cellCb ptr */
CmLListCp sliceCfg; /* Linklist to Store Slice configuration */
+ SchStatistics statistics; /* Statistics configuration and calculated values */
}SchCb;
/* Declaration for scheduler control blocks */
-SchCb schCb[SCH_MAX_INST];
+extern SchCb schCb[SCH_MAX_INST];
/* function declarations */
short int schActvTmr(Ent ent,Inst inst);
uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId,bool isRetxMsg4, SchDlHqProcCb **hqP);
uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAlloc *rarAlloc, uint8_t k0Index);
bool schFillBoGrantDlSchedInfo(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchDlHqProcCb **hqP);
-uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
-uint32_t tbSize, DlMsgSchInfo *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol, uint8_t pdschNumSymbols,bool isRetx, SchDlHqProcCb* hqP);
+uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti, uint32_t tbSize, DlMsgSchInfo *dlMsgAlloc,\
+ uint16_t startPRB, uint8_t pdschStartSymbol, uint8_t pdschNumSymbols,bool isRetx, SchDlHqProcCb* hqP, SchPdcchAllocInfo pdcchAllocInfo);
uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgSchInfo *msg4Alloc,\
uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP);
uint8_t allocatePrbDl(SchCellCb *cell, SlotTimingInfo slotTime, uint8_t startSymbol, uint8_t symbolLength, \
uint16_t *startPrb, uint16_t numPrb);
void fillDlMsgInfo(DlMsgSchInfo *dlMsgInfo, uint16_t crnti, bool isRetx, SchDlHqProcCb* hqP); /*AS per 38.473 V15.3.0, Section 9.3.1.32 crnti value range is b/w 0..65535*/
-bool findValidK0K1Value(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool dedMsg, uint8_t *pdschStartSymbol,\
-uint8_t *pdschSymblLen, SlotTimingInfo *pdcchTime, SlotTimingInfo *pdschTime, SlotTimingInfo *pucchTime, bool isRetx, SchDlHqProcCb *hqP);
+bool findValidK0K1Value(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool dedMsg, uint8_t *pdschStartSymbol, uint8_t *pdschSymblLen,\
+ SlotTimingInfo *pdcchTime, SlotTimingInfo *pdschTime, SlotTimingInfo *pucchTime, bool isRetx, SchDlHqProcCb *hqP, SchPdcchAllocInfo *pdcchAllocInfo);
RaRspWindowStatus isInRaRspWindow(SchRaReq *raReq, SlotTimingInfo frameToCheck, uint16_t numSlotsPerSystemFrame);
/* UL scheduling related function declarations */
bool schCheckPrachOcc(SchCellCb *cell, SlotTimingInfo prachOccasionTimingInfo);
uint8_t schCalcPrachNumRb(SchCellCb *cell);
void schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotTimingInfo prachOccasionTimingInfo);
-uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP);
+uint8_t schAllocPucchResource(SchCellCb *cell, uint8_t ueId, SlotTimingInfo pucchTime, SchUeCb *ueCb, SchDlHqProcCb *hqP, SchPdcchAllocInfo *pdcchAllocInfo);
uint8_t schFillUlDci(SchUeCb *ueCb, SchPuschInfo *puschInfo, DciInfo *dciInfo, bool isRetx, SchUlHqProcCb *hqP);
uint8_t schFillPuschAlloc(SchUeCb *ueCb, SlotTimingInfo puschTime, uint32_t tbSize,
uint8_t startSymb, uint8_t symbLen, uint16_t startPrb, bool isRetx, SchUlHqProcCb *hqP);
void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool dedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd);
void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status);
+uint8_t fillUeCoresetAndSsInfo(SchUeCb *ue);
+bool schDlCandidateSelection(SchUeCb *ue, SlotTimingInfo slotTime, SchPdcchAllocInfo *pdcchAllocInfo);
/*Paging Functions*/
void schProcPagingCfg(SchCellCb *cell);
/* Round Robbin Scheduler funtions*/
uint8_t schFillUlDciForMsg3Retx(SchRaCb *raCb, SchPuschInfo *puschInfo, DciInfo *dciInfo);
-bool schGetMsg3K2(SchCellCb *cell, SchUlHqProcCb* msg3HqProc, uint16_t dlTime, SlotTimingInfo *msg3Time, bool isRetx);
+bool schGetMsg3K2(SchCellCb *cell, uint8_t ueId, SchUlHqProcCb* msg3HqProc, uint16_t dlTime, SlotTimingInfo *msg3Time, bool isRetx);
void schMsg4Complete(SchUeCb *ueCb);
+
+/* Statistics Function */
+uint8_t SchProcStatsReq(Pst *pst, SchStatsReq *statsReq);
+uint8_t SchSendStatsIndToMac(Inst inst, SchStatsInd *statsInd);
+uint8_t schCalcAndSendGrpStats(SchStatsGrp *grpInfo);
+uint8_t SchProcStatsDeleteReq(Pst *pst, SchStatsDeleteReq *statsDeleteReq);
+uint8_t SchProcStatsModificationReq(Pst *pst, SchStatsModificationReq *statsModificationReq);
+void deleteStatsGrpInfo(Inst inst, SchStatsGrp *statsGrpInfo);
/**********************************************************************
End of file
**********************************************************************/