2 * Generated by asn1c-0.9.29 (http://lionet.info/asn1c)
3 * From ASN.1 module "NR-RRC-Definitions"
4 * found in "../../../rrc_15.5.1_asn.asn1"
5 * `asn1c -D ./rrc_out_hlal -fcompound-names -fno-include-deps -findirect-choice -gen-PER -no-gen-example`
8 #ifndef _CSI_RS_IM_ReceptionForFeedback_H_
9 #define _CSI_RS_IM_ReceptionForFeedback_H_
12 #include <asn_application.h>
14 /* Including external dependencies */
15 #include <NativeInteger.h>
16 #include <NativeEnumerated.h>
17 #include <constr_SEQUENCE.h>
24 typedef enum CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC {
25 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p2 = 0,
26 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p4 = 1,
27 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p8 = 2,
28 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p12 = 3,
29 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p16 = 4,
30 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p24 = 5,
31 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p32 = 6,
32 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p40 = 7,
33 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p48 = 8,
34 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p56 = 9,
35 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p64 = 10,
36 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p72 = 11,
37 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p80 = 12,
38 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p88 = 13,
39 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p96 = 14,
40 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p104 = 15,
41 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p112 = 16,
42 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p120 = 17,
43 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p128 = 18,
44 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p136 = 19,
45 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p144 = 20,
46 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p152 = 21,
47 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p160 = 22,
48 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p168 = 23,
49 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p176 = 24,
50 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p184 = 25,
51 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p192 = 26,
52 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p200 = 27,
53 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p208 = 28,
54 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p216 = 29,
55 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p224 = 30,
56 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p232 = 31,
57 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p240 = 32,
58 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p248 = 33,
59 CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC_p256 = 34
60 } e_CSI_RS_IM_ReceptionForFeedback__maxNumberPortsAcrossNZP_CSI_RS_PerCC;
61 typedef enum CSI_RS_IM_ReceptionForFeedback__maxNumberCS_IM_PerCC {
62 CSI_RS_IM_ReceptionForFeedback__maxNumberCS_IM_PerCC_n1 = 0,
63 CSI_RS_IM_ReceptionForFeedback__maxNumberCS_IM_PerCC_n2 = 1,
64 CSI_RS_IM_ReceptionForFeedback__maxNumberCS_IM_PerCC_n4 = 2,
65 CSI_RS_IM_ReceptionForFeedback__maxNumberCS_IM_PerCC_n8 = 3,
66 CSI_RS_IM_ReceptionForFeedback__maxNumberCS_IM_PerCC_n16 = 4,
67 CSI_RS_IM_ReceptionForFeedback__maxNumberCS_IM_PerCC_n32 = 5
68 } e_CSI_RS_IM_ReceptionForFeedback__maxNumberCS_IM_PerCC;
69 typedef enum CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC {
70 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n5 = 0,
71 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n6 = 1,
72 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n7 = 2,
73 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n8 = 3,
74 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n9 = 4,
75 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n10 = 5,
76 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n12 = 6,
77 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n14 = 7,
78 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n16 = 8,
79 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n18 = 9,
80 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n20 = 10,
81 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n22 = 11,
82 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n24 = 12,
83 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n26 = 13,
84 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n28 = 14,
85 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n30 = 15,
86 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n32 = 16,
87 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n34 = 17,
88 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n36 = 18,
89 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n38 = 19,
90 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n40 = 20,
91 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n42 = 21,
92 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n44 = 22,
93 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n46 = 23,
94 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n48 = 24,
95 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n50 = 25,
96 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n52 = 26,
97 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n54 = 27,
98 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n56 = 28,
99 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n58 = 29,
100 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n60 = 30,
101 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n62 = 31,
102 CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC_n64 = 32
103 } e_CSI_RS_IM_ReceptionForFeedback__maxNumberSimultaneousCSI_RS_ActBWP_AllCC;
104 typedef enum CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC {
105 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p8 = 0,
106 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p12 = 1,
107 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p16 = 2,
108 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p24 = 3,
109 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p32 = 4,
110 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p40 = 5,
111 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p48 = 6,
112 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p56 = 7,
113 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p64 = 8,
114 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p72 = 9,
115 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p80 = 10,
116 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p88 = 11,
117 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p96 = 12,
118 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p104 = 13,
119 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p112 = 14,
120 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p120 = 15,
121 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p128 = 16,
122 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p136 = 17,
123 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p144 = 18,
124 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p152 = 19,
125 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p160 = 20,
126 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p168 = 21,
127 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p176 = 22,
128 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p184 = 23,
129 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p192 = 24,
130 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p200 = 25,
131 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p208 = 26,
132 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p216 = 27,
133 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p224 = 28,
134 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p232 = 29,
135 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p240 = 30,
136 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p248 = 31,
137 CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_p256 = 32
138 } e_CSI_RS_IM_ReceptionForFeedback__totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC;
140 /* CSI-RS-IM-ReceptionForFeedback */
141 typedef struct CSI_RS_IM_ReceptionForFeedback {
142 long maxNumberNZP_CSI_RS_PerCC;
143 long maxNumberPortsAcrossNZP_CSI_RS_PerCC;
144 long maxNumberCS_IM_PerCC;
145 long maxNumberSimultaneousCSI_RS_ActBWP_AllCC;
146 long totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC;
148 /* Context for parsing across buffer boundaries */
149 asn_struct_ctx_t _asn_ctx;
150 } CSI_RS_IM_ReceptionForFeedback_t;
153 /* extern asn_TYPE_descriptor_t asn_DEF_maxNumberPortsAcrossNZP_CSI_RS_PerCC_3; // (Use -fall-defs-global to expose) */
154 /* extern asn_TYPE_descriptor_t asn_DEF_maxNumberCS_IM_PerCC_39; // (Use -fall-defs-global to expose) */
155 /* extern asn_TYPE_descriptor_t asn_DEF_maxNumberSimultaneousCSI_RS_ActBWP_AllCC_46; // (Use -fall-defs-global to expose) */
156 /* extern asn_TYPE_descriptor_t asn_DEF_totalNumberPortsSimultaneousCSI_RS_ActBWP_AllCC_80; // (Use -fall-defs-global to expose) */
157 extern asn_TYPE_descriptor_t asn_DEF_CSI_RS_IM_ReceptionForFeedback;
158 extern asn_SEQUENCE_specifics_t asn_SPC_CSI_RS_IM_ReceptionForFeedback_specs_1;
159 extern asn_TYPE_member_t asn_MBR_CSI_RS_IM_ReceptionForFeedback_1[5];
165 #endif /* _CSI_RS_IM_ReceptionForFeedback_H_ */
166 #include <asn_internal.h>