1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /* Defines API exchanged between MAC and PHY */
20 #ifndef __RG_CL_PHY_H___
21 #define __RG_CL_PHY_H___
23 #define MSG_HDR_SIZE 8
24 #define DCI_PAYLOAD_BTYE_LEN 1 /* TBD */
26 #define MAC_DCI_PER_SLOT 1 /* TBD */
27 #define MAX_UL_PDU_PER_SLOT 1 /* TBD */
28 #define MAX_UCI_PER_SLOT 1 /* TBD */
29 #define MAX_DL_PDU_PER_SLOT 1 /* TBD */
30 #define MAX_PARAM_TLV 54 /* Maximum TLVs that can be reported in param response */
31 #define MAX_CONFIG_TLV 40 /* Maximum TLVs that can be configured in config request */
32 #define MAX_NUM_PDU 255 /* Maximum PDUs that can be included in a message */
33 #define MAX_UE_GRP_DL 255 /* Maximum UE groups that can be included in a DL TTI request */
34 #define MAX_UE_GRP_UL 8 /* Maximum UE groups that can be included in a UL TTI request */
35 #define MAX_UE_PER_GRP_DL 12 /* Maximum UEs included in a group in DL */
36 #define MAX_UE_PER_GRP_UL 6 /* Maximum UEs included in a group in UL */
37 #define MAX_PRG 275 /* Maximum Precoding Resource Block Group */
38 #define MAX_DIGBF_INTF 255 /* Maximum digBf interfaces */
39 #define MAX_CODE_WORD_PER_RNTI 2 /* Maximum code word for one RNTI */
40 #define MAX_UL_PTRS_PORTS 2 /* Maximum number of UL PTRS ports */
41 #define MAX_REPORT_SYMB 4 /* Maximum reported symbols in SRS indication */
42 #define MAX_NUM_PRB 272 /* Maximum number of PRBs in SRS indication PDU */
43 #define MAX_NUM_PRMBL 64 /* Maximum number of preambles */
44 #define MAX_HARQ_SIZE 213 /* Maximum size of HARQ payload */
46 //Defining API type values
47 #define MSG_TYPE_PARAM_REQ 0x00
48 #define MSG_TYPE_PARAM_RSP 0x01
49 #define MSG_TYPE_CONFIG_REQ 0x02
50 #define MSG_TYPE_CONFIG_RSP 0x03
51 #define MSG_TYPE_START_REQ 0x04
52 #define MSG_TYPE_STOP_REQ 0x05
53 #define MSG_TYPE_STOP_IND 0x06
54 #define MSG_TYPE_ERR_IND 0x07
55 #define MSG_TYPE_DL_TTI_REQ 0x80
56 #define MSG_TYPE_UL_TTI_REQ 0x81
57 #define MSG_TYPE_SLOT_IND 0x82
58 #define MSG_TYPE_UL_DCI_REQ 0x83
59 #define MSG_TYPE_TX_DATA_REQ 0x84
60 #define MSG_TYPE_RX_DATA_IND 0x85
61 #define MSG_TYPE_CRC_IND 0x86
62 #define MSG_TYPE_UCI_IND 0x87
63 #define MSG_TYPE_SRS_IND 0x88
64 #define MSG_TYPE_RACH_IND 0x89
66 /* Defining TAG for Parameter message TLVs */
67 /* Cell Specific Parameters */
68 #define PARAM_TAG_REL_CAP 0x0001 /* Release capacity */
69 #define PARAM_TAG_PHY_STATE 0x0002 /* PHY state */
70 #define PARAM_TAG_SKIP_BLNK_DL_CFG 0x0003
71 #define PARAM_TAG_SKIP_BLNK_UL_CFG 0x0004
72 #define PARAM_TAG_NUM_CFG_TLV_REP 0x0005 /* Number of config TLVs which will be reported */
74 /* Carrier Specific Parameters */
75 #define PARAM_TAG_CYCLIC_PREFIX 0x0006 /* Cyclic prefix */
76 #define PARAM_TAG_DL_SUBC_SPC_SUPP 0x0007 /* DL subcarrier spacing supported */
77 #define PARAM_TAG_DL_BDW_SUPP 0x0008 /* DL bandwidth supported */
78 #define PARAM_TAG_UL_SUBC_SPC_SUPP 0x0009 /* UL subcarrier spacing supported */
79 #define PARAM_TAG_UL_BDW_SUPP 0x000A /* DL bandwidth supported */
81 /* PDCCH Parameters */
82 #define PARAM_TAG_CCE_MAP_TYPE 0x000B /* CCE Mapping type */
83 #define PARAM_TAG_CORES_OUT_FISRT_30SYM 0x000C /* Coreset outside first 30 symbols of slot support */
84 #define PARAM_TAG_PRECOD_GRANULAR_CORES 0x000D /* Precoder granularity coreset support */
85 #define PARAM_TAG_PDCCH_MU_MIMO 0x000E /* PDCCH multi user mimo support */
86 #define PARAM_TAG_PDCCH_PRECOD_CYC 0x000F /* PDCCH precoder cycling support */
87 #define PARAM_TAG_MAX_PDCCH_PER_SLOT 0x0010 /* Max PDCCHs per slot */
89 /* PUCCH Parameters */
90 #define PARAM_TAG_PUCCH_FORMATS 0x0011 /* PUCCH formats supported */
91 #define PARAM_TAG_MAX_PUCCH_PER_SLOT 0x0012 /* Max PUCCHs per slot */
93 /* PDSCH Parameters */
94 #define PARAM_TAG_PDSCH_MAP_TYPE 0x0013 /* PDSCH mapping type */
95 #define PARAM_TAG_PDSCH_ALLOC_TYPE 0x0014 /* PDSCH allocation type */
96 #define PARAM_TAG_PDSCH_VRB_PRB_MAP 0x0015 /* PDSCH vrb to prb mapping */
97 #define PARAM_TAG_PDSCH_CBG 0x0016 /* PDSCH code block group support */
98 #define PARAM_TAG_PDSCH_DMRS_CFG_TYPE 0x0017 /* PDSCH dmrs configuration types */
99 #define PARAM_TAG_PDSCH_DMRS_MAX_LEN 0x0018 /* PDSCH dmrs max length */
100 #define PARAM_TAG_PDSCH_DMRS_ADD_POS 0x0019 /* PDSCH dmrs additional position */
101 #define PARAM_TAG_MAX_PDSCH_TB_PER_SLOT 0x001A /* Max PDSCH trasnport blocks per slot */
102 #define PARAM_TAG_MAX_MIMO_LAYER_PDSCH 0x001B /* Max number of MIMO layers supported for PDSCH */
103 #define PARAM_TAG_MAX_MOD_ORDER_SUPP_DL 0x001C /* Max modulation order supported for DL */
104 #define PARAM_TAG_MAX_MU_MIMO_USER_DL 0x001D /* Max users of MU MIMO in DL */
105 #define PARAM_TAG_PDSCH_DAT_IN_DMRS_SYM 0x001E /* PDSCH data in dmrs symbols supported */
106 #define PARAM_TAG_PREEMPT_SUPP 0x001F /* Pre-emption support */
107 #define PARAM_TAG_PDSCH_NON_SLOT_SUPP 0x0020 /* PDSCH non slot support */
109 /* PUSCH Parameters */
110 #define PARAM_TAG_UCI_MUX_ULSCH_IN_PUSCH 0x0021
111 #define PARAM_TAG_UCI_ONLY_PUSCH 0x0022 /* UCI only in PUSCH support */
112 #define PARAM_TAG_PUSCH_FREQ_HOP 0x0023 /* PUSCH frequency hopping support */
113 #define PARAM_TAG_PUSCH_DMRS_CFG_TYPE 0x0024 /* PUSCH dmrs configuration types */
114 #define PARAM_TAG_PUSCH_DMRS_MAX_LEN 0x0025 /* PUSCH dmrs max length */
115 #define PARAM_TAG_PUSCH_DMRS_ADD_POS 0x0026 /* PUSCH dmrs additional position */
116 #define PARAM_TAG_PUSCH_CBG 0x0027 /* PUSCH code block group support */
117 #define PARAM_TAG_PUSCH_MAP_TYPE 0x0028 /* PUSCH mapping type */
118 #define PARAM_TAG_PUSCH_ALLOC_TYPE 0x0029 /* PUSCH allocation type */
119 #define PARAM_TAG_PUSCH_VRB_PRB_MAP 0x002A /* PUSCH vrb to prb mapping */
120 #define PARAM_TAG_PUSCH_MAX_PTRS_PORT 0x002B /* PUSCH max PTRS ports */
121 #define PARAM_TAG_MAX_PUSCH_TB_PER_SLOT 0x002C /* Max PUSCH trasnport blocks per slot */
122 #define PARAM_TAG_MAX_NUM_MIMO_NON_CB_PUSCH 0x002D /* Max number of MIMO layers for non-contention based PUSCH */
123 #define PARAM_TAG_MAX_MOD_ORDER_SUPP_UL 0x002E /* Max modulation order supported for UL */
124 #define PARAM_TAG_MAX_MU_MIMO_USER_UL 0x002F /* Max users of MU MIMO in UL */
125 #define PARAM_TAG_DFTS_OFDM_SUPP 0x0030 /* DFTS-OFDM support */
126 #define PARAM_TAG_PUSCH_AGGR_FACT 0x0031 /* PUSCH aggregation factor */
128 /* PRACH Parameters */
129 #define PARAM_TAG_PRACH_LONG_FORMAT 0x0032 /* PRACH long formats */
130 #define PARAM_TAG_PRACH_SHORT_FORMAT 0x0033 /* PRACH short formats */
131 #define PARAM_TAG_PRACH_RES_SET 0x0034 /* PRACH restricted formats */
132 #define PARAM_TAG_MAX_PRACH_FD_OCC_IN_SLOT 0x0035 /* Max PRACH fd occassions in a slot */
134 /* Measurement Parameters */
135 #define PARAM_TAG_RSSI_MEAS_SUPP 0x0036 /* RSSI measurement support */
137 /* Defining TAG for Config message TLVs */
138 /* Carrier Configuration */
139 #define CFG_TAG_DL_BW 0x1001 /* DL bandwidth */
140 #define CFG_TAG_DL_FREQ 0x1002 /* DL frequency */
141 #define CFG_TAG_DLK0 0x1003
142 #define CFG_TAG_DL_GRID_SIZE 0x1004 /* DL grid size */
143 #define CFG_TAG_NUM_TX_ANT 0x1005 /* Number of transmission antennas */
144 #define CFG_TAG_UL_BW 0x1006 /* Uplink bandwidth */
145 #define CFG_TAG_UL_FREQ 0x1007 /* UL frequency */
146 #define CFG_TAG_ULK0 0x1008
147 #define CFG_TAG_UL_GRID_SIZE 0x1009 /* UL grid size */
148 #define CFG_TAG_NUM_RX_ANT 0x100A /* Number of receiver antennas */
149 #define CFG_TAG_FREQ_SHIFT_7P5KHZ 0x100B /* Indicates presence of 7.5 KHz frequency shift */
151 /* Cell Configuration */
152 #define CFG_TAG_PHY_CELL_ID 0x100C /* Physical cell id */
153 #define CFG_TAG_FRAME_DUP_TYPE 0x100D /* Frame duplex type */
155 /* SSB Configuration */
156 #define CFG_TAG_SS_PBCH_PWR 0x100E /* SSB Block power */
157 #define CFG_TAG_BCH_PAYLOAD 0x100F /* BCH payload options */
158 #define CFG_TAG_SCS_COMM 0x1010 /* Subcarrier spacing for common */
160 /* PRACH Configuration */
161 #define CFG_TAG_PRACH_SEQ_LEN 0x1011 /* RACH sequence length */
162 #define CFG_TAG_PRACH_SUBC_SPAC 0x1012 /* Subcarrier spacing of PRACH */
163 #define CFG_TAG_RES_SET_CFG 0x1013 /* PRACH restricted set config */
164 #define CFG_TAG_NUM_PRACH_FD_OCC 0x1014 /* Number of PRACH frequency domain occassions */
165 #define CFG_TAG_PRACH_ROOT_SEQ_ID 0x1015 /* Starting logical root sequence index */
166 #define CFG_TAG_NUM_ROOT_SEQ 0x1016 /* Number of root sequences for a FD occasion */
167 #define CFG_TAG_K1 0x1017 /* Frequency offset (for UL Bw) for each FD */
168 #define CFG_TAG_PRACH_ZERO_CORR_CFG 0x1018 /* PRACH zero correlation config */
169 #define CFG_TAG_NUM_UNUSED_ROOT_SEQ 0x1019 /* Number of unused root sequences avaialable */
170 #define CFG_TAG_UNUSED_ROOT_SEQ 0x101A /* Unused root sequence */
171 #define CFG_TAG_SSB_PER_RACH 0x101B /* SSB per RACH */
172 #define CFG_TAG_PRACH_MULT_CARR_BAND 0x101C /* PRACH multiple carrier support in a band */
175 #define CFG_TAG_SSB_OFFS_POINT_A 0x101D /* Offset of lowest subcarrier of lowest RB of SS/PBCH block*/
176 #define CFG_TAG_BETA_PSS 0x101E /* PSS EPRE to SSS EPRE in as SS/PBCH block */
177 #define CFG_TAG_SSB_PERIOD 0x101F /* SSB periodicity in msec */
178 #define CFG_TAG_SSB_SUBC_OFFS 0x1020 /* Subcarrier offset */
179 #define CFG_TAG_MIB 0x1021
180 #define CFG_TAG_SSB_MASK 0x1022 /* Bitmap of actually transmitted SSB */
181 #define CFG_TAG_BEAM_ID 0x1023 /* Beam id for each SSB in SSB mask */
182 #define CFG_TAG_SS_PBCH_MULT_CARR_BAND 0X1024 /* Multiple carrier support in a band */
183 #define CFG_TAG_MULT_CELL_SS_PBCH_CARR 0x1025 /* Multiple cells support in single carrier */
186 #define CFG_TAG_TDD_PERIOD 0x1026 /* DL UL transmission periodicity */
187 #define CFG_TAG_SLOT_CFG 0x1027 /* Slot config */
189 /* Measurement Configuration */
190 #define CFG_TAG_RSSI_MEAS 0x1028 /* RSSI Measurement unit */
205 typedef struct msgHdr
207 U8 nMsg; /* Numer of messages in PHY API msg */
208 U16 msgType; /* Message type Id */
209 U32 msgLen; /* Length of msg body in bytes */
212 typedef struct paramTlv
216 U16 value; /* TBD : decide on data type */
219 typedef struct sfnSlot
225 typedef struct pduInfo
236 U16 bwpSize; /* Bandwidth part size */
237 U16 bwpStart; /* Bandwidth part start RB index from reference CRB */
238 U8 sbcSpacing; /* Subcarrier spacing */
239 U8 cycPrefix; /* Cyclic prefix */
242 typedef struct coreset
244 U8 startSymIdx; /* Starting OFDM symbol for CORESET */
245 U8 durSym; /* Time duration of CORESET in num of symbols */
246 U8 freqDomainRes[6]; /* Frequency domain resources */
247 U8 cceRegMapType; /* CORESET-CCE-to-REG mapping type */
248 U8 regBundleSize; /* Number of registers in a bundle */
249 U8 interlvrSize; /* Inter leaver size */
250 U8 coreSetType; /* Core set type */
252 U8 precodGranule; /* Precoder granularity */
255 typedef struct txPwrInfo
257 U8 betaPdcch; /* PDCCH power used for PDCCH format 1_0 */
258 U8 pwrCtrlOffSs; /* Power control offset SS : used for all other PDCCH formats */
261 typedef struct codeWrdInfo
263 U16 tgtCodeRt; /* Target coding rate */
264 U8 quamModOdr; /* QAM Modulation */
265 U8 mcsIdx; /* MCS index */
266 U8 mcsTable; /* MCS-table-PDSCH */
267 U8 rvIdx; /* Redundancy version index */
268 U32 tbSize; /* Transmit block size */
271 typedef struct codeWrd
273 U8 numCodeWrd; /* Number of code words for this RNTI */
274 L1L2CodeWrdInfo codeWrdInfo[MAX_CODE_WORD_PER_RNTI]; /* Info of each numCodeWrd */
279 U16 symbPos; /* DMRS symbol position */
280 U8 cfgType; /* DMRS configuration type */
281 U16 scrambleId; /* DMRS scrambling id */
282 U8 scId; /* DMRS sequence initialization */
283 U8 numCdmGrpNoDat; /* Number of DM-RS CDM groups without data */
284 U16 ports; /* DMRS ports */
289 U8 portIdx; /* PTRS antenna ports */
290 U8 timeDens; /* PTRS time density */
291 U8 freqDens; /* PTRS frequency desnity */
292 U8 reOffset; /* PTRS resource element offset */
293 U8 epreRatio; /* PTRS-To-PDSCH EPRE ratio */
298 U8 isLstCbPres; /* Is last CB present in CBG retransmission */
299 U8 isInlineTbCrc; /* Is TB CRC part of data paylod or control msg */
300 U32 dlTbCrc; /* TB CRC to be used in last CB if last CB pres */
303 typedef struct resAllocFreqDom
305 U8 resAllocType; /* Resource allocation type */
306 U8 rbBitmap[36]; /* Bitmap for RBs for alloc type 0 */
307 U16 rbStart; /* PDSCH starting RB in BWP for alloc type 1 */
308 U16 rbSize; /* Num of RB for PDSCH for alloc type 1 */
309 U8 vrbToPrbMap; /* VRB to PRB mapping */
310 }L1L2ResAllocFreqDom;
312 typedef struct puschAllocFreqDom
314 L1L2ResAllocFreqDom resFreqDom; /* Resources allocated in frequency domain */
315 Bool freqHop; /* Frequency hopping enabled for alloc type 1 */
316 U16 txDirCurLoc; /* Uplink Tx direct current location for the carrier */
317 Bool ulFreqShft7p5Khz; /* Indicates if 7.5 KHz shift is there */
318 }L1L2PuschAllocFreqDom;
320 typedef struct resAllocTimeDom
322 U8 startSymbIdx; /* Start symbol index of PDSCH mapping from the start of slot */
323 U8 nrOfSymbols; /* PDSCH duration in symbols */
324 }L1L2ResAllocTimeDom;
326 typedef struct prgInfo
328 U16 pmIdx; /* Index to precoding matrix */
329 U16 beamIdx[MAX_DIGBF_INTF]; /* Index of digital beam weight vector */
332 typedef struct precodBeamfrmPdu
334 U16 numPrgs; /* Number of precoding RB group */
335 U16 prgSize; /* Size in RBs of a PRG */
336 U8 digBfIntf; /* Number of STD ant ports feeding into digBF */
337 L1L2PrgInfo prgInfo[MAX_PRG]; /* Info for numPrgs */
338 }L1L2PrecodBeamfrmPdu;
340 typedef struct rxBeamFrmPdu
342 U16 numPrgs; /* Number of precoding RB group */
343 U16 prgSize; /* Size in RBs of a PRG */
344 U8 digBfIntf; /* Number of STD ant ports feeding into digBF */
345 U16 beamIdx[MAX_PRG][MAX_DIGBF_INTF]; /* Rx PRG info */
348 typedef struct phyGenMib
350 U8 dmrsTypeAPos; /* Position of first DM-RS for DL or UL */
351 U8 pdcchCfgSib1; /* PDCCH config SIB1 */
352 U8 callBarFlag; /* Flag to indicate if cell is barred */
353 U8 intraFreqResel; /* Controls cell selection/re-selection to intra-frequency cell */
356 typedef struct bchPayld
360 U32 macGenMibPdu; /* MAC generated MIB pdu */
361 L1L2PhyGenMib phyGenMibPdu; /* PHY generated MIB pdu */
367 U16 rnti; /* UE RNTI */
368 U16 scrambleId; /* PDCCH-DMRS-Scrambling id */
369 U16 scrambleRnti; /* PDCCH-DMRS-Scrambling id */
370 U8 ceIdx; /* CCE start index to send DCI */
371 U8 aggLvl; /* Aggregation Level */
372 U16 payldSizeBits; /* Total DCI length including padding bits */
373 U8 payld[DCI_PAYLOAD_BTYE_LEN]; /* DCI Paylod. TBD : value of DCI_PAYLOAD_BTYE_LEN */
374 L1L2PrecodBeamfrmPdu precodBeamfrmPdu; /* Precoding and Beamforming Info */
375 L1L2TxPwrInfo txPwrInfo; /* Transmission power info */
378 typedef struct puschMandInfo
380 U16 tgtCodeRt; /* Target coding rate */
381 U8 quamModOdr; /* QAM Modulation */
382 U8 mcsIdx; /* MCS index */
383 U8 mcsTable; /* MCS-table-PUSCH */
384 U8 trnsfrmPrecod; /* Transform precoding enabled */
385 U16 scrambleId; /* Data scrambling identity */
386 U8 numLayer; /* Number of layers */
389 typedef struct puschData
391 U8 rvIdx; /* Redundancy version index */
392 U8 harqProcId; /* HARQ process number */
393 U8 newDatInd; /* Indicates new data or retransmission */
394 U32 tbSize; /* Transmission block size */
395 U16 numCb; /* Number of Cbs in TB */
396 U8 cbPresPos[]; /* Each bit represent if CB is present */ //TBD: size of array
399 typedef struct puschUci
401 U16 harqAckBitLen; /* Number of HARQ-ACK bits */
402 U16 csiPrt1BitLen; /* Number of CSI-Part1 bits */
403 U16 csiPrt2BitLen; /* Number of CSI-Part2 bits */
404 U8 alphaScale; /* Alpha scaling */
405 U8 betaOffHarqAck; /* Beta offset for HARQ-ACK bits */
406 U8 betaOffCsi1; /* Beta offset for CSI-Part1 bits */
407 U8 betaOffCsi2; /* Beta offset for CSI-Part2 bits */
410 typedef struct puschPtrsInfo
412 U8 portIdx; /* PTRS antenna ports */
413 U8 dmrsPort; /* DMRS port corresponding to PTRS port */
414 U8 reOffset; /* PTRS resource element offset */
417 typedef struct puschPtrs
419 U8 numPorts; /* Number of UL PT-RS ports */
420 L1L2PuschPtrsInfo ptrsInfo[MAX_UL_PTRS_PORTS];
421 U8 timeDen; /* PT-RS time density */
422 U8 freqDen; /* PT-RS frequency density */
423 U8 ulPtrsPwr; /* PUSCH to PTRS power ratio per layer pere RE */
426 typedef struct dftsOfdm
428 U8 lowPaprGrpNum; /* Group numer for low PAPR number generation */
429 U16 lowPaprSeqNum; /* Low PAPR sequence number */
430 U8 ulPtrsSamDen; /* Number of PTRS groups */
431 U8 ulPtrsTimeDen; /* Number of samples per PTRS groups */
434 typedef struct hopInfo
436 Bool freqHopFlag; /* Frequency hopping enabled for PUCCH resource */
437 U16 secHopPrb; /* Index of first PRB after freq hopping */
438 Bool grpHopFlag; /* Indicates group hopping enabled */
439 Bool seqHopFlag; /* Indicates sequence hopping enabled */
440 U16 hopId; /* Scrambling Id for group and sequence hopping */
441 U16 initCyclShft; /* Initial cyclic shift used for frequency hopping */
444 typedef struct pdcchPdu
446 L1L2Bwp bwp; /* Bandwidth part info */
447 L1L2Coreset coreset; /* core set info */
448 U16 numDlDci; /* Number of DCI in this core set */
449 L1L2DlDci dlDci[MAC_DCI_PER_SLOT]; /* DL DCI for each numDlDci */
452 typedef struct pdschPdu
454 U16 pduBitmap; /* Indicates presence of optional pdus */
455 U16 rnti; /* UE RNTI */
456 U16 pduIdx; /* PDU index for each PDSCH PDU sent */
457 L1L2Bwp bwp; /* Bandwidth part info */
458 L1L2CodeWrd codeWrd; /* Code word info */
459 U16 scrambleId; /* Data scrambling identity */
460 U8 numLayer; /* Number of layers */
461 U8 txSch; /* Transmission scheme */
462 U8 refPnt; /* Reference point */
464 L1L2ResAllocFreqDom resFreqDom; /* PDSCH allocation in frequency domain */
465 L1L2ResAllocTimeDom resTimeDom; /* PDSCH allocation in time domain */
467 L1L2PrecodBeamfrmPdu precodBeamfrmPdu; /* Precoding and Beamforming Info */
468 L1L2TxPwrInfo txPwrInfo; /* Transmission power info */
472 typedef struct csiRsPdu
474 L1L2Bwp bwp; /* Bandwidth part info */
475 U16 startRb; /* PRB where this CSI resource starts */
476 U16 nrOfRb; /* Num of PRBs across which CSI resource spans */
477 U8 csiType; /* CSI type */
478 U8 row; /* Row entry into CSI resource location table */
479 U16 freqDom; /* Bitmap definin frequency domain allocation */
480 U8 symbL0; /* Time domain location l0 and first OFDM symbol in time domain */
481 U8 symbL1; /* Time domain location l1 and first OFDM symbol in time domain */
482 U8 cdmType; /* CDM type */
483 U8 freqDens; /* Frequency desnity */
484 U16 scrambleId; /* Scrambling Id of CSI-RS */
485 L1L2TxPwrInfo txPwrInfo; /* Transmission power info */
486 L1L2PrecodBeamfrmPdu precodBeamfrmPdu; /* Precoding and Beamforming Info */
489 typedef struct ssbPdu
491 U16 phyCellId; /* Physical cell id */
492 U8 betaPss; /* PSS EPRE to SSS EPRE in a SS/PBCH block */
493 U8 ssbBlkIdx; /* SS/PBCH block index within a SSB burst set */
494 U8 ssbSubcOff; /* SSB subcarrier offset */
495 U16 ssbOffPointA; /* Offset of lower subcarrier of lowest RB */
496 U8 bchPayldFlag; /* Indicates how BCH payload is generated */
497 L1L2BchPayld bchPayld; /* BCH payload */
498 L1L2PrecodBeamfrmPdu precodBeamfrmPdu; /* Precoding and Beamforming Info */
501 typedef struct prachPdu
503 U16 phyCellId; /* Physical cell id */
504 U8 numPrachOcas; /* Number of time-domain PRACH occassions */
505 U8 prachform; /* RACH format occassion for current FD occassion */
506 U8 numRa; /* Frequency domain occassion index */
507 U8 startSymb; /* Start symbol for first PRACH TD occassion */
508 U16 numCs; /* Zero correlation zone config number */
509 L1L2RxBeamFrmPdu beamfrmPdu; /* Rx Beamforming pdu */
512 typedef struct puschPdu
514 U16 pduBitmap; /* Indicates optional pdu */
515 U16 rnti; /* UE RNTI */
516 U32 handle; /* handling returned in Rx data ind or uci ind */
517 L1L2Bwp bwp; /* Bandwidth part info */
518 L1L2PuschMandInfo mandInfo; /* PUSCH info always included */
519 L1L2Dmrs dmrs; /* DMRS info */
520 L1L2PuschAllocFreqDom resFreqDom; /* PUSCH allocation in frequency domain */
521 L1L2ResAllocTimeDom resTimeDom; /* Resource allocation in time domain */
522 //Optional Data depending on pduBitMap
523 L1L2PuschData puschData;
524 L1L2PuschUci puschUci;
525 L1L2PuschPtrs puschPtrs;
526 L1L2DftsOfdm dftsOfdm;
527 L1L2RxBeamFrmPdu beamfrmPdu; /* Rx Beamforming pdu */
530 typedef struct pucchPdu
532 U16 rnti; /* UE RNTI */
533 U32 handle; /* handling returned in uci ind */
534 L1L2Bwp bwp; /* Bandwidth part info */
535 U8 formType; /* PUCCH format type */
536 U8 multSlotTxInd; /* Flush/keep/combine buffer for multi-slot Tx */
537 Bool pi2Bpsk; /* Indicates if UE used ppi/2 BPSK instead of QPSK */
538 U16 prbStart; /* Starting PRB within BWP for this PUCCH */
539 U16 prbSize; /* Number of pRBs within PUCCH */
540 L1L2ResAllocTimeDom resTimeDom; /* Resource allocation in time domain */
541 L1L2HopInfo hopInfo; /* Hopping information */
542 U16 scrambleId; /* Data scrambling Id */
543 U8 timeDomOccId; /* Index of orthogonal cover code */
544 U8 preDftOccId; /* Index of orthogonal cover code */
545 U8 preDftOccLen; /* Length of an orthogonal cover code */
546 Bool addDmrsFlag; /* Additional DMRS enabled flag */
547 U16 dmrsScrambleId; /* DMRS scrambling id */
548 U8 dmrsCyclShft; /* Cyclic shift index for DMRS */
549 Bool srFlag; /* Indicates SR opportunity in UCI */
550 U8 bitLenHarq; /* Bit length of HARQ payload */
551 U16 bitLenCsi1; /* Bit length of CSI part 1 payload */
552 U16 bitLenCsi2; /* Bit length of CSI part 2 patload */
553 L1L2RxBeamFrmPdu beamfrmPdu; /* Rx Beamforming pdu */
556 typedef struct srsPdu
558 U16 rnti; /* UE RNTI */
559 U32 handle; /* Handling returned in SRS indication */
560 L1L2Bwp bwp; /* Bandwidth part info */
561 U8 numAntPort; /* Number of Antenna ports */
562 U8 numSymb; /* Number of Symbols */
563 U8 numRep; /* Repetition factor */
564 U8 timeStartPos; /* Starting position in time domain */
565 U8 cfgIdx; /* SRS bandwidth config index */
566 U16 seqId; /* SRS sequence Id */
567 U8 bwIdx; /* SRS bandwidth index */
568 U8 combSize; /* Transmission comb size */
569 U8 combOff; /* Transmission comb offset */
570 U8 cyclShft; /* Cyclic shift */
571 U8 freqPos; /* Frequency domain position */
572 U8 freqShft; /* Frequency domain shift */
573 U8 freqHop; /* Frequency hopping */
574 U8 grpSeqHop; /* Group or sequence hopping configuration */
575 U8 resType; /* Type of SRS resource allocation */
576 U16 tsrs; /* SRS periodicity in slot */
577 U16 tOffset; /* Slot offset value */
578 L1L2RxBeamFrmPdu beamfrmPdu; /* Rx Beamforming pdu */
581 typedef struct dlPduInfo
587 L1L2PdcchPdu pdcchPdu;
588 L1L2PdschPdu pdschPdu;
589 L1L2CsiRsPdu csiRsPdu;
594 typedef struct ulPduInfo
600 L1L2PrachPdu prachPdu;
601 L1L2PuschPdu puschPdu;
602 L1L2PucchPdu pucchPdu;
607 typedef struct dlUeGrpInfo
609 U8 nUe; /* Number of UEs in group */
610 U8 pduIdx[MAX_UE_PER_GRP_DL]; /* Index for no. of PDU identified by nPDU in DL msg */
613 typedef struct ulUeGrpInfo
615 U8 nUe; /* Number of UEs in group */
616 U8 pduIdx[MAX_UE_PER_GRP_UL]; /* Index for no. of PDU identified by nPDU in UL msg */
619 typedef struct crcInfo
622 U8 harqId; /* HARQ proc id */
623 U8 tbCrcSta; /* Indicates CRC status on TB data */
624 U16 numCb; /* Number of CBs in TB */
625 U8 cbCrcSta[]; /* CRC status on Cb data */ //TBD : Array size
628 typedef struct repSymbInfo
630 U16 numRb; /* Number of PRBs to be reported */
631 U8 rbSnr[MAX_NUM_PRB]; /* SNR value in db for each Rb */
634 typedef struct srsIndPdu
636 U32 handle; /* Handle sent in UL TTI request SRS PDU */
637 U16 rnti; /* RNTI sent in UL TTI request SRS PDU */
638 U16 timeAdv; /* Timing advance measured for UE */
639 U8 numSymb; /* Number of symbols for SRS */
640 U8 wideBandSnr; /* SNR value measured within configured SRS bandwith */
641 U8 numRepSymb; /* Number of symbols reported */
642 L1L2RepSymbInfo repSymbInfo[MAX_REPORT_SYMB]; /* Reported symbol info */
645 typedef struct prmblInfo
647 U8 prmblIdx; /* Preamble index */
648 U16 timeAdv; /* Timing advance PRACH */
649 U32 prmblPwr; /* Received power */
652 typedef struct rachIndPdu
654 U16 phyCellId; /* Physical cell id */
655 U8 symbIdx; /* symbol index */
656 U8 slotIdx; /* Slot index */
657 U8 freqIdx; /* Frequency index */
658 U8 avgRssi; /* Average value of RSSI */
659 U8 avgSnr; /* Average value of SNR */
660 U8 nmbPrmbl; /* Number of detected preambles in PRACH occassion */
661 L1L2PrmblInfo prmblInfo[MAX_NUM_PRMBL]; /* List of premable info */
664 typedef struct srInfoFrmt01
666 Bool srInd; /* Indicates if SR detected */
667 U8 srConfLvl; /* Confidence level of detected SR */
670 typedef struct srInfoFrmt234
672 U16 bitLen; /* Length of SR payload */
673 U8 payload; /* Contents of SR */
676 typedef struct harqInfoFrmt01
678 U8 numHarq; /* Number of HARQ bits in UCI */
679 U8 confLvl; /* Confidence level of detected HARQ */
680 U8 value[2]; /* Indicates result on HARQ data */
683 typedef struct csiharqInfoFrmt234
685 U8 crc; /* CRC result in CSI/HARQ data */
686 U16 bitLen; /* Length of CSI/HARQ payload */
687 U8 payload[MAX_HARQ_SIZE]; /* CSI/HARQ pdu for format 2, 3 and 4 */
688 }L1L2CsiHarqInfoFrmt234;
690 typedef struct uciPduInfo
692 U8 pduBitmap; /* Indicates presence of optional pdu */
693 PduInfo pduInfo; /* Commom PDU info */
694 L1L2CsiHarqInfoFrmt234 harqInfo; /* HARQ info */
695 L1L2CsiHarqInfoFrmt234 csi1Info; /* CSI Part 1 info */
696 L1L2CsiHarqInfoFrmt234 csi2Info; /* CSI Part 2 info */
699 typedef struct uciPucchFrmt234Pdu
701 L1L2UciPduInfo uciPucchPduInfo;
702 U8 pucchFrmt; /* PUCCH format */
703 L1L2SrInfoFrmt234 srInfo; /* SR PDU for format 2, 3 and 4 */
704 }L1L2UciPucchFrmt234Pdu;
706 typedef struct uciPucchFrmt01Pdu
708 U8 pduBitmap; /* Indicates presence of optional pdu */
709 PduInfo pduInfo; /* Commom PDU info */
710 U8 pucchFrmt; /* PUCCH format */
711 L1L2SrInfoFrmt01 srInfo; /* SR PDU for format 0 and 1 */
712 L1L2HarqInfoFrmt01 harqInfo; /* HARQ PDU for format 0 and 1 */
713 }L1L2UciPucchFrmt01Pdu;
715 typedef struct uciIndPdu
717 U16 pduType; /* UCI indication type pdu */
718 U16 pduSize; /* Size of pdu information */
721 L1L2UciPduInfo uciPuschPdu; /* UCI indication PDU carried on PUSCH */
722 L1L2UciPucchFrmt01Pdu uciPucchFrmt01Pdu; /* UCI indication PDU carried on PUCCH format 0 or 1*/
723 L1L2UciPucchFrmt234Pdu uciPucchFrmt234Pdu; /* UCI indication PDU carried on PUCCH format 2 or 3 or 4 */
727 typedef struct rxDatIndPdu
729 PduInfo pduInfo; /* Commom PDU info */
730 U8 harqId; /* HARQ Process id */
731 U16 pduLen; /* Length of Pdu */
732 U32 *macPdu; /* Contents of MAC pdu */ //TBU:data type
735 typedef struct txDatReqPdu
737 U16 pduLen; /* PDU length */
738 U16 pduIdx; /* Correlates MAC PDU with DL_TTI PDSCH PDU */
739 U32 nTlv; /* number of TLVs in TB */
740 L1L2Tlv *tlvLst; /* list of TLVs */ //TBD:value of MAX_TLV
743 typedef struct paramReq
746 /* No message body is defined as per FAPI doc */
749 typedef struct paramRsp
751 MsgHdr hdr; /* Message Header */
752 ErrorCode status; /* Error code */
753 U8 nTlv; /* Number of TLVs in msg body */
754 L1L2Tlv rspTlvLst[MAX_PARAM_TLV]; /* List of TLVs reported by PHY */
757 typedef struct configReq
759 MsgHdr hdr; /* Message header */
760 U8 carrierId; /* Carrier Id */
761 U8 nTlv; /* Number of TLVs in msg body */
762 L1L2Tlv *configTlvLst; /* List of TLVs reported by PHY */
765 typedef struct configRsp
767 MsgHdr hdr; /* Message header */
768 U8 carrierId; /* Carrier Id */
769 ErrorCode status; /* Response status */
770 U8 numUnsuppTlv; /* Number of invalid or unsupported TLVs */
771 U8 numInvTlvForPhySta; /* Number of TLVs not valid in current PHY state */
772 U8 numMissingTlv; /* Number of missing TLVs */
773 L1L2Tlv *unsuppTlvLst; /* List of invalid or unsupported TLVs */
774 L1L2Tlv *phyIdleCfgTlvLst; /* List of invalid TLV that can be configured only in PHY IDLE state */
775 L1L2Tlv *phyRunCfgTlvLst; /* List of invalid TLV that can be configured only in PHY RUNNING state */
776 L1L2Tlv *missingTlvLst; /* List of missing TLVs */
779 typedef struct startReq
782 /* No message body is defined as per FAPI doc */
785 typedef struct stopReq
788 /* No message body is defined as per FAPI doc */
791 typedef struct stopInd
794 /* No message body is defined as per FAPI doc */
797 typedef struct errInd
799 MsgHdr hdr; /* Message header */
800 SfnSlotIE sfnSlot; /* SFN and slot info */
801 U8 msgId; /* Indicates which msg received by PHY has error */
802 ErrorCode err; /* Error code */
805 typedef struct slotInd
807 MsgHdr hdr; /* Message header */
808 SfnSlotIE sfnSlot; /* SFN and slot info */
811 typedef struct ttiReq
813 MsgHdr hdr; /* Message header */
814 SfnSlotIE sfnSlot; /* SFN and slot info */
815 U8 nPdus; /* Number of PDUs in msg */
816 U8 nUeGrps; /* Number of UE groups */
819 typedef struct dlTtiReq
821 L1L2TtiReq ttiReqInfo;
822 L1L2DlPduInfo pduLst[MAX_NUM_PDU]; /* List of all PDUs in msg */
823 L1L2DlUeGrpInfo ueGrpLst[MAX_UE_GRP_DL]; /* List of all UE groups in msg */
826 typedef struct ulTtiReq
828 L1L2TtiReq ttiReqInfo;
829 Bool rachPres; /* Indicates if RACH PDU will be included in msg */
830 U8 nUlschPdu; /* Number of ULSCH pdus in msg */
831 U8 nUlcchPdu; /* Number of ULCCH pdus in msg */
832 L1L2UlPduInfo pduLst[MAX_NUM_PDU]; /* List of all PDUs in msg */
833 L1L2UlUeGrpInfo ueGrpLst[MAX_UE_GRP_UL]; /* List of all UE groups in msg */
836 typedef struct ulDciReq
838 MsgHdr hdr; /* Message header */
839 SfnSlotIE sfnSlot; /* SFN and slot info */
840 U8 nPdus; /* Number of PDUs in msg */
841 L1L2DlPduInfo pduLst[MAX_NUM_PDU]; /* List of PDCCH PDUs in msg */
844 typedef struct crcInd
846 MsgHdr hdr; /* Message header */
847 SfnSlotIE sfnSlot; /* SFN and slot info */
848 U16 numCrc; /* Number of CRCs in msg */
849 L1L2CrcInfo crcInfo[MAX_UL_PDU_PER_SLOT]; //TBD : value of MAX_UL_PDU_PER_SLOT
852 typedef struct srsInd
854 MsgHdr hdr; /* Message header */
855 SfnSlotIE sfnSlot; /* SFN and slot info */
856 U8 nPdus; /* Number of PDUs in msg */
857 L1L2SrsIndPdu srsIndPdu[MAX_NUM_PDU]; /* SRS indication PDU list */
860 typedef struct rachInd
862 MsgHdr hdr; /* Message header */
863 SfnSlotIE sfnSlot; /* SFN and slot info */
864 U8 nPdus; /* Number of PDUs in msg */
865 L1L2RachIndPdu rachIndPdu[MAX_NUM_PDU]; /* RACH indication PDU list */
868 typedef struct uciInd
870 MsgHdr hdr; /* Message header */
871 SfnSlotIE sfnSlot; /* SFN and slot info */
872 U16 numUci; /* Number of UCIs in msg */
873 L1L2UciIndPdu uciIndPdu[MAX_UCI_PER_SLOT]; //TBD : value of MAX_UCI_PER_SLOT
876 typedef struct rxDatInd
878 MsgHdr hdr; /* Message header */
879 SfnSlotIE sfnSlot; /* SFN and slot info */
880 U8 nPdus; /* Number of PDUs in msg */
881 L1L2RxDatIndPdu rxDatPdu[MAX_UL_PDU_PER_SLOT]; //TBD: value of MAX_UL_PDU_PER_SLOT
884 typedef struct txDatReq
886 MsgHdr hdr; /* Message header */
887 SfnSlotIE sfnSlot; /* SFN and slot info */
888 U8 nPdus; /* Number of PDUs in msg */
889 L1L2TxDatReqPdu txDatPdu[MAX_DL_PDU_PER_SLOT]; //TBD: value of MAX_DL_PDU_PER_SLOT
894 /**********************************************************************
896 **********************************************************************/