1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 #define EVENT_SCH_GEN_CFG 1
21 #define EVENT_SCH_CELL_CFG 2
22 #define EVENT_SCH_CELL_CFG_CFM 3
23 #define EVENT_DL_SCH_INFO 4
24 #define EVENT_UL_SCH_INFO 5
25 #define EVENT_RACH_IND_TO_SCH 6
26 #define EVENT_CRC_IND_TO_SCH 7
27 #define EVENT_DL_RLC_BO_INFO_TO_SCH 8
28 #define EVENT_ADD_UE_CONFIG_REQ_TO_SCH 9
29 #define EVENT_UE_CONFIG_RSP_TO_MAC 10
30 #define EVENT_SLOT_IND_TO_SCH 11
31 #define EVENT_SHORT_BSR 12
32 #define EVENT_UCI_IND_TO_SCH 13
33 #define EVENT_MODIFY_UE_CONFIG_REQ_TO_SCH 14
34 #define EVENT_UE_RECONFIG_RSP_TO_MAC 15
35 #define EVENT_UE_DELETE_REQ_TO_SCH 16
36 #define EVENT_UE_DELETE_RSP_TO_MAC 17
37 #define EVENT_CELL_DELETE_REQ_TO_SCH 18
38 #define EVENT_CELL_DELETE_RSP_TO_MAC 19
39 #define EVENT_LONG_BSR 20
40 #define EVENT_SLICE_CFG_REQ_TO_SCH 21
41 #define EVENT_SLICE_CFG_RSP_TO_MAC 22
42 #define EVENT_SLICE_RECFG_REQ_TO_SCH 23
43 #define EVENT_SLICE_RECFG_RSP_TO_MAC 24
44 #define EVENT_RACH_RESOURCE_REQUEST_TO_SCH 25
45 #define EVENT_RACH_RESOURCE_RESPONSE_TO_MAC 26
46 #define EVENT_RACH_RESOURCE_RELEASE_TO_SCH 27
47 #define EVENT_PAGING_IND_TO_SCH 28
48 #define EVENT_DL_PAGING_ALLOC 29
49 #define EVENT_DL_REL_HQ_PROC 30
50 #define EVENT_DL_HARQ_IND_TO_SCH 31
52 #define MAX_SSB_IDX 1 /* forcing it as 1 for now. Right value is 64 */
53 #define SCH_SSB_MASK_SIZE 1
55 #define MAX_NUM_PRG 1 /* max value should be later 275 */
56 #define MAX_DIG_BF_INTERFACES 0 /* max value should be later 255 */
57 #define MAX_CODEWORDS 1 /* max should be 2 */
58 #define SCH_HARQ_PROC_ID 1 /* harq proc id */
59 #define SCH_ALLOC_TYPE_1 1 /*sch res alloc type */
61 /* Datatype in UL SCH Info */
62 #define SCH_DATATYPE_PUSCH 1
63 #define SCH_DATATYPE_PUSCH_UCI 2
64 #define SCH_DATATYPE_UCI 4
65 #define SCH_DATATYPE_SRS 8
66 #define SCH_DATATYPE_PRACH 16
68 #define MAX_NUMBER_OF_CRC_IND_BITS 1
69 #define MAX_NUMBER_OF_UCI_IND_BITS 1
70 #define MAX_SR_BITS_IN_BYTES 1
71 #define MAX_HARQ_BITS_IN_BYTES 1
72 #define MAX_NUM_LOGICAL_CHANNEL_GROUPS 8
73 #define MAX_NUM_SR_CFG_PER_CELL_GRP 8 /* Max number of scheduling request config per cell group */
74 #define MAX_NUM_TAGS 4 /* Max number of timing advance groups */
75 #define MAX_NUM_BWP 4 /* Max number of BWP per serving cell */
76 #define MAX_NUM_CRSET 3 /* Max number of control resource set in add/modify/release list */
77 #define MAX_NUM_SEARCH_SPC 10 /* Max number of search space in add/modify/release list */
78 #define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */
79 #define MONITORING_SYMB_WITHIN_SLOT_SIZE 2 /* i.e. 2 bytes because size of monitoring symbols within slot is 14 bits */
80 #define MAX_NUM_DL_ALLOC 16 /* Max number of pdsch time domain downlink allocation */
81 #define MAX_NUM_UL_ALLOC 16 /* Max number of pusch time domain uplink allocation */
83 /* PUCCH Configuration Macro */
84 #define MAX_NUM_PUCCH_RESRC 128
85 #define MAX_NUM_PUCCH_RESRC_SET 4
86 #define MAX_NUM_PUCCH_PER_RESRC_SET 32
87 #define MAX_NUM_SPATIAL_RELATIONS 8
88 #define MAX_NUM_PUCCH_P0_PER_SET 8
89 #define MAX_NUM_PATH_LOSS_REF_RS 4
90 #define MAX_NUM_DL_DATA_TO_UL_ACK 15
91 #define QPSK_MODULATION 2
93 #define RAR_PAYLOAD_SIZE 10 /* As per spec 38.321, sections 6.1.5 and 6.2.3, RAR PDU is 8 bytes long and 2 bytes of padding */
94 #define TX_PAYLOAD_HDR_LEN 32 /* Intel L1 requires adding a 32 byte header to transmitted payload */
95 #define UL_TX_BUFFER_SIZE 5
97 #define MAX_NUM_CONFIG_SLOTS 160 /*Max number of slots as per the numerology*/
98 #define MAX_NUM_K0_IDX 16 /* Max number of pdsch time domain downlink allocation */
99 #define MAX_NUM_K1_IDX 8 /* As per spec 38.213 section 9.2.3 Max number of PDSCH-to-HARQ resource indication */
100 #define MIN_NUM_K1_IDX 4 /* Min K1 values */
101 #define MAX_NUM_K2_IDX 16 /* PUSCH time domain UL resource allocation list */
102 #define DEFAULT_K0_VALUE 0 /* As per 38.331, PDSCH-TimeDomainResourceAllocation field descriptions */
103 /* As per 38.331, PUSCH-TimeDomainResourceAllocationList field descriptions */
104 #define DEFAULT_K2_VALUE_FOR_SCS15 1
105 #define DEFAULT_K2_VALUE_FOR_SCS30 1
106 #define DEFAULT_K2_VALUE_FOR_SCS60 2
107 #define DEFAULT_K2_VALUE_FOR_SCS120 3
110 #define DL_DMRS_SYMBOL_POS 4 /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
112 #define ADD_DELTA_TO_TIME(crntTime, toFill, incr, numOfSlot) \
114 if ((crntTime.slot + incr) > (numOfSlot - 1)) \
116 toFill.sfn = (crntTime.sfn + 1); \
120 toFill.sfn = crntTime.sfn; \
122 toFill.slot = (crntTime.slot + incr) % numOfSlot; \
123 if (toFill.sfn >= MAX_SFN) \
125 toFill.sfn%=MAX_SFN; \
133 RRC_CONNECTED_USERS_RSRC
141 RESOURCE_NOT_AVAILABLE
155 RESOURCE_UNAVAILABLE,
192 TIME_ALIGNMENT_TIMER_MS500,
193 TIME_ALIGNMENT_TIMER_MS750,
194 TIME_ALIGNMENT_TIMER_MS1280,
195 TIME_ALIGNMENT_TIMER_MS1920,
196 TIME_ALIGNMENT_TIMER_MS2560,
197 TIME_ALIGNMENT_TIMER_MS5120,
198 TIME_ALIGNMENT_TIMER_MS10240,
199 TIME_ALIGNMENT_TIMER_INFINITE
200 }SchTimeAlignmentTimer;
204 PHR_PERIODIC_TIMER_SF10,
205 PHR_PERIODIC_TIMER_SF20,
206 PHR_PERIODIC_TIMER_SF50,
207 PHR_PERIODIC_TIMER_SF100,
208 PHR_PERIODIC_TIMER_SF200,
209 PHR_PERIODIC_TIMER_SF500,
210 PHR_PERIODIC_TIMER_SF1000,
211 PHR_PERIODIC_TIMER_INFINITE
212 }SchPhrPeriodicTimer;
216 PHR_PROHIBIT_TIMER_SF0,
217 PHR_PROHIBIT_TIMER_SF10,
218 PHR_PROHIBIT_TIMER_SF20,
219 PHR_PROHIBIT_TIMER_SF50,
220 PHR_PROHIBIT_TIMER_SF100,
221 PHR_PROHIBIT_TIMER_SF200,
222 PHR_PROHIBIT_TIMER_SF500,
223 PHR_PROHIBIT_TIMER_SF1000
224 }SchPhrProhibitTimer;
228 PHR_TX_PWR_FACTOR_CHANGE_DB1,
229 PHR_TX_PWR_FACTOR_CHANGE_DB3,
230 PHR_TX_PWR_FACTOR_CHANGE_DB6,
231 PHR_TX_PWR_FACTOR_CHANGE_INFINITE
232 }SchPhrTxPwrFactorChange;
242 HARQ_ACK_CODEBOOK_SEMISTATIC,
243 HARQ_ACK_CODEBOOK_DYNAMIC
244 }SchPdschHarqAckCodebook;
248 NUM_HARQ_PROC_FOR_PDSCH_N2,
249 NUM_HARQ_PROC_FOR_PDSCH_N4,
250 NUM_HARQ_PROC_FOR_PDSCH_N6,
251 NUM_HARQ_PROC_FOR_PDSCH_N10,
252 NUM_HARQ_PROC_FOR_PDSCH_N16
253 }SchNumHarqProcForPdsch;
257 MAX_CODE_BLOCK_GROUP_PER_TB_N2,
258 MAX_CODE_BLOCK_GROUP_PER_TB_N4,
259 MAX_CODE_BLOCK_GROUP_PER_TB_N6,
260 MAX_CODE_BLOCK_GROUP_PER_TB_N8
261 }SchMaxCodeBlkGrpPerTB;
265 PDSCH_X_OVERHEAD_XOH_6,
266 PDSCH_X_OVERHEAD_XOH_12,
267 PDSCH_X_OVERHEAD_XOH_18
272 DMRS_ADDITIONAL_POS0,
273 DMRS_ADDITIONAL_POS1,
275 }SchDmrsAdditionPosition;
279 RESOURCE_ALLOCTION_TYPE_0,
280 RESOURCE_ALLOCTION_TYPE_1,
281 RESOURCE_ALLOCTION_DYN_SWITCH
282 }SchResourceAllocType;
286 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_A,
287 TIME_DOMAIN_RSRC_ALLOC_MAPPING_TYPE_B
288 }SchTimeDomRsrcAllocMappingType;
292 ENABLED_TRANSFORM_PRECODER,
293 DISABLED_TRANSFORM_PRECODER
294 }SchTransformPrecoder;
298 INTERLEAVED_CCE_REG_MAPPING = 1,
299 NONINTERLEAVED_CCE_REG_MAPPING
304 SLOT_PERIODICITY_AND_OFFSET_SL_1 = 1,
305 SLOT_PERIODICITY_AND_OFFSET_SL_2,
306 SLOT_PERIODICITY_AND_OFFSET_SL_4,
307 SLOT_PERIODICITY_AND_OFFSET_SL_5,
308 SLOT_PERIODICITY_AND_OFFSET_SL_8,
309 SLOT_PERIODICITY_AND_OFFSET_SL_10,
310 SLOT_PERIODICITY_AND_OFFSET_SL_16,
311 SLOT_PERIODICITY_AND_OFFSET_SL_20,
312 SLOT_PERIODICITY_AND_OFFSET_SL_40,
313 SLOT_PERIODICITY_AND_OFFSET_SL_80,
314 SLOT_PERIODICITY_AND_OFFSET_SL_160,
315 SLOT_PERIODICITY_AND_OFFSET_SL_320,
316 SLOT_PERIODICITY_AND_OFFSET_SL_640,
317 SLOT_PERIODICITY_AND_OFFSET_SL_1280,
318 SLOT_PERIODICITY_AND_OFFSET_SL_2560
319 }SchMSlotPeriodAndOffset;
329 SEARCH_SPACE_TYPE_COMMON = 1,
330 SEARCH_SPACE_TYPE_UE_SPECIFIC
335 SCH_QOS_NON_DYNAMIC = 1,
341 AGGREGATION_LEVEL_N0,
342 AGGREGATION_LEVEL_N1,
343 AGGREGATION_LEVEL_N2,
344 AGGREGATION_LEVEL_N3,
345 AGGREGATION_LEVEL_N4,
346 AGGREGATION_LEVEL_N5,
347 AGGREGATION_LEVEL_N6,
359 CODE_WORDS_SCHED_BY_DCI_N1,
360 CODE_WORDS_SCHED_BY_DCI_N2
361 }SchCodeWordsSchedByDci;
365 STATIC_BUNDLING_TYPE = 1,
366 DYNAMIC_BUNDLING_TYPE
372 SCH_SET1_SIZE_WIDEBAND,
373 SCH_SET1_SIZE_N2_WIDEBAND,
374 SCH_SET1_SIZE_N4_WIDEBAND
375 }SchBundlingSizeSet1;
380 SCH_SET2_SIZE_WIDEBAND
381 }SchBundlingSizeSet2;
423 SCH_MCS_TABLE_QAM_64,
424 SCH_MCS_TABLE_QAM_256,
425 SCH_MCS_TABLE_QAM_64_LOW_SE
438 DATA_TRANSMISSION_ALLOWED,
439 STOP_DATA_TRANSMISSION,
440 RESTART_DATA_TRANSMISSION
441 }SchDataTransmission;
444 typedef struct timeDomainAlloc
450 typedef struct resAllocType0
452 uint8_t rbBitmap[36];
455 typedef struct resAllocType1
461 typedef struct resAllocType1 FreqDomainRsrc;
463 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-32 BWP Information */
464 typedef struct bwpCfg
466 uint8_t subcarrierSpacing;
467 uint8_t cyclicPrefix;
468 FreqDomainRsrc freqAlloc;
474 uint16_t beamIdx[MAX_DIG_BF_INTERFACES];
477 typedef struct beamformingInfo
481 uint8_t digBfInterfaces;
482 Prg prg[MAX_NUM_PRG];
485 /* SIB1 PDSCH structures */
487 typedef struct codewordinfo
489 uint16_t targetCodeRate;
497 typedef struct dmrsInfo
499 uint16_t dlDmrsSymbPos;
500 uint8_t dmrsConfigType;
501 uint16_t dlDmrsScramblingId;
503 uint8_t numDmrsCdmGrpsNoData;
506 uint8_t nrOfDmrsSymbols;
510 typedef struct pdschFreqAlloc
512 uint8_t resourceAllocType;
513 /* since we are using type-1, rbBitmap excluded */
514 uint8_t rbBitmap[36];
517 uint8_t vrbPrbMapping;
520 typedef struct pdschTimeAlloc
527 typedef struct txPowerPdschInfo
529 uint8_t powerControlOffset;
530 uint8_t powerControlOffsetSS;
533 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-43 PDSCH Configuration */
534 typedef struct pdschCfg
539 uint8_t numCodewords;
540 CodewordInfo codeword[MAX_CODEWORDS];
541 uint16_t dataScramblingId;
543 uint8_t transmissionScheme;
546 PdschFreqAlloc pdschFreqAlloc;
547 PdschTimeAlloc pdschTimeAlloc;
548 BeamformingInfo beamPdschInfo;
549 TxPowerPdschInfo txPdschPower;
551 /* SIB1 PDSCH structures end */
553 /* SIB1 interface structure */
555 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-35 CORESET Configuration */
556 typedef struct coresetCfg
559 uint8_t startSymbolIndex;
560 uint8_t durationSymbols;
561 uint8_t freqDomainResource[6];
562 uint8_t cceRegMappingType;
563 uint8_t regBundleSize;
564 uint8_t interleaverSize;
567 uint8_t coresetPoolIndex;
568 uint8_t precoderGranularity;
570 uint8_t aggregationLevel;
573 typedef struct txPowerPdcchInfo
575 uint8_t beta_pdcch_1_0;
576 uint8_t powerControlOffsetSS;
579 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-42 DL-DCI Configuration */
583 uint16_t scramblingId;
584 uint16_t scramblingRnti;
587 BeamformingInfo beamPdcchInfo;
588 TxPowerPdcchInfo txPdcchPower;
592 typedef struct pdcchCfg
594 /* coreset-0 configuration */
595 CoresetCfg coresetCfg;
597 DlDCI dci; /* as of now its only one DCI, later it will be numDlCi */
599 /* end of SIB1 PDCCH structures */
601 typedef struct schPcchCfg
603 uint8_t numPO; /*Derived from Ns*/
604 bool poPresent; /*FirstPDCCH-MonitoringPO is present or not*/
605 uint16_t pagingOcc[MAX_PO_PER_PF]; /*FirstPDCCH-Monitoring Paging Occasion*/
608 typedef struct schPdcchConfigSib1
610 uint8_t coresetZeroIndex; /* derived from 4 LSB of pdcchSib1 present in MIB */
611 uint8_t searchSpaceZeroIndex; /* derived from 4 MSB of pdcchSib1 present in MIB */
614 typedef struct schRachCfgGeneric
616 uint8_t prachCfgIdx; /* PRACH config idx */
617 uint8_t msg1Fdm; /* PRACH FDM (1,2,4,8) */
618 uint16_t msg1FreqStart; /* Msg1-FrequencyStart */
619 uint8_t zeroCorrZoneCfg; /* Zero correlation zone cofig */
620 int16_t preambleRcvdTargetPower;
621 uint8_t preambleTransMax;
622 uint8_t pwrRampingStep;
623 uint8_t raRspWindow; /* RA Response Window */
626 typedef struct schRachCfg
628 SchRachCfgGeneric prachCfgGeneric;
629 uint8_t totalNumRaPreamble; /* Total number of RA preambles */
630 uint8_t ssbPerRach; /* SSB per RACH occassion */
631 uint8_t numCbPreamblePerSsb; /* Number of CB preamble per SSB */
632 uint8_t raContResTmr; /* RA Contention Resoultion Timer */
633 uint8_t rsrpThreshSsb; /* RSRP Threshold SSB */
634 uint16_t rootSeqIdx; /* Root sequence index */
635 uint16_t rootSeqLen; /* root sequence length */
636 uint8_t numRootSeq; /* Number of root sequences required for FD */
637 uint8_t msg1SubcSpacing; /* Subcarrier spacing of RACH */
640 typedef struct schBwpParams
642 FreqDomainRsrc freqAlloc;
644 uint8_t cyclicPrefix;
647 typedef struct schCandidatesInfo
656 typedef struct schSearchSpaceCfg
658 uint8_t searchSpaceId;
660 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
661 uint16_t monitoringSlot;
663 uint16_t monitoringSymbol;
664 SchCandidatesInfo candidate;
667 typedef struct schPdcchCfgCmn
669 SchSearchSpaceCfg commonSearchSpace;
670 uint8_t raSearchSpaceId;
673 typedef struct schPdschCfgCmnTimeDomRsrcAlloc
678 uint8_t lengthSymbol;
679 }SchPdschCfgCmnTimeDomRsrcAlloc;
681 typedef struct schPdschCfgCmn
683 uint8_t numTimeDomAlloc;
684 SchPdschCfgCmnTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
687 typedef struct schPucchCfgCmn
689 uint8_t pucchResourceCommon;
690 uint8_t pucchGroupHopping;
693 /* PUSCH Time Domain Resource Allocation */
694 typedef struct schPuschTimeDomRsrcAlloc
697 SchTimeDomRsrcAllocMappingType mappingType;
699 uint8_t symbolLength;
700 }SchPuschTimeDomRsrcAlloc;
702 typedef struct schPuschCfgCmn
704 uint8_t numTimeDomRsrcAlloc;
705 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
708 typedef struct schK1TimingInfo
711 uint8_t k1Indexes[MAX_NUM_K1_IDX];
714 typedef struct schK0TimingInfo
717 SchK1TimingInfo k1TimingInfo;
720 typedef struct schK0K1TimingInfo
723 SchK0TimingInfo k0Indexes[MAX_NUM_K0_IDX];
726 typedef struct schK0K1TimingInfoTbl
729 SchK0K1TimingInfo k0k1TimingInfo[MAX_NUM_CONFIG_SLOTS];
730 }SchK0K1TimingInfoTbl;
732 typedef struct schBwpDlCfg
735 SchPdcchCfgCmn pdcchCommon;
736 SchPdschCfgCmn pdschCommon;
739 typedef struct schK2TimingInfo
742 uint8_t k2Indexes[MAX_NUM_K2_IDX];
745 typedef struct schK2TimingInfoTbl
748 SchK2TimingInfo k2TimingInfo[MAX_NUM_CONFIG_SLOTS];
751 typedef struct schBwpUlCfg
754 SchRachCfg schRachCfg; /* PRACH config */
755 SchPucchCfgCmn pucchCommon;
756 SchPuschCfgCmn puschCommon;
759 typedef struct schPlmnInfoList
762 uint8_t numSliceSupport; /* Total slice supporting */
763 Snssai **snssai; /* List of supporting snssai*/
767 /* The following list of structures is taken from the DRX-Config section of specification 33.331. */
769 typedef struct schDrxOnDurationTimer
771 bool onDurationTimerValInMs;
774 uint8_t subMilliSeconds;
775 uint16_t milliSeconds;
776 }onDurationtimerValue;
777 }SchDrxOnDurationTimer;
779 typedef struct schDrxLongCycleStartOffset
781 uint16_t drxLongCycleStartOffsetChoice;
782 uint16_t drxLongCycleStartOffsetVal;
783 }SchDrxLongCycleStartOffset;
785 typedef struct schShortDrx
787 uint16_t drxShortCycle;
788 uint8_t drxShortCycleTimer;
791 typedef struct schDrxCfg
793 SchDrxOnDurationTimer drxOnDurationTimer;
794 uint16_t drxInactivityTimer;
795 uint8_t drxHarqRttTimerDl;
796 uint8_t drxHarqRttTimerUl;
797 uint16_t drxRetransmissionTimerDl;
798 uint16_t drxRetransmissionTimerUl;
799 SchDrxLongCycleStartOffset drxLongCycleStartOffset;
801 SchShortDrx shortDrx;
802 uint8_t drxSlotOffset;
806 /*Spec 38.331 'NrNsPmaxList'*/
807 typedef struct schNrNsPmaxList
810 long additionalSpectrumEmission;
813 /*Spec 38.331 'FrequencyInfoDL-SIB'*/
814 typedef struct schMultiFreqBandListSib
817 SchNrNsPmaxList nrNsPmaxList[1];
818 }SchMultiFreqBandListSib;
820 /*Spec 38.331 'SCS-SpecificCarrier'*/
821 typedef struct schScsSpecificCarrier
823 uint16_t offsetToCarrier;
824 uint8_t subCarrierSpacing;
826 uint16_t txDirectCurrentLoc;
827 }SchScsSpecificCarrier;
829 /*Spec 38.331 'FrequencyInfoDL-SIB'*/
830 typedef struct schFreqInfoDlSib
832 SchMultiFreqBandListSib mutiFreqBandList[1];
833 uint16_t offsetToPointA;
834 SchScsSpecificCarrier schSpcCarrier[1];
837 typedef struct schBcchCfg
842 /*Spec 38.331 'DownlinkConfigCommonSIB'*/
843 typedef struct schDlCfgCommon
845 SchFreqInfoDlSib schFreqInfoDlSib;
846 SchBwpDlCfg schInitialDlBwp; /* Initial DL BWP */
847 SchBcchCfg schBcchCfg;
848 SchPcchCfg schPcchCfg;
851 /*Spec 38.331 'FrequencyInfoUL-SIB'*/
852 typedef struct schFreqInfoUlSib
854 SchMultiFreqBandListSib mutiFreqBandList[1];
855 uint16_t absoluteFreqPointA;
856 SchScsSpecificCarrier schSpcCarrier[1];
858 bool frequencyShift7p5khz;
861 /*Spec 38.331 'UplinkConfigCommonSIB '*/
862 typedef struct schUlCfgCommon
864 SchFreqInfoUlSib schFreqInfoUlSib;
865 SchBwpUlCfg schInitialUlBwp; /* Initial DL BWP */
866 uint16_t schTimeAlignTimer;
869 /*Ref: ORAN_WG8.V7.0.0 Sec 11.2.3.2.1*/
870 typedef struct schCellCfg
872 uint16_t cellId; /* Cell Id */
876 uint16_t phyCellId; /* Physical cell id */
877 SchPlmnInfoList plmnInfoList[MAX_PLMN]; /* Consits of PlmnId and Snssai list */
878 SchDuplexMode dupMode; /* Duplex type: TDD/FDD */
879 uint8_t numerology; /* Supported numerology */
880 uint8_t dlBandwidth; /* Supported B/W */
881 uint8_t ulBandwidth; /* Supported B/W */
882 SchDlCfgCommon dlCfgCommon; /*Spec 38.331 DownlinkConfigCommonSIB*/
883 SchUlCfgCommon ulCfgCommon; /*Spec 38.331 UplinkConfigCommonSIB*/
885 TDDCfg tddCfg; /* Spec 38.331 tdd-UL-DL-ConfigurationCommon */
888 /*Ref:Spec 38.331 "ssb-PositionsInBurst", Value 0 in Bitmap => corresponding SS/PBCH block is not transmitted
889 *value 1 => corresponding SS/PBCH block is transmitted*/
890 uint32_t ssbPosInBurst[SCH_SSB_MASK_SIZE]; /* Bitmap for actually transmitted SSB. */
891 SchSSBPeriod ssbPeriod; /* SSB Periodicity in msec */
892 uint32_t ssbFrequency; /* SB frequency in kHz*/
893 uint8_t dmrsTypeAPos;
894 uint8_t scsCommon; /* subcarrier spacing for common [0-3]*/
895 SchPdcchConfigSib1 pdcchCfgSib1; /* Req to configure CORESET#0 and SearchSpace#0*/
896 uint32_t ssbPbchPwr; /* SSB block power */
897 uint8_t ssbSubcOffset; /* Subcarrier Offset(Kssb) */
901 typedef struct schCellCfgCfm
903 uint16_t cellId; /* Cell Id */
905 SchFailureCause cause;
908 typedef struct ssbInfo
910 uint8_t ssbIdx; /* SSB Index */
911 TimeDomainAlloc tdAlloc; /* Time domain allocation */
912 FreqDomainRsrc fdAlloc; /* Freq domain allocation */
915 typedef struct sib1AllocInfo
918 PdcchCfg *sib1PdcchCfg;
921 typedef struct prachSchInfo
923 uint8_t numPrachOcas; /* Num Prach Ocassions */
924 uint8_t prachFormat; /* PRACH Format */
925 uint8_t numRa; /* Freq domain ocassion */
926 uint8_t prachStartSymb; /* Freq domain ocassion */
929 /* Interface structure signifying DL broadcast allocation for SSB, SIB1 */
930 typedef struct dlBrdcstAlloc
932 uint16_t crnti; /* SI-RNTI */
933 /* Ssb transmission is determined as follows:
934 * 0 : No tranamission
935 * 1 : SSB Transmission
936 * 2 : SSB Repetition */
937 uint8_t ssbTransmissionMode;
938 uint8_t ssbIdxSupported;
939 SsbInfo ssbInfo[MAX_SSB_IDX];
940 bool systemInfoIndicator;
942 /* Sib1 transmission is determined as follows:
943 * 0 : No tranamission
944 * 1 : SIB1 Transmission
945 * 2 : SIB1 Repetition */
946 uint8_t sib1TransmissionMode;
947 Sib1AllocInfo sib1Alloc;
950 typedef struct msg3UlGrant
954 FreqDomainRsrc msg3FreqAlloc;
961 typedef struct rarInfo
967 uint8_t rarPdu[RAR_PAYLOAD_SIZE];
971 typedef struct rarAlloc
976 PdcchCfg *rarPdcchCfg;
977 PdschCfg *rarPdschCfg;
980 typedef struct lcSchInfo
986 typedef struct ceSchInfo
992 typedef struct freqDomainAlloc
994 uint8_t resAllocType; /* Resource allocation type */
1002 typedef struct transportBlock
1009 CeSchInfo ceSchInfo[MAX_NUM_LC];
1011 LcSchInfo lcSchInfo[MAX_NUM_LC];
1014 typedef struct dlMsgSchedInfo
1017 uint8_t dciFormatId;
1018 uint8_t harqProcNum;
1020 uint8_t dlAssignIdx;
1022 uint8_t pucchResInd;
1023 uint8_t harqFeedbackInd;
1024 uint16_t dlMsgPduLen;
1026 FreqDomainAlloc freqAlloc;
1027 TimeDomainAlloc timeAlloc;
1029 TransportBlock transportBlock[2];
1031 PdcchCfg *dlMsgPdcchCfg;
1032 PdschCfg *dlMsgPdschCfg;
1035 typedef struct schSlotValue
1037 SlotTimingInfo currentTime;
1038 SlotTimingInfo broadcastTime;
1039 SlotTimingInfo rarTime;
1040 SlotTimingInfo dlMsgTime;
1041 SlotTimingInfo ulDciTime;
1045 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-36 DCI Format0_0 Configuration */
1046 typedef struct format0_0
1048 uint8_t resourceAllocType;
1049 FreqDomainAlloc freqAlloc;
1050 TimeDomainAlloc timeAlloc;
1061 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Table 9-40 DCI Format 0_1 Configuration */
1062 typedef struct format0_1
1064 uint8_t carrierIndicator;
1066 uint8_t bwpIndicator;
1067 uint8_t resourceAlloc;
1068 FreqDomainRsrc freqAlloc;
1069 TimeDomainAlloc timeAlloc;
1076 uint8_t firstDownlinkAssignmentIndex;
1077 uint8_t secondDownlinkAssignmentIndex;
1079 uint8_t srsResourceSetIndicator;
1080 uint8_t srsResourceIndicator;
1082 uint8_t antennaPorts;
1085 uint8_t cbgTransmissionInfo;
1087 uint8_t betaOffsetIndicator;
1088 bool dmrsSequenceInitialization;
1089 bool ulschIndicatior;
1092 typedef struct dciFormat
1094 FormatType formatType; /* DCI Format */
1097 Format0_0 format0_0; /* Format 0_0 */
1098 Format0_1 format0_1; /* Format 0_1 */
1102 typedef struct dciInfo
1104 uint16_t crnti; /* CRNTI */
1105 BwpCfg bwpCfg; /* BWP Cfg */
1106 CoresetCfg coresetCfg; /* Coreset1 Cfg */
1107 DciFormat dciFormatInfo; /* Dci Format */
1108 DlDCI dciInfo; /* DlDCI */
1112 /* Reference -> O-RAN.WG8.AAD.0-v07.00, Section 11.2.4.3.8 DL Scheduling Information */
1113 typedef struct dlSchedInfo
1115 uint16_t cellId; /* Cell Id */
1116 SchSlotValue schSlotValue;
1118 /* Allocation for broadcast messages */
1119 bool isBroadcastPres;
1120 DlBrdcstAlloc brdcstAlloc;
1122 /* Allocation for RAR message */
1123 RarAlloc *rarAlloc[MAX_NUM_UE];
1125 /* UL grant in response to BSR */
1128 /* Allocation from dedicated DL msg */
1129 DlMsgSchInfo *dlMsgAlloc[MAX_NUM_UE];
1133 /*Reference: O-RAN.WG8.AAD.v7.0.0, Sec 11.2.3.3.13 Downlink Paging Allocation*/
1134 typedef struct interleaved_t
1136 uint8_t regBundleSize;
1137 uint8_t interleaverSize;
1138 uint16_t shiftIndex;
1141 typedef struct pageDlDci
1143 uint8_t freqDomainResource[6];
1144 uint8_t durationSymbols;
1145 uint8_t cceRegMappingType;
1148 Interleaved interleaved;
1149 uint8_t nonInterleaved;
1151 uint8_t ssStartSymbolIndex;
1153 uint8_t aggregLevel;
1154 uint8_t precoderGranularity;
1155 uint8_t coreSetSize;
1158 typedef struct resAllocType1 PageFreqDomainAlloc;
1160 typedef struct pageTimeDomainAlloc
1162 uint8_t mappingType;
1165 }PageTimeDomainAlloc;
1167 typedef struct pageDmrsConfig
1171 uint8_t nrOfDmrsSymbols;
1174 typedef struct pageTbInfo
1180 typedef struct pageDlSch
1182 PageFreqDomainAlloc freqAlloc;
1183 PageTimeDomainAlloc timeAlloc;
1184 PageDmrsConfig dmrs;
1185 uint8_t vrbPrbMapping;
1188 uint16_t dlPagePduLen;
1192 typedef struct dlPageAlloc
1195 SlotTimingInfo dlPageTime;
1200 PageDlDci pageDlDci;
1201 PageDlSch pageDlSch;
1204 typedef struct tbInfo
1206 uint8_t mcs; /* MCS */
1207 uint8_t ndi; /* NDI */
1208 uint8_t rv; /* Redundancy Version */
1209 uint16_t tbSize; /* TB Size */
1210 uint8_t qamOrder; /* Modulation Order */
1211 SchMcsTable mcsTable; /* MCS Table */
1214 typedef struct schPuschInfo
1216 uint8_t harqProcId; /* HARQ Process ID */
1217 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1218 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1219 TbInfo tbInfo; /* TB info */
1221 uint8_t dmrsMappingType;
1222 uint8_t nrOfDmrsSymbols;
1227 typedef struct harqInfo
1229 uint16_t harqAckBitLength;
1230 uint8_t betaOffsetHarqAck;
1233 typedef struct csiInfo
1236 uint8_t betaOffsetCsi;
1239 typedef struct harqFdbkInfo
1241 uint16_t harqBitLength;
1244 typedef struct csiFdbkInfo
1249 typedef struct schPucchFormatCfg
1251 uint8_t interSlotFreqHop;
1253 uint8_t maxCodeRate;
1259 typedef struct schPucchInfo
1261 FreqDomainRsrc fdAlloc;
1262 TimeDomainAlloc tdAlloc;
1264 HarqFdbkInfo harqInfo;
1265 CsiFdbkInfo csiInfo;
1266 BeamformingInfo beamPucchInfo;
1267 uint8_t pucchFormat;
1268 uint8_t intraFreqHop;
1269 uint16_t secondPrbHop;
1270 uint8_t initialCyclicShift;
1278 typedef struct schPuschUci
1280 uint8_t harqProcId; /* HARQ Process ID */
1281 FreqDomainAlloc fdAlloc; /* Freq domain allocation */
1282 TimeDomainAlloc tdAlloc; /* Time domain allocation */
1283 TbInfo tbInfo; /* TB information */
1284 HarqInfo harqInfo; /* Harq Information */
1285 CsiInfo csiInfo; /* Csi information*/
1288 typedef struct ulSchedInfo
1290 uint16_t cellId; /* Cell Id */
1291 uint16_t crnti; /* CRNI */
1292 SlotTimingInfo slotIndInfo; /* Slot Info: sfn, slot number */
1293 uint8_t dataType; /* Type of info being scheduled */
1294 SchPrachInfo prachSchInfo; /* Prach scheduling info */
1295 SchPuschInfo schPuschInfo; /* Pusch scheduling info */
1296 SchPuschUci schPuschUci; /* Pusch Uci */
1297 SchPucchInfo schPucchInfo; /* Pucch and Uci scheduling info */
1300 typedef struct rachIndInfo
1304 SlotTimingInfo timingInfo;
1308 uint8_t preambleIdx;
1313 typedef struct crcIndInfo
1317 SlotTimingInfo timingInfo;
1319 uint8_t crcInd[MAX_NUMBER_OF_CRC_IND_BITS];
1322 typedef struct boInfo
1325 uint32_t dataVolume;
1328 typedef struct dlRlcBOInfo
1333 uint32_t dataVolume;
1336 /* Info of Scheduling Request to Add/Modify */
1337 typedef struct schSchedReqInfo
1340 SchSrProhibitTimer srProhibitTmr;
1341 SchSrTransMax srTransMax;
1344 /* Scheduling Request Configuration */
1345 typedef struct schSchedReqCfg
1347 uint8_t addModListCount;
1348 SchSchedReqInfo addModList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* List of Scheduling req to be added/modified */
1349 uint8_t relListCount;
1350 uint8_t relList[MAX_NUM_SR_CFG_PER_CELL_GRP]; /* list of scheduling request Id to be deleted */
1353 /* Info of Tag to Add/Modify */
1354 typedef struct schTagInfo
1357 SchTimeAlignmentTimer timeAlignmentTmr;
1360 /* Timing Advance Group Configuration */
1361 typedef struct schTagCfg
1363 uint8_t addModListCount;
1364 SchTagInfo addModList[MAX_NUM_TAGS]; /* List of Tag to Add/Modify */
1365 uint8_t relListCount;
1366 uint8_t relList[MAX_NUM_TAGS]; /* list of Tag Id to release */
1369 /* Configuration for Power headroom reporting */
1370 typedef struct schPhrCfg
1372 SchPhrPeriodicTimer periodicTmr;
1373 SchPhrProhibitTimer prohibitTmr;
1374 SchPhrTxPwrFactorChange txpowerFactorChange;
1377 bool type2OtherCell;
1378 SchPhrModeOtherCG modeOtherCG;
1381 /* MAC cell Group configuration */
1382 typedef struct schMacCellGrpCfg
1384 SchSchedReqCfg schedReqCfg;
1386 SchPhrCfg phrCfg; /* To be used only if phrCfgSetupPres is true */
1389 SchDrxCfg drxCfg; /* Drx configuration */
1393 /* Physical Cell Group Configuration */
1394 typedef struct schPhyCellGrpCfg
1396 SchPdschHarqAckCodebook pdschHarqAckCodebook;
1400 /* Control resource set info */
1401 typedef struct schControlRsrcSet
1403 uint8_t cRSetId; /* Control resource set id */
1404 uint8_t freqDomainRsrc[FREQ_DOM_RSRC_SIZE]; /* Frequency domain resource */
1406 SchREGMappingType cceRegMappingType;
1407 SchPrecoderGranul precoderGranularity;
1408 uint16_t dmrsScramblingId;
1411 /* Search Space info */
1412 typedef struct schSearchSpace
1414 uint8_t searchSpaceId;
1416 SchMSlotPeriodAndOffset mSlotPeriodicityAndOffset;
1417 uint8_t mSymbolsWithinSlot[MONITORING_SYMB_WITHIN_SLOT_SIZE];
1418 SchAggrLevel numCandidatesAggLevel1; /* Number of candidates for aggregation level 1 */
1419 SchAggrLevel numCandidatesAggLevel2; /* Number of candidates for aggregation level 2 */
1420 SchAggrLevel numCandidatesAggLevel4; /* Number of candidates for aggregation level 4 */
1421 SchAggrLevel numCandidatesAggLevel8; /* Number of candidates for aggregation level 8 */
1422 SchAggrLevel numCandidatesAggLevel16; /* Number of candidates for aggregation level 16 */
1423 SchSearchSpaceType searchSpaceType;
1424 uint8_t ueSpecificDciFormat;
1427 /* PDCCH cofniguration */
1428 typedef struct schPdcchConfig
1430 uint8_t numCRsetToAddMod;
1431 SchControlRsrcSet cRSetToAddModList[MAX_NUM_CRSET]; /* List of control resource set to add/modify */
1432 uint8_t numCRsetToRel;
1433 uint8_t cRSetToRelList[MAX_NUM_CRSET]; /* List of control resource set to release */
1434 uint8_t numSearchSpcToAddMod;
1435 SchSearchSpace searchSpcToAddModList[MAX_NUM_SEARCH_SPC]; /* List of search space to add/modify */
1436 uint8_t numSearchSpcToRel;
1437 uint8_t searchSpcToRelList[MAX_NUM_SEARCH_SPC]; /* List of search space to release */
1440 /* PDSCH time domain resource allocation */
1441 typedef struct schPdschTimeDomRsrcAlloc
1444 SchTimeDomRsrcAllocMappingType mappingType;
1445 uint8_t startSymbol;
1446 uint8_t symbolLength;
1447 }SchPdschTimeDomRsrcAlloc;
1450 typedef struct schPdschBundling
1452 struct schStaticBundling
1454 SchBundlingSizeSet2 size;
1456 struct schDynamicBundling
1458 SchBundlingSizeSet1 sizeSet1;
1459 SchBundlingSizeSet2 sizeSet2;
1460 }SchDynamicBundling;
1463 /* DMRS downlink configuration */
1464 typedef struct schDmrsDlCfg
1466 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1469 /* PDSCH Configuration */
1470 typedef struct schPdschConfig
1472 SchDmrsDlCfg dmrsDlCfgForPdschMapTypeA;
1473 SchResourceAllocType resourceAllocType;
1474 uint8_t numTimeDomRsrcAlloc;
1475 SchPdschTimeDomRsrcAlloc timeDomRsrcAllociList[MAX_NUM_DL_ALLOC]; /* PDSCH time domain DL resource allocation list */
1477 SchCodeWordsSchedByDci numCodeWordsSchByDci; /* Number of code words scheduled by DCI */
1478 SchBundlingType bundlingType;
1479 SchPdschBundling bundlingInfo;
1482 /* Initial Downlink BWP */
1483 typedef struct schInitalDlBwp
1486 SchPdcchConfig pdcchCfg;
1488 SchPdschConfig pdschCfg;
1490 SchK0K1TimingInfoTbl k0K1InfoTbl;
1493 /* BWP Downlink common */
1494 typedef struct schBwpDlCommon
1498 /* Downlink BWP information */
1499 typedef struct schDlBwpInfo
1504 /* PDCCH Serving Cell configuration */
1505 typedef struct schPdschServCellCfg
1507 uint8_t *maxMimoLayers;
1508 SchNumHarqProcForPdsch numHarqProcForPdsch;
1509 SchMaxCodeBlkGrpPerTB *maxCodeBlkGrpPerTb;
1510 bool *codeBlkGrpFlushInd;
1511 SchPdschXOverhead *xOverhead;
1512 }SchPdschServCellCfg;
1514 /* PUCCH Configuration */
1515 typedef struct schPucchResrcSetInfo
1518 uint8_t resrcListCount;
1519 uint8_t resrcList[MAX_NUM_PUCCH_PER_RESRC_SET];
1520 uint8_t maxPayLoadSize;
1521 }SchPucchResrcSetInfo;
1523 typedef struct schPucchResrcSetCfg
1525 uint8_t resrcSetToAddModListCount;
1526 SchPucchResrcSetInfo resrcSetToAddModList[MAX_NUM_PUCCH_RESRC_SET];
1527 uint8_t resrcSetToRelListCount;
1528 uint8_t resrcSetToRelList[MAX_NUM_PUCCH_RESRC];
1529 }SchPucchResrcSetCfg;
1531 typedef struct schPucchFormat0
1533 uint8_t initialCyclicShift;
1535 uint8_t startSymbolIdx;
1538 typedef struct schPucchFormat1
1540 uint8_t initialCyclicShift;
1542 uint8_t startSymbolIdx;
1546 typedef struct schPucchFormat2_3
1550 uint8_t startSymbolIdx;
1553 typedef struct schPucchFormat4
1558 uint8_t startSymbolIdx;
1561 typedef struct schPucchResrcInfo
1565 uint8_t intraFreqHop;
1566 uint16_t secondPrbHop;
1567 uint8_t pucchFormat;
1569 SchPucchFormat0 *format0;
1570 SchPucchFormat1 *format1;
1571 SchPucchFormat2_3 *format2;
1572 SchPucchFormat2_3 *format3;
1573 SchPucchFormat4 *format4;
1577 typedef struct schPucchResrcCfg
1579 uint8_t resrcToAddModListCount;
1580 SchPucchResrcInfo resrcToAddModList[MAX_NUM_PUCCH_RESRC];
1581 uint8_t resrcToRelListCount;
1582 uint8_t resrcToRelList[MAX_NUM_PUCCH_RESRC];
1586 typedef struct schSchedReqResrcInfo
1590 uint8_t periodicity;
1593 }SchSchedReqResrcInfo;
1595 typedef struct schPucchSchedReqCfg
1597 uint8_t schedAddModListCount;
1598 SchSchedReqResrcInfo schedAddModList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1599 uint8_t schedRelListCount;
1600 uint8_t schedRelList[MAX_NUM_SR_CFG_PER_CELL_GRP];
1601 }SchPucchSchedReqCfg;
1603 typedef struct schSpatialRelationInfo
1605 uint8_t spatialRelationId;
1606 uint8_t servCellIdx;
1607 uint8_t pathLossRefRSId;
1609 uint8_t closeLoopIdx;
1610 }SchSpatialRelationInfo;
1612 typedef struct schPucchSpatialCfg
1614 uint8_t spatialAddModListCount;
1615 SchSpatialRelationInfo spatialAddModList[MAX_NUM_SPATIAL_RELATIONS];
1616 uint8_t spatialRelListCount;
1617 uint8_t spatialRelList[MAX_NUM_SPATIAL_RELATIONS];
1618 }SchPucchSpatialCfg;
1620 typedef struct schP0PucchCfg
1626 typedef struct schPathLossRefRSCfg
1628 uint8_t pathLossRefRSId;
1629 }SchPathLossRefRSCfg;
1631 typedef struct schPucchMultiCsiCfg
1633 uint8_t multiCsiResrcListCount;
1634 uint8_t multiCsiResrcList[MAX_NUM_PUCCH_RESRC-1];
1635 }SchPucchMultiCsiCfg;
1637 typedef struct schPucchDlDataToUlAck
1639 uint8_t dlDataToUlAckListCount;
1640 uint8_t dlDataToUlAckList[MAX_NUM_DL_DATA_TO_UL_ACK];
1641 }SchPucchDlDataToUlAck;
1643 typedef struct schPucchPowerControl
1651 SchP0PucchCfg p0Set[MAX_NUM_PUCCH_P0_PER_SET];
1652 uint8_t pathLossRefRSListCount;
1653 SchPathLossRefRSCfg pathLossRefRSList[MAX_NUM_PATH_LOSS_REF_RS];
1654 }SchPucchPowerControl;
1656 typedef struct schPucchCfg
1658 SchPucchResrcSetCfg *resrcSet;
1659 SchPucchResrcCfg *resrc;
1660 SchPucchFormatCfg *format1;
1661 SchPucchFormatCfg *format2;
1662 SchPucchFormatCfg *format3;
1663 SchPucchFormatCfg *format4;
1664 SchPucchSchedReqCfg *schedReq;
1665 SchPucchMultiCsiCfg *multiCsiCfg;
1666 SchPucchSpatialCfg *spatialInfo;
1667 SchPucchDlDataToUlAck *dlDataToUlAck;
1668 SchPucchPowerControl *powerControl;
1671 /* Transform precoding disabled */
1672 typedef struct schTransPrecodDisabled
1674 uint16_t scramblingId0;
1675 }SchTransPrecodDisabled;
1677 /* DMRS Uplink configuration */
1678 typedef struct SchDmrsUlCfg
1680 SchDmrsAdditionPosition addPos; /* DMRS additional position */
1681 SchTransPrecodDisabled transPrecodDisabled; /* Transform precoding disabled */
1684 /* PUSCH Configuration */
1685 typedef struct schPuschCfg
1687 uint8_t dataScramblingId;
1688 SchDmrsUlCfg dmrsUlCfgForPuschMapTypeA;
1689 SchResourceAllocType resourceAllocType;
1690 uint8_t numTimeDomRsrcAlloc;
1691 SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[MAX_NUM_UL_ALLOC]; /* PUSCH time domain UL resource allocation list */
1692 SchTransformPrecoder transformPrecoder;
1695 /* Initial Uplink BWP */
1696 typedef struct schInitialUlBwp
1699 SchPucchCfg pucchCfg;
1701 SchPuschCfg puschCfg;
1703 SchK2TimingInfoTbl k2InfoTbl;
1706 /* Uplink BWP information */
1707 typedef struct schUlBwpInfo
1712 /* Serving cell configuration */
1713 typedef struct schServCellRecfgInfo
1715 SchInitalDlBwp initDlBwp;
1716 uint8_t numDlBwpToAddOrMod;
1717 SchDlBwpInfo dlBwpToAddOrModList[MAX_NUM_BWP];
1718 uint8_t numDlBwpToRel;
1719 SchDlBwpInfo dlBwpToRelList[MAX_NUM_BWP];
1720 uint8_t firstActvDlBwpId;
1721 uint8_t defaultDlBwpId;
1722 uint8_t *bwpInactivityTmr;
1723 SchPdschServCellCfg pdschServCellCfg;
1724 SchInitialUlBwp initUlBwp;
1725 uint8_t numUlBwpToAddOrMod;
1726 SchUlBwpInfo ulBwpToAddOrModList[MAX_NUM_BWP];
1727 uint8_t numUlBwpToRel;
1728 SchUlBwpInfo ulBwpToRelList[MAX_NUM_BWP];
1729 uint8_t firstActvUlBwpId;
1730 }SchServCellRecfgInfo;
1732 /* Serving cell configuration */
1733 typedef struct schServCellCfgInfo
1735 SchInitalDlBwp initDlBwp;
1736 uint8_t numDlBwpToAdd;
1737 SchDlBwpInfo dlBwpToAddList[MAX_NUM_BWP];
1738 uint8_t firstActvDlBwpId;
1739 uint8_t defaultDlBwpId;
1740 uint8_t *bwpInactivityTmr;
1741 SchPdschServCellCfg pdschServCellCfg;
1742 SchInitialUlBwp initUlBwp;
1743 uint8_t numUlBwpToAdd;
1744 SchUlBwpInfo ulBwpToAddList[MAX_NUM_BWP];
1745 uint8_t firstActvUlBwpId;
1746 }SchServCellCfgInfo;
1748 typedef struct schNonDynFiveQi
1753 uint16_t maxDataBurstVol;
1756 typedef struct schDynFiveQi
1759 uint16_t packetDelayBudget;
1760 uint8_t packetErrRateScalar;
1761 uint8_t packetErrRateExp;
1763 uint8_t delayCritical;
1765 uint16_t maxDataBurstVol;
1768 typedef struct schNgRanAllocAndRetPri
1770 uint8_t priorityLevel;
1771 uint8_t preEmptionCap;
1772 uint8_t preEmptionVul;
1773 }SchNgRanAllocAndRetPri;
1775 typedef struct schGrbQosFlowInfo
1777 uint32_t maxFlowBitRateDl;
1778 uint32_t maxFlowBitRateUl;
1779 uint32_t guarFlowBitRateDl;
1780 uint32_t guarFlowBitRateUl;
1784 typedef struct schDrbQos
1786 SchQosType fiveQiType; /* Dynamic or non-dynamic */
1789 SchNonDynFiveQi nonDyn5Qi;
1790 SchDynFiveQi dyn5Qi;
1792 SchNgRanAllocAndRetPri ngRanRetPri;
1793 SchGrbQosFlowInfo grbQosFlowInfo;
1794 uint16_t pduSessionId;
1795 uint32_t ulPduSessAggMaxBitRate; /* UL PDU Session Aggregate max bit rate */
1798 /* Special cell configuration */
1799 typedef struct schSpCellCfg
1801 uint8_t servCellIdx;
1802 SchServCellCfgInfo servCellCfg;
1805 /* Special cell Reconfiguration */
1806 typedef struct schSpCellRecfg
1808 uint8_t servCellIdx;
1809 SchServCellRecfgInfo servCellRecfg;
1812 /* Uplink logical channel configuration */
1813 typedef struct SchUlLcCfg
1818 uint8_t pbr; // prioritisedBitRate
1819 uint8_t bsd; // bucketSizeDuration
1822 /* Downlink logical channel configuration */
1823 typedef struct schDlLcCfg
1825 uint8_t lcp; // logical Channel Prioritization
1828 /* Logical Channel configuration */
1829 typedef struct schLcCfg
1833 SchDrbQosInfo *drbQos;
1838 /* Aggregate max bit rate */
1839 typedef struct schAmbrCfg
1841 uint32_t ulBr; /* Ul BitRate */
1844 typedef struct schModulationInfo
1848 SchMcsTable mcsTable;
1851 /* UE configuration */
1852 typedef struct schUeCfgReq
1858 bool macCellGrpCfgPres;
1859 SchMacCellGrpCfg macCellGrpCfg;
1860 bool phyCellGrpCfgPres;
1861 SchPhyCellGrpCfg phyCellGrpCfg;
1863 SchSpCellCfg spCellCfg;
1864 SchAmbrCfg *ambrCfg;
1865 SchModulationInfo dlModInfo;
1866 SchModulationInfo ulModInfo;
1867 uint8_t numLcsToAdd;
1868 SchLcCfg schLcCfg[MAX_NUM_LC];
1871 /* UE Re-configuration */
1872 typedef struct schUeRecfgReq
1878 bool macCellGrpRecfgPres;
1879 SchMacCellGrpCfg macCellGrpRecfg;
1880 bool phyCellGrpRecfgPres;
1881 SchPhyCellGrpCfg phyCellGrpRecfg;
1882 bool spCellRecfgPres;
1883 SchSpCellRecfg spCellRecfg;
1884 SchAmbrCfg *ambrRecfg;
1885 SchModulationInfo dlModInfo;
1886 SchModulationInfo ulModInfo;
1887 uint8_t numLcsToAdd;
1888 SchLcCfg schLcCfgAdd[MAX_NUM_LC];
1889 uint8_t numLcsToDel;
1890 uint8_t lcIdToDel[MAX_NUM_LC];
1891 uint8_t numLcsToMod;
1892 SchLcCfg schLcCfgMod[MAX_NUM_LC];
1893 SchDataTransmission dataTransmissionInfo;
1895 bool drxConfigIndicatorRelease;
1899 typedef struct schUeCfgRsp
1906 SchFailureCause cause;
1909 /*As per WG8, UE ReCFG and UECFG have same structure definition*/
1910 typedef struct schUeCfgRsp SchUeRecfgRsp;
1912 typedef struct schRachRsrcReq
1914 SlotTimingInfo slotInd;
1918 uint8_t ssbIdx[MAX_NUM_SSB];
1921 typedef struct schCfraSsbResource
1924 uint8_t raPreambleIdx;
1925 }SchCfraSsbResource;
1927 typedef struct schCfraRsrc
1930 SchCfraSsbResource ssbResource[MAX_NUM_SSB];
1933 typedef struct schRachRsrcRsp
1938 SchCfraResource cfraResource;
1941 typedef struct schRachRsrcRel
1943 SlotTimingInfo slotInd;
1946 SchCfraResource cfraResource;
1949 typedef struct schUeDelete
1955 typedef struct schUeDeleteRsp
1963 typedef struct schCellDeleteReq
1969 typedef struct schCellDeleteRsp
1973 SchFailureCause cause;
1976 typedef struct dataVolInfo
1982 typedef struct ulBufferStatusRptInd
1988 DataVolInfo dataVolInfo[MAX_NUM_LOGICAL_CHANNEL_GROUPS];
1989 }UlBufferStatusRptInd;
1991 typedef struct srUciIndInfo
1995 SlotTimingInfo slotInd;
1997 uint8_t srPayload[MAX_SR_BITS_IN_BYTES];
2000 typedef struct dlHarqInd
2004 SlotTimingInfo slotInd;
2006 uint8_t harqPayload[MAX_HARQ_BITS_IN_BYTES];
2009 typedef struct schRrmPolicyRatio
2013 uint8_t dedicatedRatio;
2016 typedef struct schRrmPolicyOfSlice
2019 SchRrmPolicyRatio rrmPolicyRatioInfo;
2020 }SchRrmPolicyOfSlice;
2022 typedef struct schSliceCfgReq
2024 uint8_t numOfConfiguredSlice;
2025 SchRrmPolicyOfSlice **listOfSlices;
2028 typedef struct schSliceCfgRsp
2035 /*As per ORAN-WG8, Slice Cfg and Recfg are same structures*/
2036 typedef struct schSliceCfgReq SchSliceRecfgReq;
2037 typedef struct schSliceCfgRsp SchSliceRecfgRsp;
2039 typedef struct schPageInd
2048 typedef struct schUeHqInfo
2054 typedef struct schRlsHqInfo
2058 SchUeHqInfo *ueHqInfo;
2061 /* function declarations */
2062 uint8_t schActvInit(Ent entity, Inst instId, Region region, Reason reason);
2063 uint8_t MacMessageRouter(Pst *pst, void *msg);
2064 uint8_t SchMessageRouter(Pst *pst, void *msg);
2066 /**********************************************************************
2068 **********************************************************************/