1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
18 #ifndef __COMMON_DEF_H__
19 #define __COMMON_DEF_H__
44 #include "gen.x" /* general */
45 #include "ssi.x" /* system services */
56 #define SCH_INST_START 1
57 #define SCH_MAX_INST 1
59 #define RADIO_FRAME_DURATION 10 /* Time duration of a radio frame in ms */
61 #define MAX_NUM_CELL 2 /* Changed to 2 to support cell Id 2 even if there is only one cell in DU */
64 #define MAX_NUM_UE_PER_TTI 1
65 #define MAX_NUM_LC MAX_DRB_LCID + 1 /*Spec 38.331: Sec 6.4: maxLC-ID Keyword*/
66 #define MAX_NUM_SRB 3 /* Max. no of Srbs */
67 #define MAX_NUM_DRB 29 /* spec 38.331, maxDRB */
68 #define MAX_NUM_SSB 64 /* spec 28.331, maxNrofSSBs */
69 #define MAX_NUM_HARQ_PROC 16 /* spec 38.331, nrofHARQ-ProcessesForPDSCH */
70 #define MAX_NUM_TB_PER_UE 2 /* spec 38.331, maxNrofCodeWordsScheduledByDCI */
72 /* 5G ORAN phy delay */
74 #define PHY_DELTA_DL 2
75 #define PHY_DELTA_UL 0
77 #define PHY_DELTA_DL 1
78 #define PHY_DELTA_UL 0
82 #define ODU_SELECTOR_LC 0
83 #define ODU_SELECTOR_TC 1
84 #define ODU_SELECTOR_LWLC 2
86 #define ODU_START_CRNTI 100
87 #define ODU_END_CRNTI 500
94 #define MIN_DRB_LCID 4
95 #define MAX_DRB_LCID 32
97 #define FREQ_DOM_RSRC_SIZE 6 /* i.e. 6 bytes because Size of frequency domain resource is 45 bits */
98 #define PUCCH_FORMAT_0 0
99 #define PUCCH_FORMAT_1 1
100 #define PUCCH_FORMAT_2 2
101 #define PUCCH_FORMAT_3 3
102 #define PUCCH_FORMAT_4 4
104 #define DEFAULT_MCS 4
106 #define BANDWIDTH_20MHZ 20
107 #define BANDWIDTH_100MHZ 100
109 /* PRB allocation as per 38.101, Section 5.3.2 */
110 #define TOTAL_PRB_20MHZ_MU0 106
111 #define TOTAL_PRB_100MHZ_MU1 273
113 #define MAX_NUM_RB TOTAL_PRB_100MHZ_MU1 /* value for numerology 1, 100 MHz */
115 #define MAX_NUM_RB TOTAL_PRB_20MHZ_MU0 /* value for numerology 0, 20 MHz */
118 #define ODU_UE_THROUGHPUT_PRINT_TIME_INTERVAL 5 /* in milliseconds */
119 #define ODU_SNSSAI_THROUGHPUT_PRINT_TIME_INTERVAL 60000 /* in milliseconds */
121 /*Spec 38.331 Sec 6.4: Maximum number of paging occasion per paging frame*/
122 #define MAX_PO_PER_PF 4
132 /*First SCS in kHz as per 3gpp spec 38.211 Table 4.2-1 */
135 #define MAX_NUM_STATS_CFG 2 /* Max number of statistics configuration/Subscription supported */
136 #define MAX_NUM_STATS_GRP 5 /* Max number of statistics group per configuration request */
137 #define MAX_NUM_STATS 10 /* Max number of statistics per group */
139 /* Defining macros for common utility functions */
140 #define ODU_GET_MSG_BUF SGetMsg
141 #define ODU_PUT_MSG_BUF SPutMsg
142 #define ODU_ADD_PRE_MSG_MULT SAddPreMsgMult
143 #define ODU_ADD_PRE_MSG_MULT_IN_ORDER SAddPreMsgMultInOrder
144 #define ODU_ADD_POST_MSG_MULT SAddPstMsgMult
145 #define ODU_START_TASK SStartTask
146 #define ODU_STOP_TASK SStopTask
147 #define ODU_ATTACH_TTSK SAttachTTsk
148 #define ODU_POST_TASK SPstTsk
149 #define ODU_COPY_MSG_TO_FIX_BUF SCpyMsgFix
150 #define ODU_COPY_FIX_BUF_TO_MSG SCpyFixMsg
151 #define ODU_REG_TTSK SRegTTsk
152 #define ODU_SET_PROC_ID SSetProcId
153 #define ODU_GET_MSG_LEN SFndLenMsg
154 #define ODU_EXIT_TASK SExitTsk
155 #define ODU_PRINT_MSG SPrntMsg
156 #define ODU_REM_PRE_MSG SRemPreMsg
157 #define ODU_REM_PRE_MSG_MULT SRemPreMsgMult
158 #define ODU_REM_POST_MSG_MULT SRemPstMsgMult
159 #define ODU_REG_TMR_MT SRegTmrMt
160 #define ODU_SEGMENT_MSG SSegMsg
161 #define ODU_CAT_MSG SCatMsg
162 #define ODU_GET_PROCID SFndProcId
163 #define ODU_SET_THREAD_AFFINITY SSetAffinity
164 #define ODU_CREATE_TASK SCreateSTsk
166 #define MAX_SYMB_PER_SLOT 14
172 /* Maximum slots for max periodicity and highest numerology is 320.
173 * However, aligning to fapi_interface.h, setting this macro to 160.
174 * TODO : To support 160, FAPI_MAX_NUM_TLVS_CONFIG in fapi_interface.h
175 * of Intel L1 must be incremented to a higher number */
176 #define MAX_TDD_PERIODICITY_SLOTS 10
179 #define GET_UE_ID( _crnti,_ueId) \
181 _ueId = _crnti - ODU_START_CRNTI + 1; \
184 #define GET_CRNTI( _crnti, _ueId) \
186 _crnti = _ueId + ODU_START_CRNTI - 1; \
189 /* Calculates cellIdx from cellId */
190 #define GET_CELL_IDX(_cellId, _cellIdx) \
192 _cellIdx = _cellId - 1; \
195 #define SET_BITS_MSB(_startBit, _numBits, _byte) \
197 _byte = (~((0xFF) >> _numBits)); \
198 _byte >>= _startBit; \
201 #define SET_BITS_LSB(_startBit, _numBits, _byte) \
203 _byte = (~((0xFF) << _numBits)); \
204 _byte <<= _startBit; \
207 /* this MACRO set 1 bit at the bit position */
208 #define SET_ONE_BIT(_bitPos, _out) \
210 _out = ((1<<_bitPos) | _out); \
213 /* this MACRO un-set 1 bit at the bit position */
214 #define UNSET_ONE_BIT(_bitPos, _out) \
216 _out = (~(1<<_bitPos) & _out); \
219 /* this MACRO finds the index of the rightmost set bit */
220 #define GET_RIGHT_MOST_SET_BIT( _in,_bitPos) \
222 _bitPos = __builtin_ctz(_in); \
225 /* MACRO for checking CRNTI range*/
226 #define CHECK_CRNTI(_crnti, _isCrntiValid) \
228 _isCrntiValid = ((_crnti >= ODU_START_CRNTI && _crnti <= ODU_END_CRNTI ) ? 1 : 0); \
231 #define CHECK_LCID(_lcId, _isLcidValid) \
233 _isLcidValid = ((_lcId >= SRB0_LCID && _lcId <= MAX_DRB_LCID) ? 1 : 0);\
237 * @def TMR_CALCUATE_WAIT
239 * This macro calculates and assigns wait time based on the value of the
240 * timer and the timer resolution. Timer value of 0 signifies that the
241 * timer is not configured
243 * @param[out] _wait Time for which to arm the timer changed to proper
244 * value according to the resolution
245 * @param[in] _tmrVal Value of the timer
246 * @param[in] _timerRes Resolution of the timer
249 #define TMR_CALCUATE_WAIT(_wait, _tmrVal, _timerRes) \
251 (_wait) = ((_tmrVal) * SS_TICKS_SEC)/((_timerRes) * 1000); \
252 if((0 != (_tmrVal)) && (0 == (_wait))) \
263 RESOURCE_UNAVAILABLE,
345 typedef struct slotTimingInfo
352 typedef struct PlmnIdentity
358 typedef struct snssai
364 typedef struct oduCellId
370 typedef struct tddCfg
372 DlUlTxPeriodicity tddPeriod; /*DL UL Transmission periodicity */
373 uint8_t nrOfDlSlots; /*No. of consecultive full DL slots at beginning of DL-UL pattern*/
374 uint8_t nrOfDlSymbols; /*No. of consecultive DL symbol at beginning of slot after last full DL slot*/
375 uint8_t nrOfUlSlots; /*No. of consecutive full UL slots at the end of each DL-UL pattern*/
376 uint8_t nrOfUlSymbols; /*No. of consecutive UL symbols in the end of the slot before the first full UL slot*/
380 OduCellStatus gCellStatus;
382 uint64_t gDlDataRcvdCnt; /* Number of DL data received at EGTP */
384 void fillCoresetFeqDomAllocMap(uint16_t startPrb, uint16_t prbSize, uint8_t *freqDomain);
385 void oduCpyFixBufToMsg(uint8_t *fixBuf, Buffer *mBuf, uint16_t len);
386 uint8_t buildPlmnId(Plmn plmn, uint8_t *buf);
387 uint16_t convertScsEnumValToScsVal(uint8_t scsEnumValue);
388 uint8_t convertScsValToScsEnum(uint32_t num);
389 uint8_t convertSSBPeriodicityToEnum(uint32_t num);
391 uint8_t SGetSBufNewForDebug(char *file, const char *func, int line, Region region, Pool pool, Data **ptr, Size size);
392 uint8_t SPutSBufNewForDebug(char *file, const char *func, int line, Region region, Pool pool, Data *ptr, Size size);
393 uint8_t SGetStaticBufNewForDebug(char *file, const char *func, int line, \
394 Region region, Pool pool, Data **ptr, Size size, uint8_t memType);
395 uint8_t SPutStaticBufNewForDebug(char *file, const char *func, int line, \
396 Region region, Pool pool, Data *ptr, Size size, uint8_t memType);
397 uint8_t countSetBits(uint32_t num);
398 uint32_t convertArfcnToFreqKhz(uint32_t arfcn);
401 /**********************************************************************
403 ***********************************************************************/