1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C code for packing/unpacking of cm_lte data structures.
29 **********************************************************************/
31 /* header include files (.h) */
33 #include "envopt.h" /* environment options */
34 #include "envdep.h" /* environment dependent */
35 #include "envind.h" /* environment independent */
37 /* header/extern include files (.x) */
39 #include "gen.h" /* general layer */
40 #include "ssi.h" /* system services */
41 #include "cm_lte.h" /* common lte header file */
42 #include "cm5.h" /* common timers */
43 #include "mt_ss.h" /* MTSS specific */
44 #include "mt_err.h" /* MTSS error defines */
45 #include "ss_queue.h" /* queues */
46 #include "ss_task.h" /* tasking */
47 #include "ss_msg.h" /* messaging */
48 #include "ss_mem.h" /* memory management interface */
49 #include "ss_gen.h" /* general */
50 /* mt003.301 Additions - Task deregistration */
51 #include "ss_err.h" /* error */
54 /* header/extern include files (.x) */
56 #include "gen.x" /* general layer */
57 #include "ssi.x" /* system services */
58 #include "cm_lte.x" /* common lte header file */
59 #include "cm5.x" /* common timers */
60 #include "mt_ss.x" /* MTSS specific */
61 #include "ss_queue.x" /* queues */
62 #include "ss_task.x" /* tasking */
63 #include "ss_timer.x" /* timers */
65 #include "ss_strm.x" /* STREAMS */
66 #include "ss_msg.x" /* messaging */
67 #include "ss_mem.x" /* memory management interface */
68 #include "ss_drvr.x" /* driver tasks */
69 #include "ss_gen.x" /* general */
72 /* public variable declarations */
76 /***********************************************************
81 * Desc : RLC Identifier
90 **********************************************************/
92 PUBLIC S16 cmPkLteRlcId
98 PUBLIC S16 cmPkLteRlcId(param, mBuf)
106 CMCHKPK(cmPkLteCellId, param->cellId, mBuf);
107 CMCHKPK(cmPkLteRnti, param->ueId, mBuf);
108 CMCHKPK(SPkU8, param->rbType, mBuf);
109 CMCHKPK(cmPkLteRbId, param->rbId, mBuf);
115 /***********************************************************
117 * Func : cmUnpkLteRlcId
120 * Desc : RLC Identifier
129 **********************************************************/
131 PUBLIC S16 cmUnpkLteRlcId
137 PUBLIC S16 cmUnpkLteRlcId(param, mBuf)
143 TRC3(cmUnpkLteRlcId);
145 CMCHKUNPK(cmUnpkLteRbId, ¶m->rbId, mBuf);
146 CMCHKUNPK(SUnpkU8, ¶m->rbType, mBuf);
147 CMCHKUNPK(cmUnpkLteRnti, ¶m->ueId, mBuf);
148 CMCHKUNPK(cmUnpkLteCellId, ¶m->cellId, mBuf);
154 /***********************************************************
156 * Func : cmPkLteTimingInfo
159 * Desc : LTE Timing Info
168 **********************************************************/
170 PUBLIC S16 cmPkLteTimingInfo
172 CmLteTimingInfo *param,
176 PUBLIC S16 cmPkLteTimingInfo(param, mBuf)
177 CmLteTimingInfo *param;
182 TRC3(cmPkLteTimingInfo);
184 CMCHKPK(SPkU16, param->slot, mBuf);
185 CMCHKPK(SPkU16, param->sfn, mBuf);
186 //CMCHKPK(SPkU16, param->hSfn, mBuf);
192 /***********************************************************
194 * Func : cmUnpkLteTimingInfo
197 * Desc : LTE Timing Info
206 **********************************************************/
208 PUBLIC S16 cmUnpkLteTimingInfo
210 CmLteTimingInfo *param,
214 PUBLIC S16 cmUnpkLteTimingInfo(param, mBuf)
215 CmLteTimingInfo *param;
220 TRC3(cmUnpkLteTimingInfo);
222 //CMCHKUNPK(SUnpkU16, ¶m->hSfn, mBuf);
223 CMCHKUNPK(SUnpkU16, ¶m->sfn, mBuf);
224 CMCHKUNPK(SUnpkU8, ¶m->slot, mBuf);
230 /***********************************************************
232 * Func : cmPkLtePdcpId
244 **********************************************************/
246 PUBLIC S16 cmPkLtePdcpId
252 PUBLIC S16 cmPkLtePdcpId(param, mBuf)
260 CMCHKPK(SPkU8, param->rbType, mBuf);
261 CMCHKPK(cmPkLteRbId, param->rbId, mBuf);
262 CMCHKPK(cmPkLteRnti, param->ueId, mBuf);
263 CMCHKPK(cmPkLteCellId, param->cellId, mBuf);
269 /***********************************************************
271 * Func : cmUnpkLtePdcpId
283 **********************************************************/
285 PUBLIC S16 cmUnpkLtePdcpId
291 PUBLIC S16 cmUnpkLtePdcpId(param, mBuf)
297 TRC3(cmUnpkLtePdcpId);
299 CMCHKUNPK(cmUnpkLteCellId, ¶m->cellId, mBuf);
300 CMCHKUNPK(cmUnpkLteRnti, ¶m->ueId, mBuf);
301 CMCHKUNPK(cmUnpkLteRbId, ¶m->rbId, mBuf);
302 CMCHKUNPK(SUnpkU8, ¶m->rbType, mBuf);
307 PUBLIC S16 cmUpdateSsiMemInfo
312 PUBLIC S16 cmUpdateSsiMemInfo(mInfo)
320 SsMemDbgInfo dbgInfo;
322 SGetRegPoolInfo(&numReg,&numPool);
323 mInfo->numRegions = numReg;
325 for(idxReg=0; idxReg< numReg; idxReg++)
327 SGetRegInfo(idxReg, &dbgInfo);
329 if(mInfo->regInfo[idxReg].isGenMemInfoUpdated == TRUE)
331 for(idxPool=0; idxPool<numPool; idxPool++)
333 mInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed = dbgInfo.bktDbgTbl[idxPool].numAlloc;
334 if(mInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed > mInfo->regInfo[idxReg].poolInfo[idxPool].maxUsed)
335 mInfo->regInfo[idxReg].poolInfo[idxPool].maxUsed = mInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed;
340 mInfo->regInfo[idxReg].numPools = numPool;
341 mInfo->regInfo[idxReg].regionId = idxReg;
342 mInfo->regInfo[idxReg].regionType = 0;
344 for(idxPool=0; idxPool<numPool; idxPool++)
346 mInfo->regInfo[idxReg].poolInfo[idxPool].totAvailable = dbgInfo.bktDbgTbl[idxPool].numBlks;
347 mInfo->regInfo[idxReg].poolInfo[idxPool].poolSize = dbgInfo.bktDbgTbl[idxPool].size;
348 mInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed = dbgInfo.bktDbgTbl[idxPool].numAlloc;
349 if(mInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed > mInfo->regInfo[idxReg].poolInfo[idxPool].maxUsed)
350 mInfo->regInfo[idxReg].poolInfo[idxPool].maxUsed = mInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed;
352 mInfo->regInfo[idxReg].isGenMemInfoUpdated = TRUE;
359 PUBLIC S16 cmFillMemUtilizationMeas
361 CmLteMemInfo *memoryInfo,
362 CmLteMemInfo *memInfo
365 PUBLIC S16 cmFillMemUtilizationMeas(memoryInfo,memInfo)
366 CmLteMemInfo *memoryInfo;
367 CmLteMemInfo *memInfo;
374 memoryInfo->numRegions = memInfo->numRegions;
375 for(idxReg=0; idxReg < memInfo->numRegions; idxReg++)
377 memoryInfo->regInfo[idxReg].regionId = memInfo->regInfo[idxReg].regionId;
378 memoryInfo->regInfo[idxReg].numPools = memInfo->regInfo[idxReg].numPools;
379 memoryInfo->regInfo[idxReg].regionType = memInfo->regInfo[idxReg].regionType;
380 numPool = memoryInfo->regInfo[idxReg].numPools;
382 for(idxPool=0; idxPool < numPool; idxPool++)
384 memoryInfo->regInfo[idxReg].poolInfo[idxPool].totAvailable = memInfo->regInfo[idxReg].poolInfo[idxPool].totAvailable;
385 memoryInfo->regInfo[idxReg].poolInfo[idxPool].poolSize = memInfo->regInfo[idxReg].poolInfo[idxPool].poolSize;
386 memoryInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed = memInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed;
387 memoryInfo->regInfo[idxReg].poolInfo[idxPool].maxUsed = memInfo->regInfo[idxReg].poolInfo[idxPool].maxUsed;
394 PUBLIC S16 cmClearMemUtilizationCounter
396 CmLteMemInfo *memInfo
399 PUBLIC S16 cmClearMemUtilizationCounter(memInfo)
400 CmLteMemInfo *memInfo;
406 for(idxReg=0; idxReg < memInfo->numRegions; idxReg++)
408 memInfo->regInfo[idxReg].regionId = 0;
409 memInfo->regInfo[idxReg].numPools = 0;
410 memInfo->regInfo[idxReg].regionType = 0;
411 memInfo->regInfo[idxReg].isGenMemInfoUpdated = FALSE;
412 numPool = memInfo->regInfo[idxReg].numPools;
414 for(idxPool=0; idxPool<numPool; idxPool++)
416 memInfo->regInfo[idxReg].poolInfo[idxPool].totAvailable = 0;
417 memInfo->regInfo[idxReg].poolInfo[idxPool].poolSize = 0;
418 memInfo->regInfo[idxReg].poolInfo[idxPool].crntUsed = 0;
419 memInfo->regInfo[idxReg].poolInfo[idxPool].maxUsed = 0;
426 PUBLIC S16 cmClearCpuUtilizationCounter
428 CmCpuStatsInfo *cpuInfo
431 PUBLIC S16 cmClearCpuUtilizationCounter(cpuInfo)
432 CmCpuStatsInfo *cpuInfo
436 for(idx=0; idx < cpuInfo->numCores; idx++)
438 cpuInfo->cpuUtil[idx].maxCpuUtil = 0;
439 cpuInfo->cpuUtil[idx].totCpuUtil = 0;
440 cpuInfo->cpuUtil[idx].numSamples = 0;
442 cpuInfo->numCores = 0;
447 PUBLIC S16 cmFillCpuUtilizationMeas
449 CmLteCpuInfo *cpuMeasInfo,
450 CmCpuStatsInfo *cpuInfo
453 PUBLIC S16 cmFillCpuUtilizationMeas(cpuMeasInfo,cpuInfo)
454 CmLteCpuInfo *cpuMeasInfo;
455 CmCpuStatsInfo *cpuInfo;
459 cpuMeasInfo->numCores = cpuInfo->numCores;
460 for(idx=0; idx < cpuInfo->numCores; idx++)
462 cpuMeasInfo->cpuUtil[idx].avgCpuUtil = cpuInfo->cpuUtil[idx].totCpuUtil/cpuInfo->cpuUtil[idx].numSamples;
463 cpuMeasInfo->cpuUtil[idx].maxCpuUtil = cpuInfo->cpuUtil[idx].maxCpuUtil;
474 PUBLIC Void cmUpdateTtiCounters(U32 ttiProcessingTime)
477 ttiProc.totTtiProcessingTime += ttiProcessingTime;
478 if(ttiProcessingTime > ttiProc.maxTtiProcessingTime)
480 ttiProc.maxTtiProcessingTime = ttiProcessingTime;
482 if(ttiProcessingTime > TTI_THRESHOLD_VALUE)
484 ttiProc.ttiThresholdExceedCount++;
486 if(ttiProcessingTime > TTI_1MS)
488 ttiProc.ttiStretchCount++;
493 PUBLIC Void cmResetTtiCounters(Void)
495 ttiProc.totTtiProcessingTime = 0;
496 ttiProc.numOfTti = 0;
497 ttiProc.maxTtiProcessingTime = 0;
498 ttiProc.ttiStretchCount = 0;
499 ttiProc.ttiThresholdExceedCount = 0;
500 ttiProc.phyReptTtiStretchCount = 0;
505 /**********************************************************************
507 **********************************************************************/