1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
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7 # You may obtain a copy of the License at #
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14 # See the License for the specific language governing permissions and #
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17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for rach handling functions
29 **********************************************************************/
32 @brief This file implements the rach handling.
34 #include "common_def.h"
40 #include "du_app_mac_inf.h"
41 #include "mac_sch_interface.h"
43 #include "sch_utils.h"
45 SchCb schCb[SCH_MAX_INST];
46 uint8_t puschDeltaTable[MAX_MU_PUSCH];
49 * @brief calculate ra-rnti function.
53 * Function : calculateRaRnti
55 * This function calculates ra-rnti
57 * @param[in] symbol index
58 * @param[in] slot index
59 * @param[in] frequency index
62 uint16_t calculateRaRnti(uint8_t symbolIdx, uint8_t slotIdx, uint8_t freqIdx)
65 uint8_t ulCarrierIdx = 0; /* Uplink carrier used for MSG1 transmission. 0:NUL carrier; 1:SUL carrier */
67 /* Refer to spec 38.321, section 5.1.3 */
68 raRnti = (1 + symbolIdx + (14*slotIdx) + (14*80*freqIdx) + (14*80*8*ulCarrierIdx));
73 * @brief create raCb function.
77 * Function : createSchRaCb
79 * This function create raCb
82 * @param[in] shed instance
85 void createSchRaCb(uint16_t tcrnti, Inst schInst)
89 GET_UE_IDX(tcrnti, ueIdx);
90 schCb[schInst].cells[schInst]->raCb[ueIdx -1].tcrnti = tcrnti;
94 * @brief resource allocation for msg3 PUSCH
98 * Function : schAllocMsg3Pusch
100 * This function handles msg3 PUSCH allocation
102 * @param[in] Inst schInst, SCH instance
103 * @param[in] slot, current slot
104 * @param[out] msg3StartRb
105 * @param[out] msg3NumRb
108 SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, uint16_t msg3Slot)
110 SchCellCb *cell = NULLP;
111 SchUlSlotInfo *schUlSlotInfo = NULLP;
112 uint8_t startSymb = 0;
120 cell = schCb[schInst].cells[schInst];
123 DU_LOG("\n\nERROR --> SCH : Failed to find cell in schAllocMsg3Pusch");
127 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
128 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
130 startRb = cell->schUlSlotInfo[msg3Slot]->puschCurrentPrb;
131 tbSize = schCalcTbSize(8); /* 6 bytes msg3 and 2 bytes header */
132 numRb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
134 /* allocating 1 extra RB for now */
136 /* increment PUSCH PRB */
137 cell->schUlSlotInfo[msg3Slot]->puschCurrentPrb += numRb;
139 for(idx=startSymb; idx<symbLen; idx++)
141 //cell->schUlSlotInfo[msg3Slot]->assignedPrb[idx] = startRb + numRb;
143 schUlSlotInfo = cell->schUlSlotInfo[msg3Slot];
145 SCH_ALLOC(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
146 if(!schUlSlotInfo->schPuschInfo)
148 DU_LOG("\nERROR --> SCH : Memory allocation failed in schAllocMsg3Pusch");
151 tbSize = 0; /* since nPrb has been incremented, recalculating tbSize */
152 tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL);
153 tbSize = tbSize / 8 ; /*bits to byte conversion*/
154 schUlSlotInfo->schPuschInfo->crnti = crnti;
155 schUlSlotInfo->schPuschInfo->harqProcId = SCH_HARQ_PROC_ID;
156 schUlSlotInfo->schPuschInfo->resAllocType = SCH_ALLOC_TYPE_1;
157 schUlSlotInfo->schPuschInfo->fdAlloc.startPrb = startRb;
158 schUlSlotInfo->schPuschInfo->fdAlloc.numPrb = numRb;
159 schUlSlotInfo->schPuschInfo->tdAlloc.startSymb = startSymb;
160 schUlSlotInfo->schPuschInfo->tdAlloc.numSymb = symbLen;
161 schUlSlotInfo->schPuschInfo->tbInfo.qamOrder = QPSK_MODULATION; /* QPSK modulation */
162 schUlSlotInfo->schPuschInfo->tbInfo.mcs = mcs;
163 schUlSlotInfo->schPuschInfo->tbInfo.mcsTable = SCH_MCS_TABLE_QAM_64;
164 schUlSlotInfo->schPuschInfo->tbInfo.ndi = NEW_TRANSMISSION; /* new transmission */
165 schUlSlotInfo->schPuschInfo->tbInfo.rv = 0;
166 schUlSlotInfo->schPuschInfo->tbInfo.tbSize = tbSize; /*Considering 2 PRBs */
167 schUlSlotInfo->schPuschInfo->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */
168 schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
169 schUlSlotInfo->schPuschInfo->dmrsAddPos = DMRS_ADDITIONAL_POS;
171 return schUlSlotInfo->schPuschInfo;
175 * @brief Check if a time frame is in RA Response window
179 * Function : isInRaRspWindow
181 * Check if a time frame is in RA Response window
183 * @param[in] RA request
184 * @param[in] Time frame to check
185 * @param[in] Total number of slot per radio frame
189 RaRspWindowStatus isInRaRspWindow(SchRaReq *raReq, SlotTimingInfo frameToCheck, uint16_t numSlotsPerSystemFrame)
191 uint32_t winStartTime, winEndTime, timeToCheck;
193 winStartTime = (raReq->winStartTime.sfn * numSlotsPerSystemFrame) + raReq->winStartTime.slot;
194 winEndTime = (raReq->winEndTime.sfn * numSlotsPerSystemFrame) + raReq->winEndTime.slot;
195 timeToCheck = (frameToCheck.sfn * numSlotsPerSystemFrame) + frameToCheck.slot;
197 /* TODO : check how to handle the wrap around scenario of MAX_SFN */
198 if((timeToCheck >= winStartTime) && (timeToCheck <= winEndTime))
199 return WITHIN_WINDOW;
200 else if(timeToCheck < winStartTime)
201 return WINDOW_YET_TO_START;
203 return WINDOW_EXPIRED;
207 * @brief Processes any pending RA request
211 * Function : schProcessRaReq
213 * This function process pending RA request
215 * @param[in] Current timing of the cell
218 void schProcessRaReq(SlotTimingInfo currTime, SchCellCb *cell)
220 bool k2Found = false;
221 uint8_t ueIdx = 0, k0TblIdx = 0, k2TblIdx = 0;
222 uint8_t k0Index = 0, k2Index = 0;
223 uint8_t k0 = 0, k2 = 0;
225 uint8_t msg3Delta = 0, msg3MinSchTime = 0;
227 uint8_t totalCfgSlot = 0;
229 uint16_t dciSlot = 0, rarSlot = 0, msg3Slot = 0;
230 SlotTimingInfo dciTime, rarTime;
231 RarAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for RAR */
232 RarAlloc *rarSlotAlloc = NULLP; /* Stores info for transmission of RAR PDSCH */
233 SchPuschInfo *msg3PuschInfo = NULLP; /* Stores MSG3 PUSCH scheduling information */
234 SchK0K1TimingInfoTbl *k0K1InfoTbl=NULLP;
235 SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
236 RaRspWindowStatus windowStatus=0;
238 while(ueIdx < MAX_NUM_UE)
240 if(cell->raReq[ueIdx] == NULLP)
247 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
249 k0K1InfoTbl = &cell->cellCfg.schInitialDlBwp.k0K1InfoTbl;
250 msg3K2InfoTbl = &cell->cellCfg.schInitialUlBwp.msg3K2InfoTbl;
251 puschMu = cell->cellCfg.numerology;
252 msg3Delta = puschDeltaTable[puschMu];
253 msg3MinSchTime = minMsg3SchTime[cell->cellCfg.numerology];
255 /* Calculating time frame to send DCI for RAR */
256 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
257 dciSlot = dciTime.slot;
259 /* Consider this slot for sending DCI, only if it is a DL slot */
260 if(schGetSlotSymbFrmt(dciSlot, cell->slotFrmtBitMap) == DL_SLOT)
264 /* Check if this slot is within RA response window */
265 windowStatus = isInRaRspWindow(cell->raReq[ueIdx], dciTime, cell->numSlots);
266 if(windowStatus == WITHIN_WINDOW)
268 /* For all k0 values, search for a suitable k2 value to schedule MSG3.
269 * RAR DCI, RAR PDSCH and MSG3 is scheduled only if one such k0-k2 combination
270 * is found. Else no scheduling happens.
272 for(k0TblIdx = 0; k0TblIdx < k0K1InfoTbl->k0k1TimingInfo[dciSlot].numK0; k0TblIdx++)
274 k0Index = k0K1InfoTbl->k0k1TimingInfo[dciSlot].k0Indexes[k0TblIdx].k0Index;
275 k0 = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
277 /* Calculating time frame to send RAR PDSCH */
278 ADD_DELTA_TO_TIME(dciTime, rarTime, k0);
279 rarSlot = rarTime.slot;
281 for(k2TblIdx = 0; k2TblIdx < msg3K2InfoTbl->k2TimingInfo[rarSlot].numK2; k2TblIdx++)
283 k2Index = msg3K2InfoTbl->k2TimingInfo[rarSlot].k2Indexes[k2TblIdx];
284 k2 = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
286 /* Delta is added to the slot allocation for msg3 based on 38.214 section 6.1.2.1 */
288 if(k2 >= msg3MinSchTime)
290 msg3Slot = (rarSlot + k2) % cell->numSlots;
292 if(schGetSlotSymbFrmt(msg3Slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
303 else if(windowStatus == WINDOW_EXPIRED)
305 SCH_FREE(cell->raReq[ueIdx]->rachInd, sizeof(RachIndInfo));
306 SCH_FREE(cell->raReq[ueIdx], sizeof(SchRaReq));
311 /* If K0-K2 combination not found, no scheduling happens */
318 /* Allocate memory for RAR PDCCH slot, pointer will be checked at schProcessSlotInd() */
319 SCH_ALLOC(dciSlotAlloc, sizeof(RarAlloc));
320 if(dciSlotAlloc == NULLP)
322 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
325 cell->schDlSlotInfo[dciSlot]->rarAlloc = dciSlotAlloc;
327 /* Fill PDCCH and PDSCH scheduling information for RAR */
328 if((schFillRar(cell, rarTime, ueIdx, dciSlotAlloc, k0Index)) != ROK)
330 DU_LOG("\nERROR --> SCH: Scheduling of RAR failed in slot [%d]", rarSlot);
331 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
332 cell->schDlSlotInfo[dciSlot]->rarAlloc = NULLP;
336 /* Allocate resources for msg3 */
337 msg3PuschInfo = schAllocMsg3Pusch(cell->instIdx, cell->raReq[ueIdx]->rachInd->crnti, k2Index, msg3Slot);
341 dciSlotAlloc->rarInfo.raRnti = cell->raReq[ueIdx]->raRnti;
342 dciSlotAlloc->rarInfo.tcrnti = cell->raReq[ueIdx]->rachInd->crnti;
343 dciSlotAlloc->rarInfo.RAPID = cell->raReq[ueIdx]->rachInd->preambleIdx;
344 dciSlotAlloc->rarInfo.ta = cell->raReq[ueIdx]->rachInd->timingAdv;
345 dciSlotAlloc->rarInfo.ulGrant.bwpSize = cell->cellCfg.schInitialUlBwp.bwp.freqAlloc.numPrb;
346 /* Spec 38.213, section 8.2, 0 : MSG3 PUSCH will be transmitted without frequency hopping */
347 dciSlotAlloc->rarInfo.ulGrant.freqHopFlag = 0;
348 dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.startPrb = msg3PuschInfo->fdAlloc.startPrb;
349 dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.numPrb = msg3PuschInfo->fdAlloc.numPrb;
350 dciSlotAlloc->rarInfo.ulGrant.k2Index = k2Index;
351 dciSlotAlloc->rarInfo.ulGrant.mcs = msg3PuschInfo->tbInfo.mcs;
352 dciSlotAlloc->rarInfo.ulGrant.tpc = 3; /* TODO : Check appropriate value to be filled */
353 /* Spec 38.213, section 8.2 : In a contention based random access
354 * procedure, the CSI request field is reserved. */
355 dciSlotAlloc->rarInfo.ulGrant.csiReq = 0;
358 /* Check if both DCI and RAR are sent in the same slot.
359 * If not, allocate memory RAR PDSCH slot to store RAR info
361 if(dciSlot == rarSlot)
362 dciSlotAlloc->pduPres = BOTH;
365 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
366 SCH_ALLOC(rarSlotAlloc, sizeof(RarAlloc));
367 if(rarSlotAlloc == NULLP)
369 DU_LOG("\nERROR --> SCH : Memory Allocation failed for rarSlotAlloc");
370 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
371 cell->schDlSlotInfo[dciSlot]->rarAlloc = NULLP;
374 cell->schDlSlotInfo[rarSlot]->rarAlloc = rarSlotAlloc;
376 /* Copy all RAR info */
377 memcpy(rarSlotAlloc, dciSlotAlloc, sizeof(RarAlloc));
378 rarSlotAlloc->rarPdcchCfg.dci.pdschCfg = &rarSlotAlloc->rarPdschCfg;
380 /* Assign correct PDU types in corresponding slots */
381 rarSlotAlloc->pduPres = PDSCH_PDU;
382 dciSlotAlloc->pduPres = PDCCH_PDU;
383 dciSlotAlloc->pdschSlot = rarSlot;
386 /* Create raCb at SCH */
387 createSchRaCb(cell->raReq[ueIdx]->rachInd->crnti, cell->instIdx);
389 SCH_FREE(cell->raReq[ueIdx]->rachInd, sizeof(RachIndInfo));
390 SCH_FREE(cell->raReq[ueIdx], sizeof(SchRaReq));
393 } /* End of while(ueIdx < MAX_NUM_UE) */
397 * @brief process rach indication function.
401 * Function : schProcessRachInd
403 * This function process rach indication
405 * @param[in] rachInd parameters
406 * @param[in] shed instance
409 uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst)
411 SchCellCb *cell = schCb[schInst].cells[schInst];
412 SchRaReq *raReq = NULLP;
419 DU_LOG("\nERROR --> SCH: Failed to find cell in schProcessRachInd");
423 /* Storing RA request in cellCb */
424 GET_UE_IDX(rachInd->crnti, ueIdx);
427 DU_LOG("\nERROR --> SCH: Invalid CRNTI [%d]", rachInd->crnti);
431 SCH_ALLOC(raReq, sizeof(SchRaReq));
434 DU_LOG("\nERROR --> SCH : Memory allocation failure in schProcessRachInd");
435 SCH_FREE(rachInd, sizeof(RachIndInfo));
439 /* calculate the ra-rnti value */
440 raReq->raRnti = calculateRaRnti(rachInd->symbolIdx, rachInd->slotIdx, rachInd->freqIdx);
441 raReq->rachInd = rachInd;
442 raReq->winStartTime.sfn = rachInd->timingInfo.sfn;
443 raReq->winStartTime.slot = rachInd->timingInfo.slot;
445 /* Converting window size from ms to number of slots */
446 slotDuration = (1 / pow(2, cell->cellCfg.numerology));
447 winNumSlots = (float)cell->cellCfg.schRachCfg.raRspWindow / slotDuration;
449 /* Adding window size to window start time to get window end time */
450 ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots);
452 cell->raReq[ueIdx -1] = raReq;
458 * @brief fill RAR info function.
462 * Function : calculateRaRnti
464 * This function fills pdcch and pdsch info for RAR
466 * @param[in] rar Allocation info
469 * @param[in] offset to pointA to determine freq alloc
472 uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueIdx, RarAlloc *rarAlloc, uint8_t k0Index)
474 uint8_t coreset0Idx = 0;
476 uint8_t firstSymbol = 0;
477 uint8_t numSymbols = 0;
479 uint8_t FreqDomainResource[6] = {0};
481 uint8_t mcs = 4; /* MCS fixed to 4 */
483 SchBwpDlCfg *initialBwp = &cell->cellCfg.schInitialDlBwp;
484 PdcchCfg *pdcch = &rarAlloc->rarPdcchCfg;
485 PdschCfg *pdsch = &rarAlloc->rarPdschCfg;
486 BwpCfg *bwp = &rarAlloc->bwp;
488 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
490 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
491 numRbs = coresetIdxTable[coreset0Idx][1];
492 numSymbols = coresetIdxTable[coreset0Idx][2];
493 offset = coresetIdxTable[coreset0Idx][3];
495 /* calculate time domain parameters */
496 // note: since slot value is made sl1, RAR can be sent at all slots
497 uint16_t mask = 0x2000;
498 for(firstSymbol=0; firstSymbol<14;firstSymbol++)
500 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
506 /* calculate the PRBs */
507 freqDomRscAllocType0(((cell->cellCfg.ssbSchCfg.ssbOffsetPointA - offset)/6), (numRbs/6), FreqDomainResource);
510 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
511 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
512 bwp->subcarrierSpacing = initialBwp->bwp.scs;
513 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
515 /* fill the PDCCH PDU */
516 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
517 pdcch->coresetCfg.durationSymbols = numSymbols;
518 memcpy(pdcch->coresetCfg.freqDomainResource, FreqDomainResource, FREQ_DOM_RSRC_SIZE);
519 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
520 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
521 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
522 pdcch->coresetCfg.coreSetType = 0;
523 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
524 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
526 pdcch->dci.rnti = cell->raReq[ueIdx]->raRnti; /* RA-RNTI */
527 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
528 pdcch->dci.scramblingRnti = 0;
529 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
530 pdcch->dci.aggregLevel = 4;
531 pdcch->dci.beamPdcchInfo.numPrgs = 1;
532 pdcch->dci.beamPdcchInfo.prgSize = 1;
533 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
534 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
535 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
536 pdcch->dci.txPdcchPower.powerValue = 0;
537 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
538 pdcch->dci.pdschCfg = pdsch;
540 /* fill the PDSCH PDU */
542 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
543 pdsch->rnti = cell->raReq[ueIdx]->raRnti; /* RA-RNTI */
545 pdsch->numCodewords = 1;
546 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
548 pdsch->codeword[cwCount].targetCodeRate = 308;
549 pdsch->codeword[cwCount].qamModOrder = 2;
550 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
551 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
552 pdsch->codeword[cwCount].rvIndex = 0;
553 /* RAR PDU length and FAPI payload header length */
554 tbSize = schCalcTbSize(RAR_PAYLOAD_SIZE + TX_PAYLOAD_HDR_LEN);
555 pdsch->codeword[cwCount].tbSize = tbSize;
557 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
558 pdsch->numLayers = 1;
559 pdsch->transmissionScheme = 0;
561 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
562 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
563 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
564 pdsch->dmrs.scid = 0;
565 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
566 pdsch->dmrs.dmrsPorts = 0;
567 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
568 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
569 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
571 pdsch->pdschTimeAlloc.timeAlloc.startSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].startSymbol;
572 pdsch->pdschTimeAlloc.timeAlloc.numSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol;
574 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
575 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
576 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
577 pdsch->pdschFreqAlloc.freqAlloc.numPrb = \
578 schCalcNumPrb(tbSize, mcs, initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol);
580 /* Allocate the number of PRBs required for RAR PDSCH */
581 if((allocatePrbDl(cell, rarTime, pdsch->pdschTimeAlloc.timeAlloc.startSymb, pdsch->pdschTimeAlloc.timeAlloc.numSymb,\
582 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
584 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for RAR");
588 pdsch->beamPdschInfo.numPrgs = 1;
589 pdsch->beamPdschInfo.prgSize = 1;
590 pdsch->beamPdschInfo.digBfInterfaces = 0;
591 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
592 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
593 pdsch->txPdschPower.powerControlOffset = 0;
594 pdsch->txPdschPower.powerControlOffsetSS = 0;
599 /**********************************************************************
601 **********************************************************************/