1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for rach handling functions
29 **********************************************************************/
32 @brief This file implements the rach handling.
34 #include "common_def.h"
40 #include "du_app_mac_inf.h"
41 #include "mac_sch_interface.h"
43 #include "sch_utils.h"
45 SchCb schCb[SCH_MAX_INST];
46 uint8_t puschDeltaTable[MAX_MU_PUSCH];
49 * @brief calculate ra-rnti function.
53 * Function : calculateRaRnti
55 * This function calculates ra-rnti
57 * @param[in] symbol index
58 * @param[in] slot index
59 * @param[in] frequency index
62 uint16_t calculateRaRnti(uint8_t symbolIdx, uint8_t slotIdx, uint8_t freqIdx)
65 uint8_t ulCarrierIdx = 0; /* configured to 0 */
67 raRnti = (1+symbolIdx+(14*slotIdx)+(14*80*freqIdx)+(14*80*8*ulCarrierIdx));
73 * @brief create raCb function.
77 * Function : createSchRaCb
79 * This function create raCb
82 * @param[in] shed instance
85 void createSchRaCb(uint16_t tcrnti, Inst schInst)
89 GET_UE_IDX(tcrnti, ueIdx);
90 schCb[schInst].cells[schInst]->raCb[ueIdx -1].tcrnti = tcrnti;
94 * @brief resource allocation for msg3 PUSCH
98 * Function : schAllocMsg3Pusch
100 * This function handles msg3 PUSCH allocation
102 * @param[in] Inst schInst, SCH instance
103 * @param[in] slot, current slot
104 * @param[out] msg3StartRb
105 * @param[out] msg3NumRb
108 uint8_t schAllocMsg3Pusch(Inst schInst, uint16_t slot, uint16_t crnti, \
109 uint16_t *msg3StartRb, uint8_t *msg3NumRb, uint16_t msg3SlotAlloc)
111 SchCellCb *cell = NULLP;
112 SchUlSlotInfo *schUlSlotInfo = NULLP;
113 uint8_t startSymb = 0;
119 uint8_t numPdschSymbols= 14;
122 cell = schCb[schInst].cells[schInst];
123 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[0].startSymbol;
124 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[0].symbolLength;
126 startRb = cell->schUlSlotInfo[msg3SlotAlloc]->puschCurrentPrb;
127 tbSize = schCalcTbSize(8); /* 6 bytes msg3 and 2 bytes header */
128 numRb = schCalcNumPrb(tbSize, mcs, numPdschSymbols);
130 /* allocating 1 extra RB for now */
132 /* increment PUSCH PRB */
133 cell->schUlSlotInfo[msg3SlotAlloc]->puschCurrentPrb += numRb;
135 for(idx=startSymb; idx<symbLen; idx++)
137 cell->schUlSlotInfo[msg3SlotAlloc]->assignedPrb[idx] = startRb + numRb;
139 schUlSlotInfo = cell->schUlSlotInfo[msg3SlotAlloc];
141 SCH_ALLOC(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
142 if(!schUlSlotInfo->schPuschInfo)
144 DU_LOG("\nERROR --> SCH : Memory allocation failed in schAllocMsg3Pusch");
147 tbSize = 0; /* since nPrb has been incremented, recalculating tbSize */
148 tbSize = schCalcTbSizeFromNPrb(numRb, mcs, numPdschSymbols);
149 tbSize = tbSize/8;/*bits to byte conversion*/
150 schUlSlotInfo->schPuschInfo->crnti = crnti;
151 schUlSlotInfo->schPuschInfo->harqProcId = SCH_HARQ_PROC_ID;
152 schUlSlotInfo->schPuschInfo->resAllocType = SCH_ALLOC_TYPE_1;
153 schUlSlotInfo->schPuschInfo->fdAlloc.startPrb = startRb;
154 schUlSlotInfo->schPuschInfo->fdAlloc.numPrb = numRb;
155 schUlSlotInfo->schPuschInfo->tdAlloc.startSymb = startSymb;
156 schUlSlotInfo->schPuschInfo->tdAlloc.numSymb = symbLen;
157 schUlSlotInfo->schPuschInfo->tbInfo.qamOrder = 2; /* QPSK modulation */
158 schUlSlotInfo->schPuschInfo->tbInfo.mcs = mcs;
159 schUlSlotInfo->schPuschInfo->tbInfo.mcsTable = SCH_MCS_TABLE_QAM_64;
160 schUlSlotInfo->schPuschInfo->tbInfo.ndi = 1; /* new transmission */
161 schUlSlotInfo->schPuschInfo->tbInfo.rv = 0;
162 schUlSlotInfo->schPuschInfo->tbInfo.tbSize = tbSize; /*Considering 2 PRBs */
163 schUlSlotInfo->schPuschInfo->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */
164 schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
165 schUlSlotInfo->schPuschInfo->dmrsAddPos = DMRS_ADDITIONAL_POS;
167 *msg3StartRb = startRb;
175 * @brief process rach indication function.
179 * Function : schProcessRachInd
181 * This function process rach indication
183 * @param[in] rachInd parameters
184 * @param[in] shed instance
187 uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst)
189 SchCellCb *cell = schCb[schInst].cells[schInst];
190 RarInfo *rarInfo = NULLP;
192 uint16_t rarSlot = 0;
193 uint16_t msg3StartRb;
199 uint16_t msg3Slot = 0;
201 uint16_t slotIdx = 0;
204 //puschMu = cell->cellCfg.puschMu;
205 delta = puschDeltaTable[puschMu];
206 k2 = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[0].k2;
207 /* RAR will sent with a delay of RAR_DELAY */
208 rarSlot = (rachInd->timingInfo.slot+RAR_DELAY+PHY_DELTA_DL)%cell->numSlots;
210 for(slotIdx=0; slotIdx<cell->numSlots;slotIdx++)
212 /* Slot allocation for msg3 based on 38.214 section 6.1.2.1 */
213 msg3Slot = (rarSlot+delta+k2)%cell->numSlots;
215 if((schGetSlotSymbFrmt(rarSlot, cell->slotFrmtBitMap) != DL_SLOT) &&\
216 (schGetSlotSymbFrmt(msg3Slot, cell->slotFrmtBitMap) != UL_SLOT))
218 rarSlot = (rarSlot + 1) % cell->numSlots;
223 if(slotIdx>=cell->numSlots)
225 DU_LOG("\nERROR --> SCH : NO Slot for Msg2 with Msg3 Grant\n");
229 /* Slot allocation for msg3 based on 38.214 section 6.1.2.1 */
230 msg3Slot = rarSlot + k2 + delta;
231 msg3Slot = msg3Slot % cell->numSlots;
234 SchDlSlotInfo *schDlSlotInfo = cell->schDlSlotInfo[rarSlot]; /* RAR will sent in the next slot */
236 /* Allocate the rarInfo, this pointer will be checked at schProcessSlotInd function */
237 SCH_ALLOC(rarInfo, sizeof(RarInfo));
240 DU_LOG("\nERROR --> SCH : Memory Allocation failed for rarInfo");
244 schDlSlotInfo->rarInfo = rarInfo;
246 /* calculate the ra-rnti value */
247 raRnti = calculateRaRnti(rachInd->symbolIdx,rachInd->slotIdx,rachInd->freqIdx);
249 /* create raCb at SCH */
250 createSchRaCb(rachInd->crnti,schInst);
252 /* allocate resources for msg3 */
253 ret = schAllocMsg3Pusch(schInst, rarSlot, rachInd->crnti, &msg3StartRb, &msg3NumRb, msg3Slot);
257 rarInfo->raRnti = raRnti;
258 rarInfo->tcrnti = rachInd->crnti;
259 rarInfo->RAPID = rachInd->preambleIdx;
260 rarInfo->ta = rachInd->timingAdv;
261 rarInfo->msg3FreqAlloc.startPrb = msg3StartRb;
262 rarInfo->msg3FreqAlloc.numPrb = msg3NumRb;
268 * @brief fill RAR info function.
272 * Function : calculateRaRnti
274 * This function fills pdcch and pdsch info for RAR
276 * @param[in] rar Allocation info
279 * @param[in] offset to pointA to determine freq alloc
282 uint8_t schFillRar(RarAlloc *rarAlloc, uint16_t raRnti, uint16_t pci, uint8_t offsetPointA, \
283 bool ssbPresent, bool sib1Present)
286 uint8_t coreset0Idx = 0;
288 uint8_t firstSymbol = 0;
289 uint8_t numSymbols = 0;
291 uint8_t FreqDomainResource[6] = {0};
293 uint8_t mcs = 4; /* MCS fixed to 4 */
295 SchBwpDlCfg *initialBwp = &schCb[inst].cells[inst]->cellCfg.schInitialDlBwp;
296 PdcchCfg *pdcch = &rarAlloc->rarPdcchCfg;
297 PdschCfg *pdsch = &rarAlloc->rarPdschCfg;
298 BwpCfg *bwp = &rarAlloc->bwp;
299 FreqDomainAlloc *sib1PdschFreqAlloc = NULL;
301 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
303 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
304 numRbs = coresetIdxTable[coreset0Idx][1];
305 numSymbols = coresetIdxTable[coreset0Idx][2];
306 offset = coresetIdxTable[coreset0Idx][3];
308 /* calculate time domain parameters */
309 // note: since slot value is made sl1, RAR can be sent at all slots
310 uint16_t mask = 0x2000;
311 for(firstSymbol=0; firstSymbol<14;firstSymbol++)
313 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
319 /* calculate the PRBs */
320 freqDomRscAllocType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
323 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
324 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
325 bwp->subcarrierSpacing = initialBwp->bwp.scs;
326 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
328 /* fill the PDCCH PDU */
329 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
330 pdcch->coresetCfg.durationSymbols = numSymbols;
331 memcpy(pdcch->coresetCfg.freqDomainResource, FreqDomainResource, FREQ_DOM_RSRC_SIZE);
332 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
333 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
334 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
335 pdcch->coresetCfg.coreSetType = 0;
336 pdcch->coresetCfg.shiftIndex = pci;
337 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
339 pdcch->dci.rnti = raRnti; /* RA-RNTI */
340 pdcch->dci.scramblingId = pci;
341 pdcch->dci.scramblingRnti = 0;
342 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
343 pdcch->dci.aggregLevel = 4;
344 pdcch->dci.beamPdcchInfo.numPrgs = 1;
345 pdcch->dci.beamPdcchInfo.prgSize = 1;
346 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
347 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
348 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
349 pdcch->dci.txPdcchPower.powerValue = 0;
350 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
351 pdcch->dci.pdschCfg = pdsch;
353 /* fill the PDSCH PDU */
355 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
356 pdsch->rnti = raRnti; /* RA-RNTI */
358 pdsch->numCodewords = 1;
359 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
361 pdsch->codeword[cwCount].targetCodeRate = 308;
362 pdsch->codeword[cwCount].qamModOrder = 2;
363 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
364 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
365 pdsch->codeword[cwCount].rvIndex = 0;
366 /* RAR PDU length and FAPI payload header length */
367 tbSize = schCalcTbSize(RAR_PAYLOAD_SIZE + TX_PAYLOAD_HDR_LEN);
368 pdsch->codeword[cwCount].tbSize = tbSize;
370 pdsch->dataScramblingId = pci;
371 pdsch->numLayers = 1;
372 pdsch->transmissionScheme = 0;
374 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
375 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
376 pdsch->dmrs.dlDmrsScramblingId = pci;
377 pdsch->dmrs.scid = 0;
378 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
379 pdsch->dmrs.dmrsPorts = 0;
380 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
381 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
382 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
383 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
384 /* The RB numbering starts from coreset0 */
385 pdsch->pdschFreqAlloc.freqAlloc.startPrb = PDSCH_START_RB;
388 /* PDSCH is always above SSB */
389 pdsch->pdschFreqAlloc.freqAlloc.startPrb = offsetPointA + SCH_SSB_NUM_PRB + 1;
393 /* Must not overlap with SIB1 */
394 sib1PdschFreqAlloc = &schCb[inst].cells[inst]->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
395 pdsch->pdschFreqAlloc.freqAlloc.startPrb = sib1PdschFreqAlloc->startPrb + sib1PdschFreqAlloc->numPrb + 1;
397 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, \
398 initialBwp->pdschCommon.timeDomRsrcAllocList[0].lengthSymbol);
399 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
400 pdsch->pdschTimeAlloc.timeAlloc.startSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[0].startSymbol;
401 pdsch->pdschTimeAlloc.timeAlloc.numSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[0].lengthSymbol;
402 pdsch->beamPdschInfo.numPrgs = 1;
403 pdsch->beamPdschInfo.prgSize = 1;
404 pdsch->beamPdschInfo.digBfInterfaces = 0;
405 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
406 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
407 pdsch->txPdschPower.powerControlOffset = 0;
408 pdsch->txPdschPower.powerControlOffsetSS = 0;
413 /**********************************************************************
415 **********************************************************************/