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3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
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19 /************************************************************************
25 Desc: C source code for rach handling functions
29 **********************************************************************/
32 @brief This file implements the rach handling.
34 #include "common_def.h"
40 #include "du_app_mac_inf.h"
41 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
47 * @brief Checks if PRACH can be scheduled in current slot
51 * Function : schCheckPrachOcc
53 * This function checks if PRACH can be scheduled in
61 bool schCheckPrachOcc(SchCellCb *cell, SlotTimingInfo prachOccasionTimingInfo)
63 uint8_t prachCfgIdx = 0;
67 uint16_t prachSubframe = 0;
69 prachCfgIdx = cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.prachCfgIdx;
71 /* derive the prachCfgIdx table paramters */
72 x = prachCfgIdxTable[prachCfgIdx][1];
73 y = prachCfgIdxTable[prachCfgIdx][2];
74 prachSubframe = prachCfgIdxTable[prachCfgIdx][3];
76 if((prachOccasionTimingInfo.sfn%x) == y)
78 subFrame = prachOccasionTimingInfo.slot/pow(2, cell->numerology);
80 /* check for subFrame number */
81 if ((1 << subFrame) & prachSubframe)
83 /* prach ocassion present in this subframe */
85 if(UL_SLOT != schGetSlotSymbFrmt(prachOccasionTimingInfo.slot % cell->numSlotsInPeriodicity,\
86 cell->slotFrmtBitMap))
88 DU_LOG("\nERROR --> SCH : PrachCfgIdx %d doesn't support UL slot", prachCfgIdx);
99 * @brief Calculate number of PRBs to be allocated for PRACH
103 * Function : schCalcPrachNumRb
105 * Calculate number of PRBs to be allocated for PRACH
107 * @param[in] SchCellCb *cell, cell cb
108 * @return Number of PRBs
110 uint8_t schCalcPrachNumRb(SchCellCb *cell)
112 uint8_t tableIdx = 0;
113 uint16_t puschScs = convertScsEnumValToScsVal(cell->cellCfg.ulCfgCommon.schInitialUlBwp.bwp.scs);
115 for(tableIdx=0; tableIdx < MAX_RACH_NUM_RB_IDX; tableIdx++)
117 if((numRbForPrachTable[tableIdx][0] == cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.rootSeqLen) &&
118 (numRbForPrachTable[tableIdx][1] == cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.msg1SubcSpacing) &&
119 (numRbForPrachTable[tableIdx][2] == puschScs))
121 return numRbForPrachTable[tableIdx][3];
128 * @brief resource allocation for PRACH
132 * Function : schPrachResAlloc
134 * This function handles PRACH allocation
136 * @param[in] SchCellCb *cell, cell cb
137 * @param[in] UlSchedInfo *ulSchedInfo, UL scheduling info
140 void schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotTimingInfo prachOccasionTimingInfo)
142 uint8_t numPrachRb = 0;
144 uint8_t prachCfgIdx = 0;
145 uint8_t prachFormat = 0;
146 uint8_t prachStartSymbol = 0;
147 uint8_t prachDuration = 0;
148 uint8_t prachOcas = 0;
149 uint8_t dataType = 0;
150 uint16_t freqStart = 0;
154 DU_LOG("\nERROR --> SCH : schPrachResAlloc(): Received cellCb is null");
158 /* If this slot is not a PRACH occassion, return */
159 if(!schCheckPrachOcc(cell, prachOccasionTimingInfo))
162 prachCfgIdx = cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.prachCfgIdx;
163 prachFormat = prachCfgIdxTable[prachCfgIdx][0];
164 prachStartSymbol = prachCfgIdxTable[prachCfgIdx][4];
165 prachOcas = prachCfgIdxTable[prachCfgIdx][6];
166 prachDuration = prachCfgIdxTable[prachCfgIdx][7];
168 /* numRa determined as 𝑛 belonging {0,1,.., M − 1},
169 * where M is given by msg1Fdm */
170 numRa = (cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.msg1Fdm - 1);
172 /* freq domain resource determination for RACH*/
173 freqStart = cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.msg1FreqStart;
174 numPrachRb = schCalcPrachNumRb(cell);
175 /* Allocate PRACH resources from the UL resource bitmap */
176 allocatePrbUl(cell, prachOccasionTimingInfo, prachStartSymbol, prachDuration, &freqStart, numPrachRb);
179 dataType |= SCH_DATATYPE_PRACH;
180 ulSchedInfo->dataType = dataType;
181 ulSchedInfo->prachSchInfo.numPrachOcas = prachOcas;
182 ulSchedInfo->prachSchInfo.prachFormat = prachFormat;
183 ulSchedInfo->prachSchInfo.numRa = numRa;
184 ulSchedInfo->prachSchInfo.prachStartSymb = prachStartSymbol;
185 DU_LOG("\nINFO --> SCH : RACH occassion set for slot %d", prachOccasionTimingInfo.slot);
189 * @brief Process RACH resource request for CFRA
193 * Function : SchProcRachRsrcReq
195 * This function processes RACH resorce request
196 * from MAC for CFRA. It assigns a dedicated preamble
197 * to the UE and sends the same in RACH resource
200 * @param[in] Post structure
201 * @param[in] RACH resource request
205 uint8_t SchProcRachRsrcReq(Pst *pst, SchRachRsrcReq *schRachRsrcReq)
207 uint8_t ssbIdx = 0, cfraSsbIdx = 0;
208 uint8_t firstCFPreambleIndex = 0, lastCFPreambleIndex = 0;
209 uint16_t cellIdx = 0;
212 Inst inst = pst->dstInst - SCH_INST_START;
213 SchCellCb *cellCb = NULLP;
214 SchUeCb *ueCb = NULLP;
215 SchRachRsrcRsp *rachRsrcRsp = NULLP;
217 DU_LOG("\nINFO --> SCH : Received RACH resource request for Cell ID [%d] CRNTI [%d]", \
218 schRachRsrcReq->cellId, schRachRsrcReq->crnti);
220 /* Fill RACH resource response to MAC */
221 SCH_ALLOC(rachRsrcRsp, sizeof(SchRachRsrcRsp));
224 DU_LOG("\nERROR --> SCH : Memory allocation failed for RACH resource response");
227 rachRsrcRsp->cellId = schRachRsrcReq->cellId;
228 rachRsrcRsp->crnti = schRachRsrcReq->crnti;
229 rachRsrcRsp->result = RSP_OK;
231 /* Fill SCH to MAC Pst structure */
232 memset(&rspPst, 0, sizeof(Pst));
233 FILL_PST_SCH_TO_MAC(rspPst, inst);
234 rspPst.event = EVENT_RACH_RESOURCE_RESPONSE_TO_MAC;
237 for(cellIdx = 0; cellIdx < MAX_NUM_CELL; cellIdx++)
239 if((schCb[inst].cells[cellIdx]) && (schCb[inst].cells[cellIdx]->cellId == schRachRsrcReq->cellId))
241 cellCb = schCb[inst].cells[cellIdx];
249 ueCb = schGetUeCb(cellCb, schRachRsrcReq->crnti);
250 if(ueCb->crnti != schRachRsrcReq->crnti)
252 DU_LOG("\nERROR --> SCH : CRNTI [%d] not found" ,schRachRsrcReq->crnti);
253 rachRsrcRsp->result = RSP_NOK;
258 DU_LOG("\nERROR --> SCH : Cell ID [%d] not found" ,schRachRsrcReq->cellId);
259 rachRsrcRsp->result = RSP_NOK;
262 /* Allocate SSB resource if no failure has occurred until this step */
263 if(rachRsrcRsp->result == RSP_OK)
265 /* Find first free preamble index from the pool CF preambles
266 * Preamble index from 0 to (numCbPreamblePerSsb-1) is used for CBRA
267 * Preamble index from numCbPreamblePerSsb to totalNumOfRAPreamble
268 * is used for CFRA */
269 firstCFPreambleIndex = cellCb->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.numCbPreamblePerSsb;
270 lastCFPreambleIndex = cellCb->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.totalNumRaPreamble;
272 /* Allocate resource for each SSB index requested */
273 for(ssbIdx = 0; ssbIdx < schRachRsrcReq->numSsb; ssbIdx++)
275 /* Find the first CF Preamble index not dedicated to any UE currently */
276 while(firstCFPreambleIndex <= lastCFPreambleIndex)
278 mask = 1 << firstCFPreambleIndex;
279 if(cellCb->dedPreambleBitMap & mask)
281 firstCFPreambleIndex++;
288 /* If firstCFPreambleIndex > lastCFPreambleIndex, it means all
289 * dedicated preambles are in use currently. In such a case, CBRA
290 * should be initiated.
291 * If a dedicated preamble is found, use this for CFRA and mark it as
292 * IN-USE in the bitmap.
293 * Considering only CFRA scenario for now. */
294 if(firstCFPreambleIndex <= lastCFPreambleIndex)
296 ueCb->cfraResource.ssbResource[cfraSsbIdx].ssbIdx = schRachRsrcReq->ssbIdx[ssbIdx];
297 ueCb->cfraResource.ssbResource[cfraSsbIdx].raPreambleIdx = firstCFPreambleIndex;
298 SET_ONE_BIT(firstCFPreambleIndex, cellCb->dedPreambleBitMap);
300 firstCFPreambleIndex++;
304 DU_LOG("\nINFO : SCH : No dedicated preameble availble to assign to ssbIdx[%d]", schRachRsrcReq->ssbIdx[ssbIdx]);
305 /* Breaking out of for loop since no dedicated preambles are available
306 * for remaining ssbIdx too */
311 ueCb->cfraResource.numSsb = cfraSsbIdx;
313 if(ueCb->cfraResource.numSsb == 0)
315 /* If numSsb is 0, it means no CFRA resource was alloacted for any of the
316 * SSB Idx, hence send a negative response */
317 rachRsrcRsp->result = RSP_NOK;
321 /* Send ssb resource information to MAC in RACH resource response */
322 rachRsrcRsp->cfraResource.numSsb = ueCb->cfraResource.numSsb;
323 memcpy(rachRsrcRsp->cfraResource.ssbResource, ueCb->cfraResource.ssbResource, \
324 ueCb->cfraResource.numSsb * sizeof(SchCfraSsbResource));
328 /* Free RACH resource request memory allocated by MAC */
329 SCH_FREE(schRachRsrcReq, sizeof(SchRachRsrcReq));
331 /* Send RACH resource response to MAC */
332 return(MacMessageRouter(&rspPst, (void *)rachRsrcRsp));
336 * @brief calculate ra-rnti function.
340 * Function : calculateRaRnti
342 * This function calculates ra-rnti
344 * @param[in] symbol index
345 * @param[in] slot index
346 * @param[in] frequency index
349 uint16_t calculateRaRnti(uint8_t symbolIdx, uint8_t slotIdx, uint8_t freqIdx)
352 uint8_t ulCarrierIdx = 0; /* Uplink carrier used for MSG1 transmission. 0:NUL carrier; 1:SUL carrier */
354 /* Refer to spec 38.321, section 5.1.3 */
355 raRnti = (1 + symbolIdx + (14*slotIdx) + (14*80*freqIdx) + (14*80*8*ulCarrierIdx));
360 * @brief create raCb function.
364 * Function : createSchRaCb
366 * This function create raCb
369 * @param[in] shed instance
372 void createSchRaCb(uint8_t ueId, SchRaReq *raReq, Inst schInst)
376 /* If a UE in handover has triggered CFRA, its UE CB context is already present in SCH,
377 * Hence, no need to create raCb */
378 if(raReq->ueCb && (raReq->ueCb->state == SCH_UE_HANDIN_IN_PROGRESS))
380 schCb[schInst].cells[schInst]->numActvUe++;
381 SET_ONE_BIT(raReq->ueCb->ueId, schCb[schInst].cells[schInst]->actvUeBitMap);
382 raReq->ueCb->state = SCH_UE_STATE_ACTIVE;
383 schCb[schInst].cells[schInst]->raCb[ueId -1].raState = SCH_RA_STATE_MSG4_DONE;
388 /* Create RA CB only for CB-RA to use for msg3 and msg4 processing */
389 GET_UE_ID(raReq->rachInd->crnti, ueId);
390 schCb[schInst].cells[schInst]->raCb[ueId -1].tcrnti = raReq->rachInd->crnti;
391 schCb[schInst].cells[schInst]->raCb[ueId -1].msg4recvd = FALSE;
392 schCb[schInst].cells[schInst]->raCb[ueId -1].raState = SCH_RA_STATE_MSG3_PENDING;
394 schCb[schInst].cells[schInst]->raCb[ueId -1].cell = schCb[schInst].cells[schInst];
398 * @brief resource allocation for msg3 PUSCH
402 * Function : schAllocMsg3Pusch
404 * This function handles msg3 PUSCH allocation
406 * @param[in] Inst schInst, SCH instance
407 * @param[in] slot, current slot
408 * @param[out] msg3StartRb
409 * @param[out] msg3NumRb
412 SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, SlotTimingInfo msg3SlotTime, SchUlHqProcCb* msg3HqProc, bool isRetx)
414 SchCellCb *cell = NULLP;
415 SchUlSlotInfo *schUlSlotInfo = NULLP;
416 uint8_t mcs = DEFAULT_MCS;
417 uint8_t startSymb = 0, ueId = 0;
419 uint16_t startRb = 0;
423 cell = schCb[schInst].cells[schInst];
426 DU_LOG("\n\nERROR --> SCH : Failed to find cell in schAllocMsg3Pusch");
430 GET_UE_ID(crnti, ueId);
431 /* Allocate time-domain and frequency-domain resource for MSG3 PUSCH */
432 startSymb = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
433 symbLen = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
435 startRb = MAX_NUM_RB;
436 tbSize = schCalcTbSize(8); /* 6 bytes msg3 and 2 bytes header */
437 numRb = schCalcNumPrb(tbSize, mcs, symbLen);
438 numRb++; /* allocating 1 extra RB for now */
439 allocatePrbUl(cell, msg3SlotTime, startSymb, symbLen, &startRb, numRb);
441 /* Fill PUSCH scheduling details in Slot structure */
442 schUlSlotInfo = cell->schUlSlotInfo[msg3SlotTime.slot];
443 SCH_ALLOC(schUlSlotInfo->schPuschInfo[ueId - 1], sizeof(SchPuschInfo));
444 if(!schUlSlotInfo->schPuschInfo[ueId - 1])
446 DU_LOG("\nERROR --> SCH : Memory allocation failed in schAllocMsg3Pusch");
449 cell->schUlSlotInfo[msg3SlotTime.slot]->puschPres = true;
450 tbSize = 0; /* since nPrb has been incremented, recalculating tbSize */
451 tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL);
452 tbSize = tbSize / 8 ; /*bits to byte conversion*/
454 schUlSlotInfo->schPuschInfo[ueId - 1]->harqProcId = msg3HqProc->procId;
455 schUlSlotInfo->schPuschInfo[ueId - 1]->crnti = crnti;
456 schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAllocType = SCH_ALLOC_TYPE_1;
457 schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAlloc.type1.startPrb = startRb;
458 schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAlloc.type1.numPrb = numRb;
459 schUlSlotInfo->schPuschInfo[ueId - 1]->tdAlloc.startSymb = startSymb;
460 schUlSlotInfo->schPuschInfo[ueId - 1]->tdAlloc.numSymb = symbLen;
461 schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.qamOrder = QPSK_MODULATION; /* QPSK modulation */
462 schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.mcs = mcs;
463 schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.mcsTable = SCH_MCS_TABLE_QAM_64;
464 schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.ndi = NEW_TRANSMISSION; /* new transmission */
465 schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.rv = 0;
466 schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.tbSize = tbSize;
468 schUlSlotInfo->schPuschInfo[ueId - 1]->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */
469 schUlSlotInfo->schPuschInfo[ueId - 1]->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
470 schUlSlotInfo->schPuschInfo[ueId - 1]->dmrsAddPos = DMRS_ADDITIONAL_POS;
475 msg3HqProc->strtSymbl = startSymb;
476 msg3HqProc->numSymbl = symbLen;
477 msg3HqProc->puschResType = schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAllocType;
478 msg3HqProc->puschStartPrb = schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAlloc.type1.startPrb;
479 msg3HqProc->puschNumPrb = schUlSlotInfo->schPuschInfo[ueId - 1]->fdAlloc.resAlloc.type1.numPrb;
480 msg3HqProc->tbInfo.qamOrder = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.qamOrder;
481 msg3HqProc->tbInfo.iMcs = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.mcs;
482 msg3HqProc->tbInfo.mcsTable = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.mcsTable;
483 msg3HqProc->tbInfo.ndi = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.ndi;
484 msg3HqProc->tbInfo.rv = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.rv;
485 msg3HqProc->tbInfo.tbSzReq = schUlSlotInfo->schPuschInfo[ueId - 1]->tbInfo.tbSize;
487 msg3HqProc->dmrsMappingType = schUlSlotInfo->schPuschInfo[ueId - 1]->dmrsMappingType;
488 msg3HqProc->nrOfDmrsSymbols = schUlSlotInfo->schPuschInfo[ueId - 1]->nrOfDmrsSymbols;
489 msg3HqProc->dmrsAddPos = schUlSlotInfo->schPuschInfo[ueId - 1]->dmrsAddPos;
492 return schUlSlotInfo->schPuschInfo[ueId - 1];
496 * @brief Check if a time frame is in RA Response window
500 * Function : isInRaRspWindow
502 * Check if a time frame is in RA Response window
504 * @param[in] RA request
505 * @param[in] Time frame to check
506 * @param[in] Total number of slot per radio frame
510 RaRspWindowStatus isInRaRspWindow(SchRaReq *raReq, SlotTimingInfo frameToCheck, uint16_t numSlotsPerSystemFrame)
512 uint32_t winStartTime, winEndTime, timeToCheck;
514 winStartTime = (raReq->winStartTime.sfn * numSlotsPerSystemFrame) + raReq->winStartTime.slot;
515 winEndTime = (raReq->winEndTime.sfn * numSlotsPerSystemFrame) + raReq->winEndTime.slot;
516 timeToCheck = (frameToCheck.sfn * numSlotsPerSystemFrame) + frameToCheck.slot;
518 /* TODO : check how to handle the wrap around scenario of MAX_SFN */
519 if((timeToCheck >= winStartTime) && (timeToCheck <= winEndTime))
520 return WITHIN_WINDOW;
521 else if(timeToCheck < winStartTime)
522 return WINDOW_YET_TO_START;
524 return WINDOW_EXPIRED;
528 * @brief Processes any pending RA request
532 * Function : schProcessRaReq
534 * This function process pending RA request
536 * @param[in] Current timing of the cell
539 bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
541 bool k1Found = false, k2Found = false;
542 uint8_t k0TblIdx = 0, k1TblIdx = 0, k2TblIdx = 0;
543 uint8_t k0Index = 0, k1Index = 0, k2Index = 0;
544 uint8_t k0 = 0, k1 = 0, k2 = 0;
545 uint8_t numK1 = 0, ret = OK;
547 uint8_t msg3Delta = 0, msg3MinSchTime = 0;
549 uint8_t totalCfgSlot = 0;
551 uint16_t dciSlot = 0, rarSlot = 0, crnti = 0;
552 SlotTimingInfo dciTime, rarTime, msg3Time, pucchTime;
553 RarAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for RAR */
554 RarAlloc *rarSlotAlloc = NULLP; /* Stores info for transmission of RAR PDSCH */
555 SchPuschInfo *msg3PuschInfo = NULLP; /* Stores MSG3 PUSCH scheduling information */
556 SchK0K1TimingInfoTbl *k0K1InfoTbl=NULLP;
557 SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
558 RaRspWindowStatus windowStatus=0;
560 GET_CRNTI(crnti, ueId);
562 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod);
564 k0K1InfoTbl = &cell->k0K1InfoTbl;
565 if(cell->raReq[ueId-1]->isCFRA == false)
567 msg3K2InfoTbl = &cell->msg3K2InfoTbl;
568 puschMu = cell->numerology;
569 msg3Delta = puschDeltaTable[puschMu];
570 msg3MinSchTime = minMsg3SchTime[cell->numerology];
573 /* Calculating time frame to send DCI for RAR */
574 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
575 dciSlot = dciTime.slot;
577 /* Consider this slot for sending DCI, only if it is a DL slot */
578 if(schGetSlotSymbFrmt(dciSlot, cell->slotFrmtBitMap) == DL_SLOT)
581 /* If PDCCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
582 if(cell->schDlSlotInfo[dciSlot]->pdcchUe != 0)
585 /* Check if this slot is within RA response window */
586 windowStatus = isInRaRspWindow(cell->raReq[ueId-1], dciTime, cell->numSlots);
587 if(windowStatus == WITHIN_WINDOW)
589 /* For all k0 values, search for a suitable k2 value to schedule MSG3.
590 * RAR DCI, RAR PDSCH and MSG3 is scheduled only if one such k0-k2 combination
591 * is found. Else no scheduling happens.
593 for(k0TblIdx = 0; k0TblIdx < k0K1InfoTbl->k0k1TimingInfo[dciSlot].numK0; k0TblIdx++)
595 k0Index = k0K1InfoTbl->k0k1TimingInfo[dciSlot].k0Indexes[k0TblIdx].k0Index;
596 k0 = cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
598 /* Calculating time frame to send RAR PDSCH */
599 ADD_DELTA_TO_TIME(dciTime, rarTime, k0, cell->numSlots);
600 rarSlot = rarTime.slot;
602 /* If Contention-FREE RA is in progress, allocate resources for
603 * PUCCH for next UL message */
604 if(cell->raReq[ueId-1]->isCFRA)
606 numK1 = k0K1InfoTbl->k0k1TimingInfo[dciTime.slot].k0Indexes[k0TblIdx].k1TimingInfo.numK1;
607 for(k1TblIdx = 0; k1TblIdx < numK1; k1TblIdx++)
609 k1Index = k0K1InfoTbl->k0k1TimingInfo[dciTime.slot].k0Indexes[k0TblIdx].k1TimingInfo.k1Indexes[k1TblIdx];
610 if(cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg.dlDataToUlAck)
612 k1 = cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg.dlDataToUlAck->\
613 dlDataToUlAckList[k1Index];
617 k1 = defaultUlAckTbl[k1Index];
620 ADD_DELTA_TO_TIME(rarTime, pucchTime, k1, cell->numSlots);
622 if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
625 /*In this pucchTime, this particular UE/CRNTI is already scheduled thus checking
626 * for next pucchTime for the same UE*/
627 if(cell->schUlSlotInfo[pucchTime.slot]->schPucchInfo[ueId - 1].crnti == crnti)
636 /* Else if contention-based RA is in progress, allocate resources for MSG3 */
637 for(k2TblIdx = 0; k2TblIdx < msg3K2InfoTbl->k2TimingInfo[rarSlot].numK2; k2TblIdx++)
639 k2Index = msg3K2InfoTbl->k2TimingInfo[rarSlot].k2Indexes[k2TblIdx];
640 k2 = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
642 /* Delta is added to the slot allocation for msg3 based on 38.214 section 6.1.2.1 */
644 if(k2 >= msg3MinSchTime)
646 ADD_DELTA_TO_TIME(rarTime, msg3Time, k2, cell->numSlots);
648 if(schGetSlotSymbFrmt(msg3Time.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
651 /* If PUSCH is already scheduled on this slot for this UE, another PUSCH
652 * pdu cannot be scheduled here for same UE*/
653 if((cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo[ueId - 1] != NULLP) && \
654 (cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo[ueId - 1]->crnti == crnti))
662 if(k1Found || k2Found)
666 else if(windowStatus == WINDOW_EXPIRED)
668 SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo));
669 SCH_FREE(cell->raReq[ueId-1], sizeof(SchRaReq));
673 /* If K0-K2 and K0-K1 combination not found, no scheduling happens */
674 if(!k1Found && !k2Found)
677 /* Allocate memory for RAR PDCCH slot, pointer will be checked at schProcessSlotInd() */
678 SCH_ALLOC(dciSlotAlloc, sizeof(RarAlloc));
679 if(dciSlotAlloc == NULLP)
681 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
684 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = dciSlotAlloc;
686 /* Fill PDCCH and PDSCH scheduling information for RAR */
687 if((schFillRar(cell, rarTime, ueId, dciSlotAlloc, k0Index)) != ROK)
689 DU_LOG("\nERROR --> SCH: Scheduling of RAR failed in slot [%d]", rarSlot);
690 if(!dciSlotAlloc->rarPdschCfg)
692 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
693 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP;
699 dciSlotAlloc->raRnti = cell->raReq[ueId-1]->raRnti;
700 dciSlotAlloc->rarInfo.tcrnti = cell->raReq[ueId-1]->rachInd->crnti;
701 dciSlotAlloc->rarInfo.RAPID = cell->raReq[ueId-1]->rachInd->preambleIdx;
702 dciSlotAlloc->rarInfo.ta = cell->raReq[ueId-1]->rachInd->timingAdv;
704 if(cell->raReq[ueId-1]->isCFRA)
706 cell->schUlSlotInfo[pucchTime.slot]->schPucchInfo[ueId - 1].crnti = crnti;
707 /* Allocate resources for PUCCH */
708 ret = schAllocPucchResource(cell, ueId, pucchTime, NULLP, NULLP, NULLP);
711 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
712 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP;
713 DU_LOG("\nERROR --> SCH : Resource allocation for PUCCH failed for CFRA!");
720 /* Allocate resources for msg3 */
721 msg3PuschInfo = schAllocMsg3Pusch(schInst, cell->raReq[ueId-1]->rachInd->crnti, k2Index, msg3Time, &(cell->raCb[ueId-1].msg3HqProc), FALSE);
724 dciSlotAlloc->rarInfo.ulGrant.bwpSize = cell->cellCfg.ulCfgCommon.schInitialUlBwp.bwp.freqAlloc.numPrb;
725 /* Spec 38.213, section 8.2, 0 : MSG3 PUSCH will be transmitted without frequency hopping */
726 dciSlotAlloc->rarInfo.ulGrant.freqHopFlag = 0;
727 dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.startPrb = msg3PuschInfo->fdAlloc.resAlloc.type1.startPrb;
728 dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.numPrb = msg3PuschInfo->fdAlloc.resAlloc.type1.numPrb;
729 dciSlotAlloc->rarInfo.ulGrant.k2Index = k2Index;
730 dciSlotAlloc->rarInfo.ulGrant.mcs = msg3PuschInfo->tbInfo.mcs;
731 dciSlotAlloc->rarInfo.ulGrant.tpc = 3; /* TODO : Check appropriate value to be filled */
732 /* Spec 38.213, section 8.2 : In a contention based random access
733 * procedure, the CSI request field is reserved. */
734 dciSlotAlloc->rarInfo.ulGrant.csiReq = 0;
738 /* Check if both DCI and RAR are sent in the same slot.
739 * If not, allocate memory RAR PDSCH slot to store RAR info
741 if(dciSlot == rarSlot)
743 SCH_ALLOC(dciSlotAlloc->rarPdschCfg, sizeof(PdschCfg));
744 if(dciSlotAlloc->rarPdschCfg)
746 memcpy(dciSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci[0].pdschCfg, sizeof(PdschCfg));
750 SCH_FREE(dciSlotAlloc->rarPdcchCfg, sizeof(PdcchCfg));
751 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
752 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP;
753 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc->rarPdschCfg");
760 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
761 SCH_ALLOC(rarSlotAlloc, sizeof(RarAlloc));
762 if(rarSlotAlloc == NULLP)
764 DU_LOG("\nERROR --> SCH : Memory Allocation failed for rarSlotAlloc");
765 SCH_FREE(dciSlotAlloc->rarPdcchCfg, sizeof(PdcchCfg));
766 if(!dciSlotAlloc->rarPdschCfg)
768 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
769 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP;
773 cell->schDlSlotInfo[rarSlot]->rarAlloc[ueId-1] = rarSlotAlloc;
775 /* Copy all RAR info */
776 rarSlotAlloc->raRnti = dciSlotAlloc->raRnti;
777 rarSlotAlloc->bwp = dciSlotAlloc->bwp;
778 SCH_ALLOC(rarSlotAlloc->rarPdschCfg, sizeof(PdschCfg));
779 if(rarSlotAlloc->rarPdschCfg)
781 memcpy(rarSlotAlloc->rarPdschCfg, &dciSlotAlloc->rarPdcchCfg->dci[0].pdschCfg,sizeof(PdschCfg));
785 DU_LOG("\nERROR --> SCH : Memory Allocation failed for rarSlotAlloc->rarPdschCfg");
786 SCH_FREE(dciSlotAlloc->rarPdcchCfg, sizeof(PdcchCfg));
787 if(!dciSlotAlloc->rarPdschCfg)
789 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
790 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP;
792 SCH_FREE(rarSlotAlloc, sizeof(RarAlloc));
793 cell->schDlSlotInfo[rarSlot]->rarAlloc[ueId-1] = NULLP;
798 cell->schDlSlotInfo[dciSlot]->pdcchUe = ueId;
800 /* Create raCb at SCH */
801 createSchRaCb(ueId, cell->raReq[ueId-1], schInst);
803 /* Remove RachInd from pending RA request list */
804 SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo));
805 SCH_FREE(cell->raReq[ueId-1], sizeof(SchRaReq));
813 * @brief process rach indication function.
817 * Function : SchProcRachInd
819 * This function process rach indication
821 * @param[in] rachInd parameters
822 * @param[in] shed instance
825 uint8_t SchProcRachInd(Pst *pst, RachIndInfo *rachInd)
827 SchRaReq *raReq = NULLP;
831 Inst schInst = pst->dstInst-SCH_INST_START;
832 SchCellCb *cell = schCb[schInst].cells[schInst];
834 DU_LOG("\nINFO --> SCH : Received Rach indication");
838 DU_LOG("\nERROR --> SCH: Failed to find cell in SchProcRachInd");
842 /* Storing RA request in cellCb */
843 GET_UE_ID(rachInd->crnti, ueId);
846 DU_LOG("\nERROR --> SCH: Invalid CRNTI [%d]", rachInd->crnti);
850 SCH_ALLOC(raReq, sizeof(SchRaReq));
853 DU_LOG("\nERROR --> SCH : Memory allocation failure in SchProcRachInd");
854 SCH_FREE(rachInd, sizeof(RachIndInfo));
858 /* calculate the ra-rnti value */
859 raReq->raRnti = calculateRaRnti(rachInd->symbolIdx, rachInd->slotIdx, rachInd->freqIdx);
860 raReq->rachInd = rachInd;
861 if((cell->ueCb[ueId-1].crnti == rachInd->crnti) && (cell->ueCb[ueId-1].state == SCH_UE_HANDIN_IN_PROGRESS))
863 raReq->isCFRA = true;
864 raReq->ueCb = &cell->ueCb[ueId-1];
867 raReq->isCFRA = false;
868 raReq->winStartTime.sfn = rachInd->timingInfo.sfn;
869 raReq->winStartTime.slot = rachInd->timingInfo.slot;
871 /* Converting window size from ms to number of slots */
872 slotDuration = (1 / pow(2, cell->numerology));
873 winNumSlots = (float)cell->cellCfg.ulCfgCommon.schInitialUlBwp.schRachCfg.prachCfgGeneric.raRspWindow / slotDuration;
875 /* Adding window size to window start time to get window end time */
876 ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots, cell->numSlots);
877 cell->raReq[ueId -1] = raReq;
879 /* Adding UE Id to list of pending UEs to be scheduled */
880 cell->api->SchRachInd(cell, ueId);
885 * @brief fill RAR info function.
889 * Function : calculateRaRnti
891 * This function fills pdcch and pdsch info for RAR
893 * @param[in] rar Allocation info
896 * @param[in] offset to pointA to determine freq alloc
899 uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAlloc *rarAlloc, uint8_t k0Index)
901 uint8_t coreset0Idx = 0;
902 uint8_t firstSymbol = 0, numSymbols = 0;
903 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
904 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
909 SchBwpDlCfg *initialBwp = &cell->cellCfg.dlCfgCommon.schInitialDlBwp;
910 SCH_ALLOC(rarAlloc->rarPdcchCfg, sizeof(PdcchCfg));
911 if(rarAlloc->rarPdcchCfg == NULLP)
913 DU_LOG("\nERROR --> SCH : Memory allocation failed in %s",__func__);
916 PdcchCfg *pdcch = rarAlloc->rarPdcchCfg;
917 BwpCfg *bwp = &rarAlloc->bwp;
919 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
920 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
921 numRbs = coresetIdxTable[coreset0Idx][1];
922 numSymbols = coresetIdxTable[coreset0Idx][2];
924 /* calculate time domain parameters */
925 // note: since slot value is made sl1, RAR can be sent at all slots
926 uint16_t mask = 0x2000;
927 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
929 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
936 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
937 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
938 bwp->subcarrierSpacing = initialBwp->bwp.scs;
939 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
941 /* fill the PDCCH PDU */
942 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
943 pdcch->coresetCfg.durationSymbols = numSymbols;
944 memcpy(pdcch->coresetCfg.freqDomainResource, \
945 cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
947 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
948 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
949 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
950 pdcch->coresetCfg.coreSetType = 0;
951 pdcch->coresetCfg.coreSetSize = numRbs;
952 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
953 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
955 pdcch->dci[0].rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */
956 pdcch->dci[0].scramblingId = cell->cellCfg.phyCellId;
957 pdcch->dci[0].scramblingRnti = 0;
958 pdcch->dci[0].cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
959 pdcch->dci[0].aggregLevel = 4;
960 pdcch->dci[0].beamPdcchInfo.numPrgs = 1;
961 pdcch->dci[0].beamPdcchInfo.prgSize = 1;
962 pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 0;
963 pdcch->dci[0].beamPdcchInfo.prg[0].pmIdx = 0;
964 pdcch->dci[0].beamPdcchInfo.prg[0].beamIdx[0] = 0;
965 pdcch->dci[0].txPdcchPower.beta_pdcch_1_0 = 0;
966 pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0;
968 pdsch = &pdcch->dci[0].pdschCfg;
969 /* fill the PDSCH PDU */
971 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
972 pdsch->rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */
974 pdsch->numCodewords = 1;
975 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
977 pdsch->codeword[cwCount].targetCodeRate = 308;
978 pdsch->codeword[cwCount].qamModOrder = 2;
979 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
980 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
981 pdsch->codeword[cwCount].rvIndex = 0;
982 /* RAR PDU length and FAPI payload header length */
983 tbSize = schCalcTbSize(RAR_PAYLOAD_SIZE + TX_PAYLOAD_HDR_LEN);
984 pdsch->codeword[cwCount].tbSize = tbSize;
986 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
987 pdsch->numLayers = 1;
988 pdsch->transmissionScheme = 0;
990 pdsch->dmrs.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
991 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
992 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
993 pdsch->dmrs.scid = 0;
994 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
995 pdsch->dmrs.dmrsPorts = 0;
996 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
997 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
998 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
1000 pdsch->pdschTimeAlloc.rowIndex = k0Index;
1001 pdsch->pdschTimeAlloc.startSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].startSymbol;
1002 pdsch->pdschTimeAlloc.numSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol;
1004 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
1005 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
1006 pdsch->pdschFreqAlloc.startPrb = MAX_NUM_RB;
1007 pdsch->pdschFreqAlloc.numPrb = \
1008 schCalcNumPrb(tbSize, mcs, initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol);
1010 /* Find total symbols occupied including DMRS */
1011 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
1012 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
1013 * in that case only PDSCH symbols are marked as occupied */
1014 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
1016 startSymbol = pdsch->pdschTimeAlloc.startSymb;
1017 numSymbol = pdsch->pdschTimeAlloc.numSymb;
1019 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
1022 startSymbol = dmrsStartSymbol;
1023 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb;
1026 /* Allocate the number of PRBs required for RAR PDSCH */
1027 if((allocatePrbDl(cell, rarTime, startSymbol, numSymbol,\
1028 &pdsch->pdschFreqAlloc.startPrb, pdsch->pdschFreqAlloc.numPrb)) != ROK)
1030 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for RAR");
1031 SCH_FREE(rarAlloc->rarPdcchCfg, sizeof(PdcchCfg));
1035 pdsch->beamPdschInfo.numPrgs = 1;
1036 pdsch->beamPdschInfo.prgSize = 1;
1037 pdsch->beamPdschInfo.digBfInterfaces = 0;
1038 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
1039 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
1040 pdsch->txPdschPower.powerControlOffset = 0;
1041 pdsch->txPdschPower.powerControlOffsetSS = 0;
1046 /* @brief Process RACH resource release after CFRA
1050 * Function : SchProcRachRsrcRel
1052 * This function processes RACH resorce release
1053 * from MAC after CFRA. It releases the dedicated
1054 * preamble alloted to the UE
1056 * @param[in] Post structure
1057 * @param[in] RACH resource release
1061 uint8_t SchProcRachRsrcRel(Pst *pst, SchRachRsrcRel *schRachRsrcRel)
1064 uint8_t ssbIdx = 0, cfraSsbIdx = 0;
1065 uint16_t cellIdx = 0;
1066 Inst inst = pst->dstInst - SCH_INST_START;
1067 SchCellCb *cellCb = NULLP;
1068 SchUeCb *ueCb = NULLP;
1070 DU_LOG("\nINFO --> SCH : Received RACH resource release for Cell ID [%d] CRNTI [%d]", \
1071 schRachRsrcRel->cellId, schRachRsrcRel->crnti);
1074 for(cellIdx = 0; cellIdx < MAX_NUM_CELL; cellIdx++)
1076 if((schCb[inst].cells[cellIdx]) && (schCb[inst].cells[cellIdx]->cellId == schRachRsrcRel->cellId))
1078 cellCb = schCb[inst].cells[cellIdx];
1086 ueCb = schGetUeCb(cellCb, schRachRsrcRel->crnti);
1087 if(ueCb->crnti != schRachRsrcRel->crnti)
1089 DU_LOG("\nERROR --> SCH : CRNTI [%d] not found", schRachRsrcRel->crnti);
1095 DU_LOG("\nERROR --> SCH : Cell ID [%d] not found", schRachRsrcRel->cellId);
1099 /* Free SSB resource if no failure has occurred until this step */
1102 for(ssbIdx = 0; ssbIdx < schRachRsrcRel->cfraResource.numSsb; ssbIdx++)
1104 /* Search each ssbIdx entry in UE Cb */
1105 for(cfraSsbIdx = 0; cfraSsbIdx < ueCb->cfraResource.numSsb; cfraSsbIdx++)
1107 if(ueCb->cfraResource.ssbResource[cfraSsbIdx].ssbIdx == schRachRsrcRel->cfraResource.ssbResource[ssbIdx].ssbIdx)
1109 /* If ssbIdx entry is found in UE CB, free dedicated resources
1110 * for this ssbIdx */
1111 UNSET_ONE_BIT(ueCb->cfraResource.ssbResource[cfraSsbIdx].raPreambleIdx, cellCb->dedPreambleBitMap);
1112 memset(&ueCb->cfraResource.ssbResource[cfraSsbIdx], 0, sizeof(SchCfraSsbResource));
1113 ueCb->cfraResource.numSsb--;
1120 /* Free RACH resource release memory allocated by MAC */
1121 SCH_FREE(schRachRsrcRel, sizeof(SchRachRsrcRel));
1124 /* @brief process MSG4 completion
1128 * Function : schMsg4Complete
1130 * This function updates ra state and msg4 Hqrq
1131 * proc upon MSG4 completion
1132 * @param[in] SchUeCb *ueCb, UE cb pointer
1135 void schMsg4Complete(SchUeCb *ueCb)
1137 DU_LOG("\nINFO --> SCH: State change for ueId[%2d] to SCH_RA_STATE_MSG4_DONE\n",ueCb->ueId);
1138 ueCb->cellCb->raCb[ueCb->ueId-1].raState = SCH_RA_STATE_MSG4_DONE;
1139 ueCb->msg4HqProc = ueCb->retxMsg4HqProc = NULLP;
1141 /**********************************************************************
1143 **********************************************************************/