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3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
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17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for rach handling functions
29 **********************************************************************/
32 @brief This file implements the rach handling.
34 #include "common_def.h"
40 #include "du_app_mac_inf.h"
41 #include "mac_sch_interface.h"
43 #include "sch_utils.h"
45 SchRachRsrcRspFunc SchRachRsrcRspOpts[] =
47 packSchRachRsrcRsp, /* LC */
48 MacProcSchRachRsrcRsp, /* TC */
49 packSchRachRsrcRsp /* LWLC */
53 * @brief Checks if PRACH can be scheduled in current slot
57 * Function : schCheckPrachOcc
59 * This function checks if PRACH can be scheduled in
67 bool schCheckPrachOcc(SchCellCb *cell, SlotTimingInfo prachOccasionTimingInfo)
69 uint8_t prachCfgIdx = 0;
73 uint16_t prachSubframe = 0;
75 prachCfgIdx = cell->cellCfg.schRachCfg.prachCfgIdx;
77 /* derive the prachCfgIdx table paramters */
78 x = prachCfgIdxTable[prachCfgIdx][1];
79 y = prachCfgIdxTable[prachCfgIdx][2];
80 prachSubframe = prachCfgIdxTable[prachCfgIdx][3];
82 if((prachOccasionTimingInfo.sfn%x) == y)
84 subFrame = prachOccasionTimingInfo.slot/pow(2, cell->cellCfg.numerology);
86 /* check for subFrame number */
87 if ((1 << subFrame) & prachSubframe)
89 /* prach ocassion present in this subframe */
91 if(UL_SLOT != schGetSlotSymbFrmt(prachOccasionTimingInfo.slot % cell->numSlotsInPeriodicity,\
92 cell->slotFrmtBitMap))
94 DU_LOG("\nERROR --> SCH : PrachCfgIdx %d doesn't support UL slot", prachCfgIdx);
105 * @brief Calculate number of PRBs to be allocated for PRACH
109 * Function : schCalcPrachNumRb
111 * Calculate number of PRBs to be allocated for PRACH
113 * @param[in] SchCellCb *cell, cell cb
114 * @return Number of PRBs
116 uint8_t schCalcPrachNumRb(SchCellCb *cell)
118 uint8_t tableIdx = 0;
119 uint16_t puschScs = convertScsEnumValToScsVal(cell->cellCfg.schInitialUlBwp.bwp.scs);
121 for(tableIdx=0; tableIdx < MAX_RACH_NUM_RB_IDX; tableIdx++)
123 if((numRbForPrachTable[tableIdx][0] == cell->cellCfg.schRachCfg.rootSeqLen) &&
124 (numRbForPrachTable[tableIdx][1] == cell->cellCfg.schRachCfg.prachSubcSpacing) &&
125 (numRbForPrachTable[tableIdx][2] == puschScs))
127 return numRbForPrachTable[tableIdx][3];
134 * @brief resource allocation for PRACH
138 * Function : schPrachResAlloc
140 * This function handles PRACH allocation
142 * @param[in] SchCellCb *cell, cell cb
143 * @param[in] UlSchedInfo *ulSchedInfo, UL scheduling info
146 void schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotTimingInfo prachOccasionTimingInfo)
148 uint8_t numPrachRb = 0;
150 uint8_t prachCfgIdx = 0;
151 uint8_t prachFormat = 0;
152 uint8_t prachStartSymbol = 0;
153 uint8_t prachDuration = 0;
154 uint8_t prachOcas = 0;
155 uint8_t dataType = 0;
156 uint16_t freqStart = 0;
160 DU_LOG("\nERROR --> SCH : schPrachResAlloc(): Received cellCb is null");
164 /* If this slot is not a PRACH occassion, return */
165 if(!schCheckPrachOcc(cell, prachOccasionTimingInfo))
168 prachCfgIdx = cell->cellCfg.schRachCfg.prachCfgIdx;
169 prachFormat = prachCfgIdxTable[prachCfgIdx][0];
170 prachStartSymbol = prachCfgIdxTable[prachCfgIdx][4];
171 prachOcas = prachCfgIdxTable[prachCfgIdx][6];
172 prachDuration = prachCfgIdxTable[prachCfgIdx][7];
174 /* numRa determined as 𝑛 belonging {0,1,.., M − 1},
175 * where M is given by msg1Fdm */
176 numRa = (cell->cellCfg.schRachCfg.msg1Fdm - 1);
178 /* freq domain resource determination for RACH*/
179 freqStart = cell->cellCfg.schRachCfg.msg1FreqStart;
180 numPrachRb = schCalcPrachNumRb(cell);
181 /* Allocate PRACH resources from the UL resource bitmap */
182 allocatePrbUl(cell, prachOccasionTimingInfo, prachStartSymbol, prachDuration, &freqStart, numPrachRb);
185 dataType |= SCH_DATATYPE_PRACH;
186 ulSchedInfo->dataType = dataType;
187 ulSchedInfo->prachSchInfo.numPrachOcas = prachOcas;
188 ulSchedInfo->prachSchInfo.prachFormat = prachFormat;
189 ulSchedInfo->prachSchInfo.numRa = numRa;
190 ulSchedInfo->prachSchInfo.prachStartSymb = prachStartSymbol;
191 DU_LOG("\nINFO --> SCH : RACH occassion set for slot %d", prachOccasionTimingInfo.slot);
195 * @brief Process RACH resource request for CFRA
199 * Function : MacSchRachRsrcReq
201 * This function processes RACH resorce request
202 * from MAC for CFRA. It assigns a dedicated preamble
203 * to the UE and sends the same in RACH resource
206 * @param[in] Post structure
207 * @param[in] RACH resource request
211 uint8_t MacSchRachRsrcReq(Pst *pst, SchRachRsrcReq *schRachRsrcReq)
213 uint8_t ssbIdx = 0, cfraSsbIdx = 0;
214 uint8_t firstCFPreambleIndex = 0, lastCFPreambleIndex = 0;
215 uint16_t cellIdx = 0;
218 Inst inst = pst->dstInst - SCH_INST_START;
219 SchCellCb *cellCb = NULLP;
220 SchUeCb *ueCb = NULLP;
221 SchRachRsrcRsp *rachRsrcRsp = NULLP;
223 DU_LOG("\nINFO --> SCH : Received RACH resource request for Cell ID [%d] CRNTI [%d]", \
224 schRachRsrcReq->cellId, schRachRsrcReq->crnti);
226 /* Fill RACH resource response to MAC */
227 SCH_ALLOC(rachRsrcRsp, sizeof(SchRachRsrcRsp));
230 DU_LOG("\nERROR --> SCH : Memory allocation failed for RACH resource response");
233 rachRsrcRsp->cellId = schRachRsrcReq->cellId;
234 rachRsrcRsp->crnti = schRachRsrcReq->crnti;
235 rachRsrcRsp->result = RSP_OK;
237 /* Fill SCH to MAC Pst structure */
238 memset(&rspPst, 0, sizeof(Pst));
239 FILL_PST_SCH_TO_MAC(rspPst, inst);
240 rspPst.event = EVENT_RACH_RESOURCE_RESPONSE_TO_MAC;
243 for(cellIdx = 0; cellIdx < MAX_NUM_CELL; cellIdx++)
245 if((schCb[inst].cells[cellIdx]) && (schCb[inst].cells[cellIdx]->cellId == schRachRsrcReq->cellId))
247 cellCb = schCb[inst].cells[cellIdx];
255 ueCb = schGetUeCb(cellCb, schRachRsrcReq->crnti);
256 if(ueCb->crnti != schRachRsrcReq->crnti)
258 DU_LOG("\nERROR --> SCH : CRNTI [%d] not found" ,schRachRsrcReq->crnti);
259 rachRsrcRsp->result = RSP_NOK;
264 DU_LOG("\nERROR --> SCH : Cell ID [%d] not found" ,schRachRsrcReq->cellId);
265 rachRsrcRsp->result = RSP_NOK;
268 /* Allocate SSB resource if no failure has occurred until this step */
269 if(rachRsrcRsp->result == RSP_OK)
271 /* Find first free preamble index from the pool CF preambles
272 * Preamble index from 0 to (numCbPreamblePerSsb-1) is used for CBRA
273 * Preamble index from numCbPreamblePerSsb to totalNumOfRAPreamble
274 * is used for CFRA */
275 firstCFPreambleIndex = cellCb->cellCfg.schRachCfg.numCbPreamblePerSsb;
276 lastCFPreambleIndex = cellCb->cellCfg.schRachCfg.totalNumRaPreamble;
278 /* Allocate resource for each SSB index requested */
279 for(ssbIdx = 0; ssbIdx < schRachRsrcReq->numSsb; ssbIdx++)
281 /* Find the first CF Preamble index not dedicated to any UE currently */
282 while(firstCFPreambleIndex <= lastCFPreambleIndex)
284 mask = 1 << firstCFPreambleIndex;
285 if(cellCb->dedPreambleBitMap & mask)
287 firstCFPreambleIndex++;
294 /* If firstCFPreambleIndex > lastCFPreambleIndex, it means all
295 * dedicated preambles are in use currently. In such a case, CBRA
296 * should be initiated.
297 * If a dedicated preamble is found, use this for CFRA and mark it as
298 * IN-USE in the bitmap.
299 * Considering only CFRA scenario for now. */
300 if(firstCFPreambleIndex <= lastCFPreambleIndex)
302 ueCb->cfraResource.ssbResource[cfraSsbIdx].ssbIdx = schRachRsrcReq->ssbIdx[ssbIdx];
303 ueCb->cfraResource.ssbResource[cfraSsbIdx].raPreambleIdx = firstCFPreambleIndex;
304 SET_ONE_BIT(firstCFPreambleIndex, cellCb->dedPreambleBitMap);
306 firstCFPreambleIndex++;
310 DU_LOG("\nINFO : SCH : No dedicated preameble availble to assign to ssbIdx[%d]", schRachRsrcReq->ssbIdx[ssbIdx]);
311 /* Breaking out of for loop since no dedicated preambles are available
312 * for remaining ssbIdx too */
317 ueCb->cfraResource.numSsb = cfraSsbIdx;
319 if(ueCb->cfraResource.numSsb == 0)
321 /* If numSsb is 0, it means no CFRA resource was alloacted for any of the
322 * SSB Idx, hence send a negative response */
323 rachRsrcRsp->result = RSP_NOK;
327 /* Send ssb resource information to MAC in RACH resource response */
328 rachRsrcRsp->cfraResource.numSsb = ueCb->cfraResource.numSsb;
329 memcpy(rachRsrcRsp->cfraResource.ssbResource, ueCb->cfraResource.ssbResource, \
330 ueCb->cfraResource.numSsb * sizeof(SchCfraSsbResource));
334 /* Free RACH resource request memory allocated by MAC */
335 SCH_FREE(schRachRsrcReq, sizeof(SchRachRsrcReq));
337 /* Send RACH resource response to MAC */
338 return (SchRachRsrcRspOpts[rspPst.selector](&rspPst, rachRsrcRsp));
342 * @brief calculate ra-rnti function.
346 * Function : calculateRaRnti
348 * This function calculates ra-rnti
350 * @param[in] symbol index
351 * @param[in] slot index
352 * @param[in] frequency index
355 uint16_t calculateRaRnti(uint8_t symbolIdx, uint8_t slotIdx, uint8_t freqIdx)
358 uint8_t ulCarrierIdx = 0; /* Uplink carrier used for MSG1 transmission. 0:NUL carrier; 1:SUL carrier */
360 /* Refer to spec 38.321, section 5.1.3 */
361 raRnti = (1 + symbolIdx + (14*slotIdx) + (14*80*freqIdx) + (14*80*8*ulCarrierIdx));
366 * @brief create raCb function.
370 * Function : createSchRaCb
372 * This function create raCb
375 * @param[in] shed instance
378 void createSchRaCb(SchRaReq *raReq, Inst schInst)
384 /* If a UE in handover has triggered CFRA, its UE CB context is already present in SCH,
385 * Hence, no need to create raCb */
386 if(raReq->ueCb && (raReq->ueCb->state == SCH_UE_HANDIN_IN_PROGRESS))
388 schCb[schInst].cells[schInst]->numActvUe++;
389 SET_ONE_BIT(raReq->ueCb->ueId, schCb[schInst].cells[schInst]->actvUeBitMap);
390 raReq->ueCb->state = SCH_UE_STATE_ACTIVE;
391 schCb[schInst].cells[schInst]->raCb[ueId -1].raState = SCH_RA_STATE_MSG4_DONE;
396 /* Create RA CB only for CB-RA to use for msg3 and msg4 processing */
397 GET_UE_ID(raReq->rachInd->crnti, ueId);
398 schCb[schInst].cells[schInst]->raCb[ueId -1].tcrnti = raReq->rachInd->crnti;
399 schCb[schInst].cells[schInst]->raCb[ueId -1].msg4recvd = FALSE;
400 schCb[schInst].cells[schInst]->raCb[ueId -1].raState = SCH_RA_STATE_MSG3_PENDING;
402 schCb[schInst].cells[schInst]->raCb[ueId -1].cell = schCb[schInst].cells[schInst];
406 * @brief resource allocation for msg3 PUSCH
410 * Function : schAllocMsg3Pusch
412 * This function handles msg3 PUSCH allocation
414 * @param[in] Inst schInst, SCH instance
415 * @param[in] slot, current slot
416 * @param[out] msg3StartRb
417 * @param[out] msg3NumRb
420 SchPuschInfo* schAllocMsg3Pusch(Inst schInst, uint16_t crnti, uint8_t k2Index, SlotTimingInfo msg3SlotTime, SchUlHqProcCb* msg3HqProc, bool isRetx)
422 SchCellCb *cell = NULLP;
423 SchUlSlotInfo *schUlSlotInfo = NULLP;
424 uint8_t mcs = DEFAULT_MCS;
425 uint8_t startSymb = 0;
427 uint16_t startRb = 0;
431 cell = schCb[schInst].cells[schInst];
434 DU_LOG("\n\nERROR --> SCH : Failed to find cell in schAllocMsg3Pusch");
438 /* Allocate time-domain and frequency-domain resource for MSG3 PUSCH */
439 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
440 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
442 startRb = MAX_NUM_RB;
443 tbSize = schCalcTbSize(8); /* 6 bytes msg3 and 2 bytes header */
444 numRb = schCalcNumPrb(tbSize, mcs, symbLen);
445 numRb++; /* allocating 1 extra RB for now */
446 allocatePrbUl(cell, msg3SlotTime, startSymb, symbLen, &startRb, numRb);
448 /* Fill PUSCH scheduling details in Slot structure */
449 schUlSlotInfo = cell->schUlSlotInfo[msg3SlotTime.slot];
450 SCH_ALLOC(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
451 if(!schUlSlotInfo->schPuschInfo)
453 DU_LOG("\nERROR --> SCH : Memory allocation failed in schAllocMsg3Pusch");
457 tbSize = 0; /* since nPrb has been incremented, recalculating tbSize */
458 tbSize = schCalcTbSizeFromNPrb(numRb, mcs, NUM_PDSCH_SYMBOL);
459 tbSize = tbSize / 8 ; /*bits to byte conversion*/
461 schUlSlotInfo->schPuschInfo->crnti = crnti;
462 schUlSlotInfo->schPuschInfo->harqProcId = msg3HqProc->procId;
463 schUlSlotInfo->schPuschInfo->resAllocType = SCH_ALLOC_TYPE_1;
464 schUlSlotInfo->schPuschInfo->fdAlloc.startPrb = startRb;
465 schUlSlotInfo->schPuschInfo->fdAlloc.numPrb = numRb;
466 schUlSlotInfo->schPuschInfo->tdAlloc.startSymb = startSymb;
467 schUlSlotInfo->schPuschInfo->tdAlloc.numSymb = symbLen;
468 schUlSlotInfo->schPuschInfo->tbInfo.qamOrder = QPSK_MODULATION; /* QPSK modulation */
469 schUlSlotInfo->schPuschInfo->tbInfo.mcs = mcs;
470 schUlSlotInfo->schPuschInfo->tbInfo.mcsTable = SCH_MCS_TABLE_QAM_64;
471 schUlSlotInfo->schPuschInfo->tbInfo.ndi = NEW_TRANSMISSION; /* new transmission */
472 schUlSlotInfo->schPuschInfo->tbInfo.rv = 0;
473 schUlSlotInfo->schPuschInfo->tbInfo.tbSize = tbSize;
474 schUlSlotInfo->schPuschInfo->dmrsMappingType = DMRS_MAP_TYPE_A; /* Setting Type-A */
475 schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
476 schUlSlotInfo->schPuschInfo->dmrsAddPos = DMRS_ADDITIONAL_POS;
479 msg3HqProc->strtSymbl = startSymb;
480 msg3HqProc->numSymbl = symbLen;
481 msg3HqProc->puschResType = schUlSlotInfo->schPuschInfo->resAllocType;
482 msg3HqProc->puschStartPrb = schUlSlotInfo->schPuschInfo->fdAlloc.startPrb;
483 msg3HqProc->puschNumPrb = schUlSlotInfo->schPuschInfo->fdAlloc.numPrb;
484 msg3HqProc->tbInfo.qamOrder = schUlSlotInfo->schPuschInfo->tbInfo.qamOrder;
485 msg3HqProc->tbInfo.iMcs = schUlSlotInfo->schPuschInfo->tbInfo.mcs;
486 msg3HqProc->tbInfo.mcsTable = schUlSlotInfo->schPuschInfo->tbInfo.mcsTable;
487 msg3HqProc->tbInfo.ndi = schUlSlotInfo->schPuschInfo->tbInfo.ndi;
488 msg3HqProc->tbInfo.rv = schUlSlotInfo->schPuschInfo->tbInfo.rv;
489 msg3HqProc->tbInfo.tbSzReq = schUlSlotInfo->schPuschInfo->tbInfo.tbSize;
490 msg3HqProc->dmrsMappingType = schUlSlotInfo->schPuschInfo->dmrsMappingType;
491 msg3HqProc->nrOfDmrsSymbols = schUlSlotInfo->schPuschInfo->nrOfDmrsSymbols;
492 msg3HqProc->dmrsAddPos = schUlSlotInfo->schPuschInfo->dmrsAddPos;
494 return schUlSlotInfo->schPuschInfo;
498 * @brief Check if a time frame is in RA Response window
502 * Function : isInRaRspWindow
504 * Check if a time frame is in RA Response window
506 * @param[in] RA request
507 * @param[in] Time frame to check
508 * @param[in] Total number of slot per radio frame
512 RaRspWindowStatus isInRaRspWindow(SchRaReq *raReq, SlotTimingInfo frameToCheck, uint16_t numSlotsPerSystemFrame)
514 uint32_t winStartTime, winEndTime, timeToCheck;
516 winStartTime = (raReq->winStartTime.sfn * numSlotsPerSystemFrame) + raReq->winStartTime.slot;
517 winEndTime = (raReq->winEndTime.sfn * numSlotsPerSystemFrame) + raReq->winEndTime.slot;
518 timeToCheck = (frameToCheck.sfn * numSlotsPerSystemFrame) + frameToCheck.slot;
520 /* TODO : check how to handle the wrap around scenario of MAX_SFN */
521 if((timeToCheck >= winStartTime) && (timeToCheck <= winEndTime))
522 return WITHIN_WINDOW;
523 else if(timeToCheck < winStartTime)
524 return WINDOW_YET_TO_START;
526 return WINDOW_EXPIRED;
530 * @brief Processes any pending RA request
534 * Function : schProcessRaReq
536 * This function process pending RA request
538 * @param[in] Current timing of the cell
541 bool schProcessRaReq(Inst schInst, SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
543 bool k1Found = false, k2Found = false;
544 uint8_t k0TblIdx = 0, k1TblIdx = 0, k2TblIdx = 0;
545 uint8_t k0Index = 0, k1Index = 0, k2Index = 0;
546 uint8_t k0 = 0, k1 = 0, k2 = 0;
549 uint8_t msg3Delta = 0, msg3MinSchTime = 0;
551 uint8_t totalCfgSlot = 0;
553 uint16_t dciSlot = 0, rarSlot = 0;
554 SlotTimingInfo dciTime, rarTime, msg3Time, pucchTime;
555 RarAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for RAR */
556 RarAlloc *rarSlotAlloc = NULLP; /* Stores info for transmission of RAR PDSCH */
557 SchPuschInfo *msg3PuschInfo = NULLP; /* Stores MSG3 PUSCH scheduling information */
558 SchK0K1TimingInfoTbl *k0K1InfoTbl=NULLP;
559 SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
560 RaRspWindowStatus windowStatus=0;
563 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
565 k0K1InfoTbl = &cell->cellCfg.schInitialDlBwp.k0K1InfoTbl;
566 if(cell->raReq[ueId-1]->isCFRA == false)
568 msg3K2InfoTbl = &cell->cellCfg.schInitialUlBwp.msg3K2InfoTbl;
569 puschMu = cell->cellCfg.numerology;
570 msg3Delta = puschDeltaTable[puschMu];
571 msg3MinSchTime = minMsg3SchTime[cell->cellCfg.numerology];
574 /* Calculating time frame to send DCI for RAR */
575 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
576 dciSlot = dciTime.slot;
578 /* Consider this slot for sending DCI, only if it is a DL slot */
579 if(schGetSlotSymbFrmt(dciSlot, cell->slotFrmtBitMap) == DL_SLOT)
582 /* If PDCCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
583 if(cell->schDlSlotInfo[dciSlot]->pdcchUe != 0)
586 /* Check if this slot is within RA response window */
587 windowStatus = isInRaRspWindow(cell->raReq[ueId-1], dciTime, cell->numSlots);
588 if(windowStatus == WITHIN_WINDOW)
590 /* For all k0 values, search for a suitable k2 value to schedule MSG3.
591 * RAR DCI, RAR PDSCH and MSG3 is scheduled only if one such k0-k2 combination
592 * is found. Else no scheduling happens.
594 for(k0TblIdx = 0; k0TblIdx < k0K1InfoTbl->k0k1TimingInfo[dciSlot].numK0; k0TblIdx++)
596 k0Index = k0K1InfoTbl->k0k1TimingInfo[dciSlot].k0Indexes[k0TblIdx].k0Index;
597 k0 = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
599 /* Calculating time frame to send RAR PDSCH */
600 ADD_DELTA_TO_TIME(dciTime, rarTime, k0);
601 rarSlot = rarTime.slot;
603 /* If PDSCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
604 if(cell->schDlSlotInfo[rarSlot]->pdschUe != 0)
607 /* If Contention-FREE RA is in progress, allocate resources for
608 * PUCCH for next UL message */
609 if(cell->raReq[ueId-1]->isCFRA)
611 numK1 = k0K1InfoTbl->k0k1TimingInfo[dciTime.slot].k0Indexes[k0TblIdx].k1TimingInfo.numK1;
612 for(k1TblIdx = 0; k1TblIdx < numK1; k1TblIdx++)
614 k1Index = k0K1InfoTbl->k0k1TimingInfo[dciTime.slot].k0Indexes[k0TblIdx].k1TimingInfo.k1Indexes[k1TblIdx];
615 if(cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg.dlDataToUlAck)
617 k1 = cell->raReq[ueId-1]->ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg.dlDataToUlAck->\
618 dlDataToUlAckList[k1Index];
622 k1 = defaultUlAckTbl[k1Index];
625 ADD_DELTA_TO_TIME(rarTime, pucchTime, k1);
627 if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
630 if(cell->schUlSlotInfo[pucchTime.slot]->pucchUe != 0)
638 /* Else if contention-based RA is in progress, allocate resources for MSG3 */
639 for(k2TblIdx = 0; k2TblIdx < msg3K2InfoTbl->k2TimingInfo[rarSlot].numK2; k2TblIdx++)
641 k2Index = msg3K2InfoTbl->k2TimingInfo[rarSlot].k2Indexes[k2TblIdx];
642 k2 = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
644 /* Delta is added to the slot allocation for msg3 based on 38.214 section 6.1.2.1 */
646 if(k2 >= msg3MinSchTime)
648 ADD_DELTA_TO_TIME(rarTime, msg3Time, k2);
650 if(schGetSlotSymbFrmt(msg3Time.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
653 /* If PUSCH is already scheduled on this slot, another PUSCH
654 * pdu cannot be scheduled here */
655 if(cell->schUlSlotInfo[msg3Time.slot]->puschUe != 0)
663 if(k1Found || k2Found)
667 else if(windowStatus == WINDOW_EXPIRED)
669 SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo));
670 SCH_FREE(cell->raReq[ueId-1], sizeof(SchRaReq));
674 /* If K0-K2 and K0-K1 combination not found, no scheduling happens */
675 if(!k1Found && !k2Found)
678 /* Allocate memory for RAR PDCCH slot, pointer will be checked at schProcessSlotInd() */
679 SCH_ALLOC(dciSlotAlloc, sizeof(RarAlloc));
680 if(dciSlotAlloc == NULLP)
682 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
685 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = dciSlotAlloc;
687 /* Fill PDCCH and PDSCH scheduling information for RAR */
688 if((schFillRar(cell, rarTime, ueId, dciSlotAlloc, k0Index)) != ROK)
690 DU_LOG("\nERROR --> SCH: Scheduling of RAR failed in slot [%d]", rarSlot);
691 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
692 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP;
697 dciSlotAlloc->rarInfo.raRnti = cell->raReq[ueId-1]->raRnti;
698 dciSlotAlloc->rarInfo.tcrnti = cell->raReq[ueId-1]->rachInd->crnti;
699 dciSlotAlloc->rarInfo.RAPID = cell->raReq[ueId-1]->rachInd->preambleIdx;
700 dciSlotAlloc->rarInfo.ta = cell->raReq[ueId-1]->rachInd->timingAdv;
702 if(cell->raReq[ueId-1]->isCFRA)
704 /* Allocate resources for PUCCH */
705 schAllocPucchResource(cell, pucchTime, cell->raReq[ueId-1]->rachInd->crnti,NULLP, FALSE, NULLP);
709 /* Allocate resources for msg3 */
710 msg3PuschInfo = schAllocMsg3Pusch(schInst, cell->raReq[ueId-1]->rachInd->crnti, k2Index, msg3Time, &(cell->raCb[ueId-1].msg3HqProc), FALSE);
713 dciSlotAlloc->rarInfo.ulGrant.bwpSize = cell->cellCfg.schInitialUlBwp.bwp.freqAlloc.numPrb;
714 /* Spec 38.213, section 8.2, 0 : MSG3 PUSCH will be transmitted without frequency hopping */
715 dciSlotAlloc->rarInfo.ulGrant.freqHopFlag = 0;
716 dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.startPrb = msg3PuschInfo->fdAlloc.startPrb;
717 dciSlotAlloc->rarInfo.ulGrant.msg3FreqAlloc.numPrb = msg3PuschInfo->fdAlloc.numPrb;
718 dciSlotAlloc->rarInfo.ulGrant.k2Index = k2Index;
719 dciSlotAlloc->rarInfo.ulGrant.mcs = msg3PuschInfo->tbInfo.mcs;
720 dciSlotAlloc->rarInfo.ulGrant.tpc = 3; /* TODO : Check appropriate value to be filled */
721 /* Spec 38.213, section 8.2 : In a contention based random access
722 * procedure, the CSI request field is reserved. */
723 dciSlotAlloc->rarInfo.ulGrant.csiReq = 0;
727 /* Check if both DCI and RAR are sent in the same slot.
728 * If not, allocate memory RAR PDSCH slot to store RAR info
730 if(dciSlot == rarSlot)
731 dciSlotAlloc->pduPres = BOTH;
734 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
735 SCH_ALLOC(rarSlotAlloc, sizeof(RarAlloc));
736 if(rarSlotAlloc == NULLP)
738 DU_LOG("\nERROR --> SCH : Memory Allocation failed for rarSlotAlloc");
739 SCH_FREE(dciSlotAlloc, sizeof(RarAlloc));
740 cell->schDlSlotInfo[dciSlot]->rarAlloc[ueId-1] = NULLP;
743 cell->schDlSlotInfo[rarSlot]->rarAlloc[ueId-1] = rarSlotAlloc;
745 /* Copy all RAR info */
746 memcpy(rarSlotAlloc, dciSlotAlloc, sizeof(RarAlloc));
747 rarSlotAlloc->rarPdcchCfg.dci.pdschCfg = &rarSlotAlloc->rarPdschCfg;
749 /* Assign correct PDU types in corresponding slots */
750 rarSlotAlloc->pduPres = PDSCH_PDU;
751 dciSlotAlloc->pduPres = PDCCH_PDU;
752 dciSlotAlloc->pdschSlot = rarSlot;
755 cell->schDlSlotInfo[dciSlot]->pdcchUe = ueId;
756 cell->schDlSlotInfo[rarSlot]->pdschUe = ueId;
757 if(cell->raReq[ueId-1]->isCFRA)
758 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
760 cell->schUlSlotInfo[msg3Time.slot]->puschUe = ueId;
762 /* Create raCb at SCH */
763 createSchRaCb(cell->raReq[ueId-1], schInst);
765 /* Remove RachInd from pending RA request list */
766 SCH_FREE(cell->raReq[ueId-1]->rachInd, sizeof(RachIndInfo));
767 SCH_FREE(cell->raReq[ueId-1], sizeof(SchRaReq));
775 * @brief process rach indication function.
779 * Function : schProcessRachInd
781 * This function process rach indication
783 * @param[in] rachInd parameters
784 * @param[in] shed instance
787 uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst)
789 SchCellCb *cell = schCb[schInst].cells[schInst];
790 SchRaReq *raReq = NULLP;
797 DU_LOG("\nERROR --> SCH: Failed to find cell in schProcessRachInd");
801 /* Storing RA request in cellCb */
802 GET_UE_ID(rachInd->crnti, ueId);
805 DU_LOG("\nERROR --> SCH: Invalid CRNTI [%d]", rachInd->crnti);
809 SCH_ALLOC(raReq, sizeof(SchRaReq));
812 DU_LOG("\nERROR --> SCH : Memory allocation failure in schProcessRachInd");
813 SCH_FREE(rachInd, sizeof(RachIndInfo));
817 /* calculate the ra-rnti value */
818 raReq->raRnti = calculateRaRnti(rachInd->symbolIdx, rachInd->slotIdx, rachInd->freqIdx);
819 raReq->rachInd = rachInd;
820 if((cell->ueCb[ueId-1].crnti == rachInd->crnti) && (cell->ueCb[ueId-1].state == SCH_UE_HANDIN_IN_PROGRESS))
822 raReq->isCFRA = true;
823 raReq->ueCb = &cell->ueCb[ueId-1];
826 raReq->isCFRA = false;
827 raReq->winStartTime.sfn = rachInd->timingInfo.sfn;
828 raReq->winStartTime.slot = rachInd->timingInfo.slot;
830 /* Converting window size from ms to number of slots */
831 slotDuration = (1 / pow(2, cell->cellCfg.numerology));
832 winNumSlots = (float)cell->cellCfg.schRachCfg.raRspWindow / slotDuration;
834 /* Adding window size to window start time to get window end time */
835 ADD_DELTA_TO_TIME(raReq->winStartTime, raReq->winEndTime, winNumSlots);
836 cell->raReq[ueId -1] = raReq;
838 /* Adding UE Id to list of pending UEs to be scheduled */
839 addUeToBeScheduled(cell, ueId);
845 * @brief fill RAR info function.
849 * Function : calculateRaRnti
851 * This function fills pdcch and pdsch info for RAR
853 * @param[in] rar Allocation info
856 * @param[in] offset to pointA to determine freq alloc
859 uint8_t schFillRar(SchCellCb *cell, SlotTimingInfo rarTime, uint16_t ueId, RarAlloc *rarAlloc, uint8_t k0Index)
861 uint8_t coreset0Idx = 0;
862 uint8_t firstSymbol = 0, numSymbols = 0;
863 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
864 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
868 SchBwpDlCfg *initialBwp = &cell->cellCfg.schInitialDlBwp;
869 PdcchCfg *pdcch = &rarAlloc->rarPdcchCfg;
870 PdschCfg *pdsch = &rarAlloc->rarPdschCfg;
871 BwpCfg *bwp = &rarAlloc->bwp;
873 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
874 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
875 numRbs = coresetIdxTable[coreset0Idx][1];
876 numSymbols = coresetIdxTable[coreset0Idx][2];
878 /* calculate time domain parameters */
879 // note: since slot value is made sl1, RAR can be sent at all slots
880 uint16_t mask = 0x2000;
881 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
883 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
890 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
891 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
892 bwp->subcarrierSpacing = initialBwp->bwp.scs;
893 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
895 /* fill the PDCCH PDU */
896 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
897 pdcch->coresetCfg.durationSymbols = numSymbols;
898 memcpy(pdcch->coresetCfg.freqDomainResource, \
899 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
901 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
902 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
903 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
904 pdcch->coresetCfg.coreSetType = 0;
905 pdcch->coresetCfg.coreSetSize = numRbs;
906 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
907 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
909 pdcch->dci.rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */
910 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
911 pdcch->dci.scramblingRnti = 0;
912 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
913 pdcch->dci.aggregLevel = 4;
914 pdcch->dci.beamPdcchInfo.numPrgs = 1;
915 pdcch->dci.beamPdcchInfo.prgSize = 1;
916 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
917 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
918 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
919 pdcch->dci.txPdcchPower.powerValue = 0;
920 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
921 pdcch->dci.pdschCfg = pdsch;
923 /* fill the PDSCH PDU */
925 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
926 pdsch->rnti = cell->raReq[ueId-1]->raRnti; /* RA-RNTI */
928 pdsch->numCodewords = 1;
929 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
931 pdsch->codeword[cwCount].targetCodeRate = 308;
932 pdsch->codeword[cwCount].qamModOrder = 2;
933 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
934 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
935 pdsch->codeword[cwCount].rvIndex = 0;
936 /* RAR PDU length and FAPI payload header length */
937 tbSize = schCalcTbSize(RAR_PAYLOAD_SIZE + TX_PAYLOAD_HDR_LEN);
938 pdsch->codeword[cwCount].tbSize = tbSize;
940 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
941 pdsch->numLayers = 1;
942 pdsch->transmissionScheme = 0;
944 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
945 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
946 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
947 pdsch->dmrs.scid = 0;
948 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
949 pdsch->dmrs.dmrsPorts = 0;
950 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
951 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
952 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
954 pdsch->pdschTimeAlloc.rowIndex = k0Index;
955 pdsch->pdschTimeAlloc.timeAlloc.startSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].startSymbol;
956 pdsch->pdschTimeAlloc.timeAlloc.numSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol;
958 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
959 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
960 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
961 pdsch->pdschFreqAlloc.freqAlloc.numPrb = \
962 schCalcNumPrb(tbSize, mcs, initialBwp->pdschCommon.timeDomRsrcAllocList[k0Index].lengthSymbol);
964 /* Find total symbols occupied including DMRS */
965 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
966 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
967 * in that case only PDSCH symbols are marked as occupied */
968 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
970 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
971 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
973 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
976 startSymbol = dmrsStartSymbol;
977 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
980 /* Allocate the number of PRBs required for RAR PDSCH */
981 if((allocatePrbDl(cell, rarTime, startSymbol, numSymbol,\
982 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
984 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for RAR");
988 pdsch->beamPdschInfo.numPrgs = 1;
989 pdsch->beamPdschInfo.prgSize = 1;
990 pdsch->beamPdschInfo.digBfInterfaces = 0;
991 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
992 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
993 pdsch->txPdschPower.powerControlOffset = 0;
994 pdsch->txPdschPower.powerControlOffsetSS = 0;
999 /* @brief Process RACH resource release after CFRA
1003 * Function : MacSchRachRsrcRel
1005 * This function processes RACH resorce release
1006 * from MAC after CFRA. It releases the dedicated
1007 * preamble alloted to the UE
1009 * @param[in] Post structure
1010 * @param[in] RACH resource release
1014 uint8_t MacSchRachRsrcRel(Pst *pst, SchRachRsrcRel *schRachRsrcRel)
1017 uint8_t ssbIdx = 0, cfraSsbIdx = 0;
1018 uint16_t cellIdx = 0;
1019 Inst inst = pst->dstInst - SCH_INST_START;
1020 SchCellCb *cellCb = NULLP;
1021 SchUeCb *ueCb = NULLP;
1023 DU_LOG("\nINFO --> SCH : Received RACH resource release for Cell ID [%d] CRNTI [%d]", \
1024 schRachRsrcRel->cellId, schRachRsrcRel->crnti);
1027 for(cellIdx = 0; cellIdx < MAX_NUM_CELL; cellIdx++)
1029 if((schCb[inst].cells[cellIdx]) && (schCb[inst].cells[cellIdx]->cellId == schRachRsrcRel->cellId))
1031 cellCb = schCb[inst].cells[cellIdx];
1039 ueCb = schGetUeCb(cellCb, schRachRsrcRel->crnti);
1040 if(ueCb->crnti != schRachRsrcRel->crnti)
1042 DU_LOG("\nERROR --> SCH : CRNTI [%d] not found", schRachRsrcRel->crnti);
1048 DU_LOG("\nERROR --> SCH : Cell ID [%d] not found", schRachRsrcRel->cellId);
1052 /* Free SSB resource if no failure has occurred until this step */
1055 for(ssbIdx = 0; ssbIdx < schRachRsrcRel->cfraResource.numSsb; ssbIdx++)
1057 /* Search each ssbIdx entry in UE Cb */
1058 for(cfraSsbIdx = 0; cfraSsbIdx < ueCb->cfraResource.numSsb; cfraSsbIdx++)
1060 if(ueCb->cfraResource.ssbResource[cfraSsbIdx].ssbIdx == schRachRsrcRel->cfraResource.ssbResource[ssbIdx].ssbIdx)
1062 /* If ssbIdx entry is found in UE CB, free dedicated resources
1063 * for this ssbIdx */
1064 UNSET_ONE_BIT(ueCb->cfraResource.ssbResource[cfraSsbIdx].raPreambleIdx, cellCb->dedPreambleBitMap);
1065 memset(&ueCb->cfraResource.ssbResource[cfraSsbIdx], 0, sizeof(SchCfraSsbResource));
1066 ueCb->cfraResource.numSsb--;
1073 /* Free RACH resource release memory allocated by MAC */
1074 SCH_FREE(schRachRsrcRel, sizeof(SchRachRsrcRel));
1077 /* @brief process MSG4 completion
1081 * Function : schMsg4Complete
1083 * This function updates ra state and msg4 Hqrq
1084 * proc upon MSG4 completion
1085 * @param[in] SchUeCb *ueCb, UE cb pointer
1088 void schMsg4Complete(SchUeCb *ueCb)
1090 DU_LOG("\nINFO --> SCH: State change for ueId[%2d] to SCH_RA_STATE_MSG4_DONE\n",ueCb->ueId);
1091 ueCb->cellCb->raCb[ueCb->ueId-1].raState = SCH_RA_STATE_MSG4_DONE;
1092 ueCb->msg4Proc = ueCb->retxMsg4HqProc = NULLP;
1094 /**********************************************************************
1096 **********************************************************************/