1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
46 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
54 * @brief common resource allocation for SSB
58 * Function : schBroadcastSsbAlloc
60 * This function handles common scheduling for SSB
62 * @param[in] SchCellCb *cell, cell cb
63 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
66 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
69 uint8_t ssbStartSymb, idx;
71 SchDlSlotInfo *schDlSlotInfo;
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
80 if(dlBrdcstAlloc == NULL)
82 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
86 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
87 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
88 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
90 /* Assign interface structure */
91 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
94 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
95 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
96 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
97 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
98 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
99 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
102 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
104 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
109 schDlSlotInfo->ssbPres = true;
110 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
115 * @brief common resource allocation for SIB1
119 * Function : schBroadcastSib1Alloc
121 * This function handles common scheduling for SIB1
123 * @param[in] SchCellCb *cell, cell cb
124 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
127 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
129 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
131 FreqDomainAlloc freqAlloc;
132 TimeDomainAlloc timeAlloc;
133 SchDlSlotInfo *schDlSlotInfo = NULLP;
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
141 if(dlBrdcstAlloc == NULL)
143 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
147 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
148 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
149 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
150 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
152 /* Find total symbols used including DMRS */
153 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
154 * in that case only PDSCH symbols are marked as occupied */
155 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
156 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
158 startSymbol = timeAlloc.startSymb;
159 numSymbol = timeAlloc.numSymb;
161 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
164 startSymbol = dmrsStartSymbol;
165 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
169 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
171 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
175 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
176 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
177 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
178 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
179 schDlSlotInfo->sib1Pres = true;
183 /*******************************************************************
185 * @brief Handles sending UL scheduler info to MAC
189 * Function : sendUlSchInfoToMac
192 * Sends UL Sch info to MAC from SCH
195 * @return ROK - success
198 * ****************************************************************/
199 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
203 memset(&pst, 0, sizeof(Pst));
204 FILL_PST_SCH_TO_MAC(pst, inst);
205 pst.event = EVENT_UL_SCH_INFO;
207 return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
211 * @brief Function to fill Pucch Format 0
215 * Function : fillPucchFormat0
217 * Function to fill Pucch format 0
219 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
223 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
225 if(resrcInfo->SchPucchFormat.format0)
227 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
228 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
229 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
230 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
231 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
236 * @brief Function to fill Pucch Format 1
240 * Function : fillPucchFormat1
242 * Function to fill Pucch format 1
244 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
248 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
250 if(resrcInfo->SchPucchFormat.format1)
252 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
253 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
254 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
255 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
256 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
257 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
262 * @brief Function to fill Pucch format for UL Sched Info
266 * Function : fillUlSchedPucchFormat
268 * Function to fill Pucch format for UL Sched Info
270 * @param[in] pucchFormat , SchPucchInfo pointer,
271 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
275 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
276 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
285 fillPucchFormat0(ulSchedPucch, resrcInfo);
292 fillPucchFormat1(ulSchedPucch, resrcInfo);
296 memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
299 }/* To Add support for more Pucch Format */
302 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
310 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
314 * Function : fillUlSchedPucchDedicatedCfg
316 * Function to fill Pucch Dedicated Cfg for UL Sched Info
318 * @param[in] pucchFormat to be filled
319 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
323 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
324 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
326 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
327 uint16_t srOffset = 0;
328 uint16_t numSlots = cell->numSlots;
329 bool isAllocated = false;
330 uint16_t pucchStartPrb;
332 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
334 //Assuming one entry in the list
335 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
337 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
339 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
340 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
342 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
343 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
344 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
345 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
346 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
347 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
351 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
352 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
365 if(pucchDedCfg->format1)
367 memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
368 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
378 /* setting SR and UCI flag */
379 if(pucchDedCfg->schedReq)
381 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
383 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
384 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
387 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
389 ulSchedPucch->srFlag = true;
390 ulSchedPucch->uciFlag = true;
397 * @brief Function to fill Pucch Resource Info
401 * Function : fillPucchResourceInfo
403 * Function to fill Pucch Resource Info
405 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
406 * @return ROK/RFAILED
409 uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
411 uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
412 SchCellCb *cell = schCb[inst].cells[inst];
413 SchPucchCfgCmn *pucchCfg = NULLP;
414 SchBwpParams *ulBwp = NULLP;
417 GET_UE_IDX(schPucchInfo->rnti, ueIdx);
418 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
420 /* fill pucch dedicated cfg */
421 ret = fillUlSchedPucchDedicatedCfg(cell,\
422 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
425 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
426 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
432 /* fill pucch common cfg */
433 /* derive pucchResourceSet from schCellCfg */
434 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
435 pucchIdx = pucchCfg->pucchResourceCommon;
436 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
437 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
438 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
439 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
442 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
443 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
444 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
445 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
446 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
448 /* set SR and UCI flag to false */
449 schPucchInfo->srFlag = true;
450 schPucchInfo->uciFlag = true;
453 /* set HARQ flag to true */
454 schPucchInfo->harqFlag = true;
455 schPucchInfo->numHarqBits = 1; /* 1 bit for HARQ */
461 * @brief resource allocation for UL
465 * Function : schUlResAlloc
467 * This function handles UL Resource allocation
469 * @param[in] SchCellCb *cell, cellCb
472 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
475 UlSchedInfo ulSchedInfo;
476 SchUlSlotInfo *schUlSlotInfo = NULLP;
477 SlotTimingInfo ulTimingInfo;
478 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
481 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA);
483 ulSchedInfo.cellId = cell->cellId;
484 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
485 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
486 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
488 /* Schedule resources for PRACH */
489 if(cell->firstSib1Transmitted)
490 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
492 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
493 if(schUlSlotInfo->schPuschInfo)
495 ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
496 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
497 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
498 sizeof(SchPuschInfo));
499 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
500 schUlSlotInfo->schPuschInfo = NULL;
503 if(schUlSlotInfo->pucchPres)
505 ret = fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
508 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
509 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
510 sizeof(SchPucchInfo));
512 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
516 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
519 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
522 schInitUlSlot(schUlSlotInfo);
526 /*******************************************************************
528 * @brief Fills pdcch and pdsch info for msg4
532 * Function : schDlRsrcAllocMsg4
535 * Fills pdcch and pdsch info for msg4
538 * @return ROK - success
541 * ****************************************************************/
542 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
543 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols)
545 uint8_t coreset0Idx = 0;
546 uint8_t firstSymbol = 0;
547 uint8_t numSymbols = 0;
548 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
549 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
552 SchBwpDlCfg *initialBwp = NULLP;
553 PdcchCfg *pdcch = NULLP;
554 PdschCfg *pdsch = NULLP;
556 DlMsgSchInfo *msg4Alloc = NULLP;
560 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
564 if(dlMsgAlloc == NULL)
566 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
570 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
571 initialBwp = &cell->cellCfg.schInitialDlBwp;
572 pdcch = &msg4Alloc->dlMsgPdcchCfg;
573 pdsch = &msg4Alloc->dlMsgPdschCfg;
574 bwp = &msg4Alloc->bwp;
575 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
577 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti);
578 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
580 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
581 numRbs = coresetIdxTable[coreset0Idx][1];
582 numSymbols = coresetIdxTable[coreset0Idx][2];
584 /* calculate time domain parameters */
585 uint16_t mask = 0x2000;
586 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
588 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
595 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
596 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
597 bwp->subcarrierSpacing = initialBwp->bwp.scs;
598 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
600 /* fill the PDCCH PDU */
601 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
602 pdcch->coresetCfg.durationSymbols = numSymbols;
603 memcpy(pdcch->coresetCfg.freqDomainResource, \
604 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
606 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
607 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
608 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
609 pdcch->coresetCfg.coreSetType = 0;
610 pdcch->coresetCfg.coreSetSize = numRbs;
611 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
612 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
614 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
615 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
616 pdcch->dci.scramblingRnti = 0;
617 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
618 pdcch->dci.aggregLevel = 4;
619 pdcch->dci.beamPdcchInfo.numPrgs = 1;
620 pdcch->dci.beamPdcchInfo.prgSize = 1;
621 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
622 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
623 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
624 pdcch->dci.txPdcchPower.powerValue = 0;
625 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
626 pdcch->dci.pdschCfg = pdsch;
628 /* fill the PDSCH PDU */
630 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
631 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
633 pdsch->numCodewords = 1;
634 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
636 pdsch->codeword[cwCount].targetCodeRate = 308;
637 pdsch->codeword[cwCount].qamModOrder = 2;
638 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
639 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
640 pdsch->codeword[cwCount].rvIndex = 0;
641 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
642 pdsch->codeword[cwCount].tbSize = tbSize;
644 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
645 pdsch->numLayers = 1;
646 pdsch->transmissionScheme = 0;
648 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
649 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
650 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
651 pdsch->dmrs.scid = 0;
652 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
653 pdsch->dmrs.dmrsPorts = 0;
654 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
655 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
656 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
658 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
659 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
661 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
662 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
663 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
664 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
666 /* Find total symbols occupied including DMRS */
667 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
668 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
669 * in that case only PDSCH symbols are marked as occupied */
670 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
672 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
673 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
675 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
678 startSymbol = dmrsStartSymbol;
679 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
682 /* Allocate the number of PRBs required for RAR PDSCH */
683 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
684 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
686 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
690 pdsch->beamPdschInfo.numPrgs = 1;
691 pdsch->beamPdschInfo.prgSize = 1;
692 pdsch->beamPdschInfo.digBfInterfaces = 0;
693 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
694 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
695 pdsch->txPdschPower.powerControlOffset = 0;
696 pdsch->txPdschPower.powerControlOffsetSS = 0;
698 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
702 /*******************************************************************
704 * @brief Scheduling for Pucch Resource
708 * Function : schAllocPucchResource
711 * Scheduling for Pucch Resource
713 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
714 * @return ROK - success
717 *******************************************************************/
719 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti)
721 uint16_t pucchSlot = 0;
722 SchUlSlotInfo *schUlSlotInfo = NULLP;
724 pucchSlot = pucchTime.slot;
725 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
726 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
728 schUlSlotInfo->pucchPres = true;
729 schUlSlotInfo->schPucchInfo.rnti = crnti;
734 /*******************************************************************
736 * @brief Fills pdcch and pdsch info for dedicated DL msg
740 * Function : schDlRsrcAllocDlMsg
743 * Fills pdcch and pdsch info for dl msg
746 * @return ROK - success
749 * ****************************************************************/
750 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
751 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol, uint8_t pdschNumSymbols)
754 PdcchCfg *pdcch = NULLP;
755 PdschCfg *pdsch = NULLP;
758 SchControlRsrcSet coreset1;
759 SchPdschConfig pdschCfg;
760 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
762 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
763 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
764 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
766 GET_UE_IDX(crnti, ueIdx);
767 ueCb = cell->ueCb[ueIdx-1];
768 coreset1 = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
769 pdschCfg = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdschCfg;
772 bwp->freqAlloc.numPrb = MAX_NUM_RB;
773 bwp->freqAlloc.startPrb = 0;
774 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
775 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
777 /* fill the PDCCH PDU */
778 //Considering coreset1 also starts from same symbol as coreset0
779 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
780 pdcch->coresetCfg.durationSymbols = coreset1.duration;
781 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
782 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
783 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
784 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
785 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
786 //Considering number of RBs in coreset1 is same as coreset0
787 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
788 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
789 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
791 pdcch->dci.rnti = ueCb.crnti;
792 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
793 pdcch->dci.scramblingRnti = 0;
794 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
795 pdcch->dci.aggregLevel = 4;
796 pdcch->dci.beamPdcchInfo.numPrgs = 1;
797 pdcch->dci.beamPdcchInfo.prgSize = 1;
798 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
799 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
800 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
801 pdcch->dci.txPdcchPower.powerValue = 0;
802 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
804 /* fill the PDSCH PDU */
806 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
807 pdsch->rnti = ueCb.crnti;
809 pdsch->numCodewords = 1;
810 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
812 pdsch->codeword[cwCount].targetCodeRate = 308;
813 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
814 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
815 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
816 pdsch->codeword[cwCount].rvIndex = 0;
818 tbSize +=TX_PAYLOAD_HDR_LEN;
819 pdsch->codeword[cwCount].tbSize = tbSize;
821 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
822 pdsch->numLayers = 1;
823 pdsch->transmissionScheme = 0;
825 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
826 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
827 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
828 pdsch->dmrs.scid = 0;
829 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
830 pdsch->dmrs.dmrsPorts = 0;
831 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
832 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
833 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
835 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
836 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
838 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
839 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
840 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
841 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
843 /* Find total symbols occupied including DMRS */
844 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
845 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
846 * in that case only PDSCH symbols are marked as occupied */
847 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
849 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
850 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
852 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
855 startSymbol = dmrsStartSymbol;
856 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
859 /* Allocate the number of PRBs required for DL PDSCH */
860 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
861 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
863 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
867 pdsch->beamPdschInfo.numPrgs = 1;
868 pdsch->beamPdschInfo.prgSize = 1;
869 pdsch->beamPdschInfo.digBfInterfaces = 0;
870 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
871 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
872 pdsch->txPdschPower.powerControlOffset = 0;
873 pdsch->txPdschPower.powerControlOffsetSS = 0;
875 pdcch->dci.pdschCfg = pdsch;
879 /*******************************************************************
881 * @brief Fills k0 and k1 information table for FDD
885 * Function : BuildK0K1TableForFdd
888 * Fills k0 and k1 information table for FDD
890 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
891 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
892 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
893 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
894 * @return ROK - success
897 * ****************************************************************/
898 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
899 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
902 uint8_t k1TmpVal =0, cfgIdx=0;
903 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
905 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
906 * required but this will require for harq processing */
907 // uint8_t k0TmpVal = 0;
908 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
909 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
911 /* Initialization the structure and storing the total slot values. */
912 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
913 k0K1InfoTbl->tblSize = cell->numSlots;
915 /* Storing time domain resource allocation list based on common or dedicated configuration. */
916 if(pdschCfgCmnPres == true)
918 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
919 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
921 /*TODO uncomment this line during harq processing */
922 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
927 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
928 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
930 /*TODO uncomment this line during harq processing */
931 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
935 /* Checking all the slots for K0 and K1 values. */
936 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
939 /* Storing the values of k0 based on time domain resource
940 * allocation list. If the value is unavailable then fill default values,
941 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
942 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
944 /* TODO These if 0 we will remove during harq processing */
946 if(pdschCfgCmnPres == true)
948 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
952 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
954 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
958 k0TmpVal = DEFAULT_K0_VALUE;
962 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
963 * then skip else continue storing the values. */
965 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
967 k1TmpVal = UlAckTbl[k1Index];
968 if(k1TmpVal <= MIN_NUM_K1_IDX)
973 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
974 /* TODO Store K1 index where harq feedback will be received in harq table. */
978 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
979 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
985 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
990 /*******************************************************************
992 * @brief Fills k0 and k1 information table
996 * Function : BuildK0K1Table
999 * Fills K0 and k1 information table
1001 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1002 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1003 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1004 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1005 * @return ROK - success
1008 * ****************************************************************/
1009 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1010 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1015 bool ulSlotPresent = false;
1016 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1017 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1018 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1019 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1022 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1024 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1030 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1031 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1032 k0K1InfoTbl->tblSize = cell->numSlots;
1033 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1035 /* Storing time domain resource allocation list based on common or
1036 * dedicated configuration availability. */
1037 if(pdschCfgCmnPres == true)
1039 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1040 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1042 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1047 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1048 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1050 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1054 /* Checking all possible indexes for K0 and K1 values. */
1055 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1057 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1058 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1059 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1064 /* Storing K0 , start symbol and length symbol for further processing.
1065 * If K0 value is not available then we can fill the default values
1066 * given in spec 38.331. */
1068 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1070 if(pdschCfgCmnPres == true)
1072 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1073 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1074 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1078 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1080 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1084 k0TmpVal = DEFAULT_K0_VALUE;
1086 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1087 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1090 /* If current slot + k0 is UL then skip the slot
1091 * else if it is DL slot then continue the next steps
1092 * else if it is a FLEXI slot then check symbols of slot, It should not
1093 * contain any UL slot. */
1094 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1095 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1096 if(slotCfg == UL_SLOT)
1100 if(slotCfg == FLEXI_SLOT)
1102 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1104 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1105 if(slotCfg == UL_SLOT)
1112 /* If current slot + k0 + k1 is a DL slot then skip the slot
1113 * else if it is UL slot then store the information
1114 * else if it is FLEXI slot then check the symbols, it must have
1115 * at least one UL symbol. */
1117 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1119 k1TmpVal = UlAckTbl[k1Index];
1120 if(k1TmpVal > MIN_NUM_K1_IDX)
1122 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1123 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1124 if(slotCfg == DL_SLOT)
1128 if(slotCfg == FLEXI_SLOT)
1130 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1132 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1134 ulSlotPresent = true;
1139 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1141 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1142 /* TODO Store K1 index where harq feedback will be received
1148 /* Store all the values if all condition satisfies. */
1151 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1152 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1158 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1165 /*******************************************************************
1167 * @brief Fills K2 information table for FDD
1171 * Function : BuildK2InfoTableForFdd
1174 * Fills K2 information table for FDD
1176 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1177 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1178 * @return ROK - success
1181 * ****************************************************************/
1182 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1183 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1185 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1187 /* Initialization the structure and storing the total slot values. */
1188 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1189 k2InfoTbl->tblSize = cell->numSlots;
1191 msg3K2InfoTbl->tblSize = cell->numSlots;
1193 /* Checking all possible indexes for K2. */
1194 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1196 /* Storing K2 values. */
1197 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1199 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1200 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1201 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1203 /* Updating K2 values for MSG3 */
1206 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1207 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1208 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1214 /*******************************************************************
1216 * @brief Fills K2 information table
1220 * Function : BuildK2InfoTable
1223 * Fills K2 information table
1225 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1226 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1227 * @return ROK - success
1230 * ****************************************************************/
1231 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1232 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1236 bool dlSymbolPresent = false;
1237 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1238 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1239 SlotConfig currentSlot;
1242 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1244 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1250 /* Initialization the structure and storing the total slot values. */
1251 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1252 k2InfoTbl->tblSize = cell->numSlots;
1254 msg3K2InfoTbl->tblSize = cell->numSlots;
1255 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1257 /* Checking all possible indexes for K2. */
1258 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1260 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1262 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1263 if(currentSlot != UL_SLOT)
1265 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1267 /* Storing k2, startSymbol, endSymbol information for further processing.
1268 * If k2 is absent then fill the default values given in spec 38.331
1269 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1270 k2Val = timeDomRsrcAllocList[k2Index].k2;
1273 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1276 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1279 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1282 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1285 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1290 /* Current slot + k2 should be either UL or FLEXI slot.
1291 * If slot is FLEXI then check all the symbols of that slot,
1292 * it should not contain any DL or FLEXI slot */
1293 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1294 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1295 if(slotCfg != DL_SLOT)
1297 if(slotCfg == FLEXI_SLOT)
1299 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1300 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1301 dlSymbolPresent = false;
1302 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1304 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1305 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1307 dlSymbolPresent = true;
1312 /* Store all the values if all condition satisfies. */
1313 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1315 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1316 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1317 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1323 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1325 /* Check for K2 for MSG3 */
1326 /* Current slot + k2 should be either UL or FLEXI slot.
1327 * If slot is FLEXI then check all the symbols of that slot,
1328 * it should not contain any DL or FLEXI slot */
1329 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1330 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1331 if(slotCfg != DL_SLOT)
1333 if(slotCfg == FLEXI_SLOT)
1335 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1336 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1337 dlSymbolPresent = false;
1338 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1340 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1341 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1343 dlSymbolPresent = true;
1348 /* Store all the values if all condition satisfies. */
1349 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1351 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1352 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1353 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1364 /*******************************************************************************************
1366 * @brief Allocate the PRB using RRM policy
1370 * Function : prbAllocUsingRRMPolicy
1373 * [Step1]: Traverse each Node in the LC list
1374 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1375 * [Step3]: Calcualte the maxPRB for this LC.
1376 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1378 * b. For Default, just SharedPRB count
1379 * [Step4]: If the LC is the First one to be allocated for this UE then add
1380 * TX_PAYLODN_LEN to reqBO
1381 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1382 * based on reqBO and maxPRB left.
1383 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1384 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1385 * [Step8]: Continue the next loop from List->head
1388 * [Exit1]: If all the LCs are allocated in list
1389 * [Exit2]: If PRBs are exhausted
1391 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1392 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1393 * I/P > mcsIdx and PDSCH symbols count
1394 * I/P & O/P > Shared PRB , reserved PRB Count
1395 * I/P & O/P > Total TBS size accumulated
1396 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1397 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1401 * *******************************************************************************************/
1402 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1403 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1405 CmLList *node = NULLP;
1406 LcInfo *lcNode = NULLP;
1407 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1411 DU_LOG("\nERROR --> SCH: LcList not present");
1416 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1417 * For Other LcList, remReservedPRB = 0*/
1418 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1420 remReservedPRB = *reservedPRB;
1427 /*For Debugging purpose*/
1430 lcNode = (LcInfo *)node->node;
1432 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1433 * process of LCID which was fully allocated. Check is just for safety purpose*/
1434 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1436 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1438 deleteNodeFromLList(lcLL, node);
1439 SCH_FREE(lcNode, sizeof(LcInfo));
1444 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1445 if(lcNode->allocBO != 0)
1447 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1451 /*[Exit2]: If PRBs are exhausted*/
1454 /*Loop Exit: All resources exhausted*/
1455 if(remReservedPRB == 0 && *sharedPRB == 0)
1457 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1463 /*Loop Exit: All resources exhausted*/
1466 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1472 maxPRB = remReservedPRB + *sharedPRB;
1475 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1477 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1479 *isTxPayloadLenAdded = TRUE;
1480 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1481 mcsIdx, numSymbols, maxPRB, &estPrb);
1482 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1484 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1486 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1489 lcNode->reqBO += UL_GRANT_SIZE;
1490 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1495 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1496 mcsIdx, numSymbols, maxPRB, &estPrb);
1499 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1500 * estimated PRB allocated*/
1501 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1503 remReservedPRB = remReservedPRB - estPrb;
1505 else /*LC requirement need PRB share from SharedPRB*/
1507 if(*sharedPRB <= (estPrb - remReservedPRB))
1509 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1514 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1520 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1521 lcNode->allocPRB = estPrb;
1522 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1524 /*[Step8]:Next loop: First LC to be picked from the list
1525 * because Allocated Nodes are moved to the last*/
1532 /*******************************************************************************************
1534 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1539 * Function : updateGrantSizeForBoRpt
1542 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1543 * BO Report in dlMsgAlloc Pointer
1545 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1546 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1547 * I/P & O/P > BsrInfo (applicable for UL)
1548 * I/P & O/P > accumalatedBOSize
1551 * *******************************************************************************************/
1552 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1553 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1555 CmLList *node = NULLP, *next = NULLP;
1556 LcInfo *lcNode = NULLP;
1557 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1561 DU_LOG("\nERROR --> SCH: LcList not present");
1579 lcNode = (LcInfo *)node->node;
1582 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1583 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1584 if(dlMsgAlloc != NULLP)
1586 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1588 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1589 * report for allocation can be sent to MAC*/
1590 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1591 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1593 /*Calculate the Total Payload/BO size allocated*/
1594 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1596 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1597 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1599 dlMsgSchInfo->numLc++;
1600 /*The LC has been fully allocated, clean it*/
1601 if(lcNode->reqBO == 0)
1603 handleLcLList(lcLL, lcNode->lcId, DELETE);
1606 else if(bsrInfo != NULLP)
1608 *accumalatedBOSize += lcNode->allocBO;
1609 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1610 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1618 /*******************************************************************
1620 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1624 * Function : fillDlMsgInfo
1627 * fill DL message information for MSG4 and Dedicated DL Msg
1629 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1632 *******************************************************************/
1633 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti)
1635 dlMsgInfo->crnti = crnti;
1637 dlMsgInfo->harqProcNum = 0;
1638 dlMsgInfo->dlAssignIdx = 0;
1639 dlMsgInfo->pucchTpc = 0;
1640 dlMsgInfo->pucchResInd = 0;
1641 dlMsgInfo->harqFeedbackInd = 0;
1642 dlMsgInfo->dciFormatId = 1;
1645 /*******************************************************************
1647 * @brief sch Process pending Msg4 Req
1651 * Function : schProcessMsg4Req
1654 * sch Process pending Msg4 Req
1656 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1657 * @return ROK - success
1660 *******************************************************************/
1662 bool schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
1664 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1665 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1666 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1667 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1671 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1675 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1676 &pucchTime) != true )
1681 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1683 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1684 if(dciSlotAlloc == NULLP)
1686 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1689 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1690 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1691 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1694 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1696 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1697 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols)) != ROK)
1699 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1700 if(dciSlotAlloc->numSchedInfo == 0)
1702 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1703 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1706 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1710 /* Check if both DCI and RAR are sent in the same slot.
1711 * If not, allocate memory RAR PDSCH slot to store RAR info
1713 if(pdcchTime.slot == pdschTime.slot)
1715 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1716 dciSlotAlloc->numSchedInfo++;
1720 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1721 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1723 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1724 if(msg4SlotAlloc == NULLP)
1726 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1727 if(dciSlotAlloc->numSchedInfo == 0)
1729 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1730 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1733 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1736 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1737 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1738 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1741 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1743 /* Copy all RAR info */
1744 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1745 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1746 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1747 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1749 /* Assign correct PDU types in corresponding slots */
1750 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1751 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1752 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1754 dciSlotAlloc->numSchedInfo++;
1755 msg4SlotAlloc->numSchedInfo++;
1758 /* PUCCH resource */
1759 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti);
1761 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1762 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1763 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1764 cell->raCb[ueId-1].msg4recvd = FALSE;
1768 /*******************************************************************
1770 * @brief Handler to calculate TBS size for BSR requested
1774 * Function : schCalculateUlTbs
1776 * Functionality: Function will note the required TBS for each LCGIDX and use
1777 * the Priority LCG List and RRM policy to allocate the TBS size
1779 * @params [in] ueCb (Pointer to UE CB)
1780 * [in] puschTime (Time slot where PUSCH will be sent)
1781 * [in] symbLen (No of Symbols used for PUSCH transmission)
1782 * [out] startPrb(Pointer to startPRB which will be calculated while
1783 * finding the best Free Block)
1784 * [out] totTBS(Pointer to total TBS size)
1786 * @return bool : true > Scheduling of UL grant is successful
1787 * false > vice versa
1789 * ****************************************************************/
1790 bool schCalculateUlTbs(SchUeCb *ueCb, SlotTimingInfo puschTime, uint8_t symbLen,\
1791 uint16_t *startPrb, uint32_t *totTBS)
1793 uint16_t mcsIdx = 0;
1794 CmLListCp *lcLL = NULLP;
1795 uint16_t lcgIdx = 0, lcId =0, maxFreePRB = 0;
1801 for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
1803 if(ueCb->bsrInfo[lcgIdx].dataVol == 0)
1808 /*TODO: lcgIdx and LCID has been implemented as one to one mapping.
1809 * Need to check the mapping to figure out the LCID and lcgIdx once L2
1810 * spec specifies any logic*/
1812 if(ueCb->ulInfo.ulLcCtxt[lcId].isDedicated)
1814 lcLL = &(ueCb->ulLcPrbEst.dedLcInfo->dedLcList);
1818 lcLL = &(ueCb->ulLcPrbEst.defLcList);
1821 /*[Step2]: Update the reqPRB and Payloadsize for this LC in the appropriate List*/
1822 if(updateLcListReqPRB(lcLL, lcId, ueCb->bsrInfo[lcgIdx].dataVol) != ROK)
1824 DU_LOG("\nERROR --> SCH: LcgId:%d updation failed",lcId);
1829 if ((ueCb->ulLcPrbEst.defLcList.count == 0) && \
1830 ((ueCb->ulLcPrbEst.dedLcInfo == NULL) || (ueCb->ulLcPrbEst.dedLcInfo->dedLcList.count == 0)))
1834 *startPrb = MAX_NUM_RB;
1835 *totTBS = schCalcTbSize(UL_GRANT_SIZE);
1838 /*Returning true when NO Grant is there for UE as this is not scheduling
1843 maxFreePRB = searchLargestFreeBlock(ueCb->cellCb, puschTime, startPrb, DIR_UL);
1845 /*[Step4]: Estimation of PRB and BO which can be allocated to each LC in
1846 * the list based on RRM policy*/
1848 /*Either this UE contains no reservedPRB pool fir dedicated S-NSSAI or
1849 * Num of Free PRB available is not enough to reserve Dedicated PRBs*/
1852 mcsIdx = ueCb->ueCfg.ulModInfo.mcsIndex;
1853 if((ueCb->ulLcPrbEst.dedLcInfo == NULLP)
1854 || ((maxFreePRB < ueCb->ulLcPrbEst.dedLcInfo->rsvdDedicatedPRB)))
1856 ueCb->ulLcPrbEst.sharedNumPrb = maxFreePRB;
1857 DU_LOG("\nDEBUG --> SCH : UL Only Default Slice is scheduled, sharedPRB Count:%d",\
1858 ueCb->ulLcPrbEst.sharedNumPrb);
1860 /*PRB Alloc for Default LCs*/
1861 prbAllocUsingRRMPolicy(&(ueCb->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen,\
1862 &(ueCb->ulLcPrbEst.sharedNumPrb), NULLP, NULLP,&(ueCb->srRcvd));
1866 ueCb->ulLcPrbEst.sharedNumPrb = maxFreePRB - ueCb->ulLcPrbEst.dedLcInfo->rsvdDedicatedPRB;
1868 /*PRB Alloc for Dedicated LCs*/
1869 prbAllocUsingRRMPolicy(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), TRUE, mcsIdx, symbLen,\
1870 &(ueCb->ulLcPrbEst.sharedNumPrb), &(ueCb->ulLcPrbEst.dedLcInfo->rsvdDedicatedPRB),\
1871 NULLP,&(ueCb->srRcvd));
1873 /*PRB Alloc for Default LCs*/
1874 prbAllocUsingRRMPolicy(&(ueCb->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen, \
1875 &(ueCb->ulLcPrbEst.sharedNumPrb), &(ueCb->ulLcPrbEst.dedLcInfo->rsvdDedicatedPRB),\
1876 NULLP,&(ueCb->srRcvd));
1879 /*[Step5]:Traverse each LCID in LcList to calculate the exact Scheduled Bytes
1880 * using allocated BO per LC and Update dlMsgAlloc(BO report for MAC*/
1881 if(ueCb->ulLcPrbEst.dedLcInfo != NULLP)
1882 updateGrantSizeForBoRpt(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), NULLP, ueCb->bsrInfo, totTBS);
1884 updateGrantSizeForBoRpt(&(ueCb->ulLcPrbEst.defLcList), NULLP, ueCb->bsrInfo, totTBS);
1886 /*Below case will hit if NO LC(s) are allocated due to resource crunch*/
1891 DU_LOG("\nERROR --> SCH : NO FREE PRB!!");
1895 /*Schedule the LC for next slot*/
1896 DU_LOG("\nDEBUG --> SCH : No LC has been scheduled");
1903 /*******************************************************************
1905 * @brief sch Process pending Sr or Bsr Req
1909 * Function : schProcessSrOrBsrReq
1912 * sch Process pending Sr or Bsr Req
1914 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1915 * @return ROK - success
1918 *******************************************************************/
1919 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
1921 bool k2Found = FALSE, ret = FALSE;
1922 uint8_t startSymb = 0, symbLen = 0;
1923 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
1924 uint16_t startPrb = 0;
1925 uint32_t totDataReq = 0; /* in bytes */
1927 SchPuschInfo *puschInfo;
1928 DciInfo *dciInfo = NULLP;
1929 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
1930 SlotTimingInfo dciTime, puschTime;
1934 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1938 ueCb = &cell->ueCb[ueId-1];
1942 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : UE is NULL");
1945 /* Calculating time frame to send DCI for SR */
1946 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
1948 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1951 if(ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
1952 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2InfoTbl;
1954 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
1956 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
1958 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
1960 if(!ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
1962 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
1963 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
1964 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
1968 k2Val = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
1969 startSymb = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
1970 symbLen = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
1973 /* Calculating time frame to send PUSCH for SR */
1974 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val);
1976 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1979 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
1990 ret = schCalculateUlTbs(ueCb, puschTime, symbLen, &startPrb, &totDataReq);
1991 if(totDataReq > 0 && ret == TRUE)
1993 SCH_ALLOC(dciInfo, sizeof(DciInfo));
1996 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
1998 if(ueCb->ulLcPrbEst.dedLcInfo != NULLP)
1999 updateBsrAndLcList(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), ueCb->bsrInfo, RFAILED);
2001 updateBsrAndLcList(&(ueCb->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2004 cell->schDlSlotInfo[dciTime.slot]->ulGrant = dciInfo;
2005 memset(dciInfo,0,sizeof(DciInfo));
2007 /* Update PUSCH allocation */
2008 if(schFillPuschAlloc(ueCb, puschTime, totDataReq, startSymb, symbLen, startPrb) == ROK)
2010 if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
2012 puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
2013 if(puschInfo != NULLP)
2015 /* Fill DCI for UL grant */
2016 schFillUlDci(ueCb, puschInfo, dciInfo);
2017 memcpy(&dciInfo->slotIndInfo, &dciTime, sizeof(SlotTimingInfo));
2018 ueCb->srRcvd = false;
2019 ueCb->bsrRcvd = false;
2020 cell->schUlSlotInfo[puschTime.slot]->puschUe = ueId;
2021 if(ueCb->ulLcPrbEst.dedLcInfo != NULLP)
2022 updateBsrAndLcList(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), ueCb->bsrInfo, ROK);
2024 updateBsrAndLcList(&(ueCb->ulLcPrbEst.defLcList), ueCb->bsrInfo, ROK);
2030 if(ueCb->ulLcPrbEst.dedLcInfo != NULLP)
2031 updateBsrAndLcList(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), ueCb->bsrInfo, RFAILED);
2033 updateBsrAndLcList(&(ueCb->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2040 /*******************************************************************
2042 * @brief sch Process pending Sr or Bsr Req
2046 * Function : updateBsrAndLcList
2049 * Updating the BSRInfo in UECB and Lclist
2051 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
2052 * @return ROK - success
2055 *******************************************************************/
2056 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
2058 CmLList *node = NULLP, *next = NULLP;
2059 LcInfo *lcNode = NULLP;
2063 DU_LOG("\nERROR --> SCH: LcList not present");
2080 lcNode = (LcInfo *)node->node;
2083 /*Only when Status is OK then allocation is marked as ZERO and reqBO
2084 * is updated in UE's DB. If Failure, then allocation is added to reqBO
2085 * and same is updated in Ue's DB inside BSR Info structure*/
2088 lcNode->allocBO = 0;
2091 lcNode->reqBO += lcNode->allocBO;
2092 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
2093 if(lcNode->reqBO == 0)
2095 handleLcLList(lcLL, lcNode->lcId, DELETE);
2101 /**********************************************************************
2103 **********************************************************************/