1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
46 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
54 * @brief common resource allocation for SSB
58 * Function : schBroadcastSsbAlloc
60 * This function handles common scheduling for SSB
62 * @param[in] SchCellCb *cell, cell cb
63 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
66 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
69 uint8_t ssbStartSymb, idx;
71 SchDlSlotInfo *schDlSlotInfo;
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
80 if(dlBrdcstAlloc == NULL)
82 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
86 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
87 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
88 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
90 /* Assign interface structure */
91 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
94 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
95 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
96 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
97 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
98 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
99 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
102 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
104 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
109 schDlSlotInfo->ssbPres = true;
110 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
115 * @brief common resource allocation for SIB1
119 * Function : schBroadcastSib1Alloc
121 * This function handles common scheduling for SIB1
123 * @param[in] SchCellCb *cell, cell cb
124 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
127 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
129 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
131 FreqDomainAlloc freqAlloc;
132 TimeDomainAlloc timeAlloc;
133 SchDlSlotInfo *schDlSlotInfo = NULLP;
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
141 if(dlBrdcstAlloc == NULL)
143 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
147 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
148 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
149 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
150 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
152 /* Find total symbols used including DMRS */
153 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
154 * in that case only PDSCH symbols are marked as occupied */
155 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
156 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
158 startSymbol = timeAlloc.startSymb;
159 numSymbol = timeAlloc.numSymb;
161 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
164 startSymbol = dmrsStartSymbol;
165 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
169 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
171 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
175 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
176 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
177 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
178 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
179 schDlSlotInfo->sib1Pres = true;
183 /*******************************************************************
185 * @brief Handles sending UL scheduler info to MAC
189 * Function : sendUlSchInfoToMac
192 * Sends UL Sch info to MAC from SCH
195 * @return ROK - success
198 * ****************************************************************/
199 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
203 memset(&pst, 0, sizeof(Pst));
204 FILL_PST_SCH_TO_MAC(pst, inst);
205 pst.event = EVENT_UL_SCH_INFO;
207 return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
211 * @brief Function to fill Pucch Format 0
215 * Function : fillPucchFormat0
217 * Function to fill Pucch format 0
219 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
223 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
225 if(resrcInfo->SchPucchFormat.format0)
227 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
228 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
229 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
230 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
231 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
236 * @brief Function to fill Pucch Format 1
240 * Function : fillPucchFormat1
242 * Function to fill Pucch format 1
244 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
248 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
250 if(resrcInfo->SchPucchFormat.format1)
252 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
253 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
254 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
255 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
256 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
257 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
262 * @brief Function to fill Pucch format for UL Sched Info
266 * Function : fillUlSchedPucchFormat
268 * Function to fill Pucch format for UL Sched Info
270 * @param[in] pucchFormat , SchPucchInfo pointer,
271 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
275 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
276 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
285 fillPucchFormat0(ulSchedPucch, resrcInfo);
292 fillPucchFormat1(ulSchedPucch, resrcInfo);
296 memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
299 }/* To Add support for more Pucch Format */
302 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
310 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
314 * Function : fillUlSchedPucchDedicatedCfg
316 * Function to fill Pucch Dedicated Cfg for UL Sched Info
318 * @param[in] pucchFormat to be filled
319 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
323 uint8_t fillUlSchedPucchDedicatedCfg(uint16_t numSlots, SchPucchCfg *pucchDedCfg,\
324 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
326 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
327 uint16_t srOffset = 0;
330 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
332 //Assuming one entry in the list
333 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
335 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
337 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
338 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
340 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
341 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
342 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
343 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
344 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
345 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
352 if(pucchDedCfg->format1)
354 memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
355 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
360 /* setting SR and UCI flag */
361 if(pucchDedCfg->schedReq)
363 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
365 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
366 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
369 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
371 ulSchedPucch->srFlag = true;
372 ulSchedPucch->uciFlag = true;
379 * @brief Function to fill Pucch Resource Info
383 * Function : fillPucchResourceInfo
385 * Function to fill Pucch Resource Info
387 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
388 * @return ROK/RFAILED
391 uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst)
393 uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
394 SchCellCb *cell = schCb[inst].cells[inst];
395 SchPucchCfgCmn *pucchCfg = NULLP;
396 SchBwpParams *ulBwp = NULLP;
398 GET_UE_IDX(schPucchInfo->rnti, ueIdx);
399 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
401 /* fill pucch dedicated cfg */
402 ret = fillUlSchedPucchDedicatedCfg(cell->numSlots,\
403 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg, &cell->slotInfo, schPucchInfo);
406 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
407 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
413 /* fill pucch common cfg */
414 /* derive pucchResourceSet from schCellCfg */
415 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
416 pucchIdx = pucchCfg->pucchResourceCommon;
417 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
418 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
419 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
420 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
421 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
422 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
424 /* set SR and UCI flag to false */
425 schPucchInfo->srFlag = true;
426 schPucchInfo->uciFlag = true;
428 /* set HARQ flag to true */
429 schPucchInfo->harqFlag = true;
430 schPucchInfo->numHarqBits = 1; /* 1 bit for HARQ */
436 * @brief resource allocation for UL
440 * Function : schUlResAlloc
442 * This function handles UL Resource allocation
444 * @param[in] SchCellCb *cell, cellCb
447 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
450 UlSchedInfo ulSchedInfo;
451 SchUlSlotInfo *schUlSlotInfo = NULLP;
452 SlotTimingInfo ulTimingInfo;
453 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
456 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA);
458 ulSchedInfo.cellId = cell->cellId;
459 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
460 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
461 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
463 /* Schedule resources for PRACH */
464 if(cell->firstSib1Transmitted)
465 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
467 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
468 if(schUlSlotInfo->schPuschInfo)
470 ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
471 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
472 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
473 sizeof(SchPuschInfo));
474 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
475 schUlSlotInfo->schPuschInfo = NULL;
478 if(schUlSlotInfo->pucchPres)
480 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
481 fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst);
482 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
483 sizeof(SchPucchInfo));
484 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
488 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
491 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
494 schInitUlSlot(schUlSlotInfo);
498 /*******************************************************************
500 * @brief Fills pdcch and pdsch info for msg4
504 * Function : schDlRsrcAllocMsg4
507 * Fills pdcch and pdsch info for msg4
510 * @return ROK - success
513 * ****************************************************************/
514 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
515 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols)
517 uint8_t coreset0Idx = 0;
518 uint8_t firstSymbol = 0;
519 uint8_t numSymbols = 0;
520 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
521 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
524 SchBwpDlCfg *initialBwp = NULLP;
525 PdcchCfg *pdcch = NULLP;
526 PdschCfg *pdsch = NULLP;
528 DlMsgSchInfo *msg4Alloc = NULLP;
532 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
536 if(dlMsgAlloc == NULL)
538 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
542 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
543 initialBwp = &cell->cellCfg.schInitialDlBwp;
544 pdcch = &msg4Alloc->dlMsgPdcchCfg;
545 pdsch = &msg4Alloc->dlMsgPdschCfg;
546 bwp = &msg4Alloc->bwp;
547 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
549 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti);
550 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
552 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
553 numRbs = coresetIdxTable[coreset0Idx][1];
554 numSymbols = coresetIdxTable[coreset0Idx][2];
556 /* calculate time domain parameters */
557 uint16_t mask = 0x2000;
558 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
560 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
567 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
568 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
569 bwp->subcarrierSpacing = initialBwp->bwp.scs;
570 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
572 /* fill the PDCCH PDU */
573 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
574 pdcch->coresetCfg.durationSymbols = numSymbols;
575 memcpy(pdcch->coresetCfg.freqDomainResource, \
576 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
578 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
579 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
580 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
581 pdcch->coresetCfg.coreSetType = 0;
582 pdcch->coresetCfg.coreSetSize = numRbs;
583 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
584 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
586 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
587 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
588 pdcch->dci.scramblingRnti = 0;
589 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
590 pdcch->dci.aggregLevel = 4;
591 pdcch->dci.beamPdcchInfo.numPrgs = 1;
592 pdcch->dci.beamPdcchInfo.prgSize = 1;
593 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
594 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
595 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
596 pdcch->dci.txPdcchPower.powerValue = 0;
597 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
598 pdcch->dci.pdschCfg = pdsch;
600 /* fill the PDSCH PDU */
602 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
603 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
605 pdsch->numCodewords = 1;
606 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
608 pdsch->codeword[cwCount].targetCodeRate = 308;
609 pdsch->codeword[cwCount].qamModOrder = 2;
610 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
611 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
612 pdsch->codeword[cwCount].rvIndex = 0;
613 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
614 pdsch->codeword[cwCount].tbSize = tbSize;
616 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
617 pdsch->numLayers = 1;
618 pdsch->transmissionScheme = 0;
620 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
621 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
622 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
623 pdsch->dmrs.scid = 0;
624 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
625 pdsch->dmrs.dmrsPorts = 0;
626 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
627 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
628 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
630 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
631 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
633 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
634 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
635 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
636 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
638 /* Find total symbols occupied including DMRS */
639 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
640 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
641 * in that case only PDSCH symbols are marked as occupied */
642 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
644 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
645 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
647 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
650 startSymbol = dmrsStartSymbol;
651 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
654 /* Allocate the number of PRBs required for RAR PDSCH */
655 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
656 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
658 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
662 pdsch->beamPdschInfo.numPrgs = 1;
663 pdsch->beamPdschInfo.prgSize = 1;
664 pdsch->beamPdschInfo.digBfInterfaces = 0;
665 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
666 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
667 pdsch->txPdschPower.powerControlOffset = 0;
668 pdsch->txPdschPower.powerControlOffsetSS = 0;
670 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
674 /*******************************************************************
676 * @brief Scheduling for Pucch Resource
680 * Function : schAllocPucchResource
683 * Scheduling for Pucch Resource
685 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
686 * @return ROK - success
689 *******************************************************************/
691 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti)
693 uint16_t pucchSlot = 0;
694 SchUlSlotInfo *schUlSlotInfo = NULLP;
696 pucchSlot = pucchTime.slot;
697 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
698 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
700 schUlSlotInfo->pucchPres = true;
701 schUlSlotInfo->schPucchInfo.rnti = crnti;
706 /*******************************************************************
708 * @brief Fills pdcch and pdsch info for dedicated DL msg
712 * Function : schDlRsrcAllocDlMsg
715 * Fills pdcch and pdsch info for dl msg
718 * @return ROK - success
721 * ****************************************************************/
722 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
723 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol, uint8_t pdschNumSymbols)
726 PdcchCfg *pdcch = NULLP;
727 PdschCfg *pdsch = NULLP;
730 SchControlRsrcSet coreset1;
731 SchPdschConfig pdschCfg;
732 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
734 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
735 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
736 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
738 GET_UE_IDX(crnti, ueIdx);
739 ueCb = cell->ueCb[ueIdx-1];
740 coreset1 = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
741 pdschCfg = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdschCfg;
744 bwp->freqAlloc.numPrb = MAX_NUM_RB;
745 bwp->freqAlloc.startPrb = 0;
746 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
747 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
749 /* fill the PDCCH PDU */
750 //Considering coreset1 also starts from same symbol as coreset0
751 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
752 pdcch->coresetCfg.durationSymbols = coreset1.duration;
753 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
754 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
755 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
756 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
757 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
758 //Considering number of RBs in coreset1 is same as coreset0
759 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
760 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
761 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
763 pdcch->dci.rnti = ueCb.crnti;
764 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
765 pdcch->dci.scramblingRnti = 0;
766 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
767 pdcch->dci.aggregLevel = 4;
768 pdcch->dci.beamPdcchInfo.numPrgs = 1;
769 pdcch->dci.beamPdcchInfo.prgSize = 1;
770 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
771 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
772 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
773 pdcch->dci.txPdcchPower.powerValue = 0;
774 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
776 /* fill the PDSCH PDU */
778 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
779 pdsch->rnti = ueCb.crnti;
781 pdsch->numCodewords = 1;
782 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
784 pdsch->codeword[cwCount].targetCodeRate = 308;
785 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
786 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
787 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
788 pdsch->codeword[cwCount].rvIndex = 0;
790 tbSize +=TX_PAYLOAD_HDR_LEN;
791 pdsch->codeword[cwCount].tbSize = tbSize;
793 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
794 pdsch->numLayers = 1;
795 pdsch->transmissionScheme = 0;
797 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
798 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
799 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
800 pdsch->dmrs.scid = 0;
801 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
802 pdsch->dmrs.dmrsPorts = 0;
803 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
804 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
805 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
807 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
808 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
810 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
811 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
812 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
813 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
815 /* Find total symbols occupied including DMRS */
816 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
817 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
818 * in that case only PDSCH symbols are marked as occupied */
819 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
821 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
822 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
824 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
827 startSymbol = dmrsStartSymbol;
828 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
831 /* Allocate the number of PRBs required for DL PDSCH */
832 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
833 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
835 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
839 pdsch->beamPdschInfo.numPrgs = 1;
840 pdsch->beamPdschInfo.prgSize = 1;
841 pdsch->beamPdschInfo.digBfInterfaces = 0;
842 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
843 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
844 pdsch->txPdschPower.powerControlOffset = 0;
845 pdsch->txPdschPower.powerControlOffsetSS = 0;
847 pdcch->dci.pdschCfg = pdsch;
851 /*******************************************************************
853 * @brief Fills k0 and k1 information table for FDD
857 * Function : BuildK0K1TableForFdd
860 * Fills k0 and k1 information table for FDD
862 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
863 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
864 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
865 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
866 * @return ROK - success
869 * ****************************************************************/
870 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
871 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
874 uint8_t k1TmpVal =0, cfgIdx=0;
875 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
877 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
878 * required but this will require for harq processing */
879 // uint8_t k0TmpVal = 0;
880 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
881 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
883 /* Initialization the structure and storing the total slot values. */
884 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
885 k0K1InfoTbl->tblSize = cell->numSlots;
887 /* Storing time domain resource allocation list based on common or dedicated configuration. */
888 if(pdschCfgCmnPres == true)
890 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
891 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
893 /*TODO uncomment this line during harq processing */
894 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
899 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
900 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
902 /*TODO uncomment this line during harq processing */
903 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
907 /* Checking all the slots for K0 and K1 values. */
908 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
911 /* Storing the values of k0 based on time domain resource
912 * allocation list. If the value is unavailable then fill default values,
913 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
914 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
916 /* TODO These if 0 we will remove during harq processing */
918 if(pdschCfgCmnPres == true)
920 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
924 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
926 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
930 k0TmpVal = DEFAULT_K0_VALUE;
934 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
935 * then skip else continue storing the values. */
937 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
939 k1TmpVal = UlAckTbl[k1Index];
940 if(k1TmpVal <= MIN_NUM_K1_IDX)
945 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
946 /* TODO Store K1 index where harq feedback will be received in harq table. */
950 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
951 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
957 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
962 /*******************************************************************
964 * @brief Fills k0 and k1 information table
968 * Function : BuildK0K1Table
971 * Fills K0 and k1 information table
973 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
974 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
975 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
976 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
977 * @return ROK - success
980 * ****************************************************************/
981 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
982 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
987 bool ulSlotPresent = false;
988 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
989 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
990 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
991 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
994 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
996 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1002 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1003 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1004 k0K1InfoTbl->tblSize = cell->numSlots;
1005 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1007 /* Storing time domain resource allocation list based on common or
1008 * dedicated configuration availability. */
1009 if(pdschCfgCmnPres == true)
1011 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1012 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1014 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1019 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1020 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1022 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1026 /* Checking all possible indexes for K0 and K1 values. */
1027 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1029 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1030 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1031 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1036 /* Storing K0 , start symbol and length symbol for further processing.
1037 * If K0 value is not available then we can fill the default values
1038 * given in spec 38.331. */
1040 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1042 if(pdschCfgCmnPres == true)
1044 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1045 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1046 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1050 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1052 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1056 k0TmpVal = DEFAULT_K0_VALUE;
1058 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1059 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1062 /* If current slot + k0 is UL then skip the slot
1063 * else if it is DL slot then continue the next steps
1064 * else if it is a FLEXI slot then check symbols of slot, It should not
1065 * contain any UL slot. */
1066 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1067 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1068 if(slotCfg == UL_SLOT)
1072 if(slotCfg == FLEXI_SLOT)
1074 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1076 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1077 if(slotCfg == UL_SLOT)
1084 /* If current slot + k0 + k1 is a DL slot then skip the slot
1085 * else if it is UL slot then store the information
1086 * else if it is FLEXI slot then check the symbols, it must have
1087 * at least one UL symbol. */
1089 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1091 k1TmpVal = UlAckTbl[k1Index];
1092 if(k1TmpVal > MIN_NUM_K1_IDX)
1094 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1095 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1096 if(slotCfg == DL_SLOT)
1100 if(slotCfg == FLEXI_SLOT)
1102 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1104 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1106 ulSlotPresent = true;
1111 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1113 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1114 /* TODO Store K1 index where harq feedback will be received
1120 /* Store all the values if all condition satisfies. */
1123 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1124 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1130 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1137 /*******************************************************************
1139 * @brief Fills K2 information table for FDD
1143 * Function : BuildK2InfoTableForFdd
1146 * Fills K2 information table for FDD
1148 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1149 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1150 * @return ROK - success
1153 * ****************************************************************/
1154 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1155 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1157 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1159 /* Initialization the structure and storing the total slot values. */
1160 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1161 k2InfoTbl->tblSize = cell->numSlots;
1163 msg3K2InfoTbl->tblSize = cell->numSlots;
1165 /* Checking all possible indexes for K2. */
1166 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1168 /* Storing K2 values. */
1169 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1171 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1172 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1173 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1175 /* Updating K2 values for MSG3 */
1178 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1179 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1180 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1186 /*******************************************************************
1188 * @brief Fills K2 information table
1192 * Function : BuildK2InfoTable
1195 * Fills K2 information table
1197 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1198 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1199 * @return ROK - success
1202 * ****************************************************************/
1203 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1204 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1208 bool dlSymbolPresent = false;
1209 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1210 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1211 SlotConfig currentSlot;
1214 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1216 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1222 /* Initialization the structure and storing the total slot values. */
1223 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1224 k2InfoTbl->tblSize = cell->numSlots;
1226 msg3K2InfoTbl->tblSize = cell->numSlots;
1227 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1229 /* Checking all possible indexes for K2. */
1230 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1232 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1234 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1235 if(currentSlot != UL_SLOT)
1237 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1239 /* Storing k2, startSymbol, endSymbol information for further processing.
1240 * If k2 is absent then fill the default values given in spec 38.331
1241 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1242 k2Val = timeDomRsrcAllocList[k2Index].k2;
1245 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1248 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1251 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1254 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1257 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1262 /* Current slot + k2 should be either UL or FLEXI slot.
1263 * If slot is FLEXI then check all the symbols of that slot,
1264 * it should not contain any DL or FLEXI slot */
1265 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1266 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1267 if(slotCfg != DL_SLOT)
1269 if(slotCfg == FLEXI_SLOT)
1271 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1272 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1273 dlSymbolPresent = false;
1274 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1276 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1277 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1279 dlSymbolPresent = true;
1284 /* Store all the values if all condition satisfies. */
1285 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1287 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1288 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1289 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1295 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1297 /* Check for K2 for MSG3 */
1298 /* Current slot + k2 should be either UL or FLEXI slot.
1299 * If slot is FLEXI then check all the symbols of that slot,
1300 * it should not contain any DL or FLEXI slot */
1301 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1302 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1303 if(slotCfg != DL_SLOT)
1305 if(slotCfg == FLEXI_SLOT)
1307 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1308 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1309 dlSymbolPresent = false;
1310 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1312 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1313 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1315 dlSymbolPresent = true;
1320 /* Store all the values if all condition satisfies. */
1321 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1323 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1324 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1325 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1336 /*******************************************************************************************
1338 * @brief Allocate the PRB using RRM policy
1342 * Function : prbAllocUsingRRMPolicy
1345 * [Step1]: Traverse each Node in the LC list
1346 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1347 * [Step3]: Calcualte the maxPRB for this LC.
1348 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1350 * b. For Default, just SharedPRB count
1351 * [Step4]: If the LC is the First one to be allocated for this UE then add
1352 * TX_PAYLODN_LEN to reqBO
1353 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1354 * based on reqBO and maxPRB left.
1355 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1356 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1357 * [Step8]: Continue the next loop from List->head
1360 * [Exit1]: If all the LCs are allocated in list
1361 * [Exit2]: If PRBs are exhausted
1363 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1364 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1365 * I/P > mcsIdx and PDSCH symbols count
1366 * I/P & O/P > Shared PRB , reserved PRB Count
1367 * I/P & O/P > Total TBS size accumulated
1368 * I/P & O/P > isTxPayloadLenAdded : Decision flag to add the TX_PAYLOAD_HDR_LEN
1372 * *******************************************************************************************/
1373 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1374 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded)
1376 CmLList *node = NULLP;
1377 LcInfo *lcNode = NULLP;
1378 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1382 DU_LOG("\nERROR --> SCH: LcList not present");
1387 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1388 * For Other LcList, remReservedPRB = 0*/
1389 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1391 remReservedPRB = *reservedPRB;
1398 /*For Debugging purpose*/
1401 lcNode = (LcInfo *)node->node;
1403 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1404 * process of LCID which was fully allocated. Check is just for safety purpose*/
1405 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1407 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1409 deleteNodeFromLList(lcLL, node);
1410 SCH_FREE(lcNode, sizeof(LcInfo));
1415 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1416 if(lcNode->allocBO != 0)
1418 DU_LOG("\nWARNING --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1422 /*[Exit2]: If PRBs are exhausted*/
1425 /*Loop Exit: All resources exhausted*/
1426 if(remReservedPRB == 0 && *sharedPRB == 0)
1428 DU_LOG("\nWARNING --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1434 /*Loop Exit: All resources exhausted*/
1437 DU_LOG("\nWARNING --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1443 maxPRB = remReservedPRB + *sharedPRB;
1446 if(!(*isTxPayloadLenAdded))
1448 DU_LOG("\nINFO --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1450 *isTxPayloadLenAdded = TRUE;
1451 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1452 mcsIdx, numSymbols, maxPRB, &estPrb);
1453 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1458 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1459 mcsIdx, numSymbols, maxPRB, &estPrb);
1462 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1463 * estimated PRB allocated*/
1464 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1466 remReservedPRB = remReservedPRB - estPrb;
1468 else /*LC requirement need PRB share from SharedPRB*/
1470 if(*sharedPRB <= (estPrb - remReservedPRB))
1472 DU_LOG("\nINFO --> SCH: SharedPRB is less");
1477 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1483 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1484 lcNode->allocPRB = estPrb;
1485 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1487 /*[Step8]:Next loop: First LC to be picked from the list
1488 * because Allocated Nodes are moved to the last*/
1495 /*******************************************************************************************
1497 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1502 * Function : updateGrantSizeForBoRpt
1505 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1506 * BO Report in dlMsgAlloc Pointer
1508 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1509 * I/P & O/P > dlMsgAlloc(Pending LC to be added in this context)
1510 * I/P & O/P > accumalatedBOSize
1513 * *******************************************************************************************/
1514 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc, uint32_t *accumalatedBOSize)
1516 CmLList *node = NULLP, *next = NULLP;
1517 LcInfo *lcNode = NULLP;
1518 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1522 DU_LOG("\nERROR --> SCH: LcList not present");
1536 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1542 lcNode = (LcInfo *)node->node;
1545 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1546 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1548 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1549 * report for allocation can be sent to MAC*/
1550 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1551 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1553 /*Calculate the Total Payload/BO size allocated*/
1554 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1556 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1557 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1559 dlMsgSchInfo->numLc++;
1560 /*The LC has been fully allocated, clean it*/
1561 if(lcNode->reqBO == 0)
1563 handleLcLList(lcLL, lcNode->lcId, DELETE);
1571 /*******************************************************************
1573 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1577 * Function : fillDlMsgInfo
1580 * fill DL message information for MSG4 and Dedicated DL Msg
1582 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1585 *******************************************************************/
1586 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti)
1588 dlMsgInfo->crnti = crnti;
1590 dlMsgInfo->harqProcNum = 0;
1591 dlMsgInfo->dlAssignIdx = 0;
1592 dlMsgInfo->pucchTpc = 0;
1593 dlMsgInfo->pucchResInd = 0;
1594 dlMsgInfo->harqFeedbackInd = 0;
1595 dlMsgInfo->dciFormatId = 1;
1598 /*******************************************************************
1600 * @brief sch Process pending Msg4 Req
1604 * Function : schProcessMsg4Req
1607 * sch Process pending Msg4 Req
1609 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1610 * @return ROK - success
1613 *******************************************************************/
1615 bool schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
1617 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1618 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1619 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1620 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1624 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1628 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1629 &pucchTime) != true )
1634 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1636 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1637 if(dciSlotAlloc == NULLP)
1639 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1642 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1643 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1644 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1647 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1649 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1650 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols)) != ROK)
1652 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1653 if(dciSlotAlloc->numSchedInfo == 0)
1655 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1656 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1659 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1663 /* Check if both DCI and RAR are sent in the same slot.
1664 * If not, allocate memory RAR PDSCH slot to store RAR info
1666 if(pdcchTime.slot == pdschTime.slot)
1668 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1669 dciSlotAlloc->numSchedInfo++;
1673 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1674 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1676 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1677 if(msg4SlotAlloc == NULLP)
1679 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1680 if(dciSlotAlloc->numSchedInfo == 0)
1682 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1683 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1686 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1689 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1690 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1691 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1694 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1696 /* Copy all RAR info */
1697 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1698 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1699 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1700 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1702 /* Assign correct PDU types in corresponding slots */
1703 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1704 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1705 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1707 dciSlotAlloc->numSchedInfo++;
1708 msg4SlotAlloc->numSchedInfo++;
1711 /* PUCCH resource */
1712 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti);
1714 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1715 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1716 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1717 cell->raCb[ueId-1].msg4recvd = FALSE;
1721 /*******************************************************************
1723 * @brief sch Process pending Sr or Bsr Req
1727 * Function : schProcessSrOrBsrReq
1730 * sch Process pending Sr or Bsr Req
1732 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1733 * @return ROK - success
1736 *******************************************************************/
1737 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
1739 bool k2Found = FALSE;
1741 uint8_t startSymb = 0, symbLen = 0;
1742 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
1743 uint32_t totDataReq = 0; /* in bytes */
1745 SchPuschInfo *puschInfo;
1746 DciInfo *dciInfo = NULLP;
1747 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
1748 SlotTimingInfo dciTime, puschTime;
1752 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1756 ueCb = &cell->ueCb[ueId-1];
1761 totDataReq = UL_GRANT_SIZE; /*fixing so that all control msgs can be handled in SR */
1764 if(ueCb->bsrRcvd == true)
1766 for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
1768 totDataReq+= ueCb->bsrInfo[lcgIdx].dataVol;
1774 /* Calculating time frame to send DCI for SR */
1775 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
1777 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1780 if(ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
1781 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2InfoTbl;
1783 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
1785 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
1787 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
1789 if(!ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
1791 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
1792 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
1793 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
1797 k2Val = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
1798 startSymb = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
1799 symbLen = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
1802 /* Calculating time frame to send PUSCH for SR */
1803 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val);
1805 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1808 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
1819 SCH_ALLOC(dciInfo, sizeof(DciInfo));
1822 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
1825 cell->schDlSlotInfo[dciTime.slot]->ulGrant = dciInfo;
1826 memset(dciInfo,0,sizeof(DciInfo));
1828 /* Update PUSCH allocation */
1829 if(schFillPuschAlloc(ueCb, puschTime, totDataReq, k2Val, startSymb, symbLen) == ROK)
1831 if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
1833 puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
1834 if(puschInfo != NULLP)
1836 /* Fill DCI for UL grant */
1837 schFillUlDci(ueCb, puschInfo, dciInfo);
1838 memcpy(&dciInfo->slotIndInfo, &dciTime, sizeof(SlotTimingInfo));
1839 ueCb->srRcvd = false;
1840 ueCb->bsrRcvd = false;
1841 for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
1843 ueCb->bsrInfo[lcgIdx].dataVol = 0;
1846 cell->schUlSlotInfo[puschTime.slot]->puschUe = ueId;
1855 /**********************************************************************
1857 **********************************************************************/