1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
46 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
54 * @brief common resource allocation for SSB
58 * Function : schBroadcastSsbAlloc
60 * This function handles common scheduling for SSB
62 * @param[in] SchCellCb *cell, cell cb
63 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
66 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
69 uint8_t ssbStartSymb, idx;
71 SchDlSlotInfo *schDlSlotInfo;
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
80 if(dlBrdcstAlloc == NULL)
82 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
86 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
87 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
88 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
90 /* Assign interface structure */
91 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
94 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
95 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
96 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
97 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
98 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
99 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
102 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
104 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
109 schDlSlotInfo->ssbPres = true;
110 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
115 * @brief common resource allocation for SIB1
119 * Function : schBroadcastSib1Alloc
121 * This function handles common scheduling for SIB1
123 * @param[in] SchCellCb *cell, cell cb
124 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
127 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
129 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
131 FreqDomainAlloc freqAlloc;
132 TimeDomainAlloc timeAlloc;
133 SchDlSlotInfo *schDlSlotInfo = NULLP;
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
141 if(dlBrdcstAlloc == NULL)
143 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
147 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
148 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
149 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
150 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
152 /* Find total symbols used including DMRS */
153 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
154 * in that case only PDSCH symbols are marked as occupied */
155 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
156 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
158 startSymbol = timeAlloc.startSymb;
159 numSymbol = timeAlloc.numSymb;
161 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
164 startSymbol = dmrsStartSymbol;
165 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
169 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
171 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
175 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
176 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
177 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
178 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
179 schDlSlotInfo->sib1Pres = true;
183 /*******************************************************************
185 * @brief Handles sending UL scheduler info to MAC
189 * Function : sendUlSchInfoToMac
192 * Sends UL Sch info to MAC from SCH
195 * @return ROK - success
198 * ****************************************************************/
199 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
203 memset(&pst, 0, sizeof(Pst));
204 FILL_PST_SCH_TO_MAC(pst, inst);
205 pst.event = EVENT_UL_SCH_INFO;
207 return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
211 * @brief Function to fill Pucch Format 0
215 * Function : fillPucchFormat0
217 * Function to fill Pucch format 0
219 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
223 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
225 if(resrcInfo->SchPucchFormat.format0)
227 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
228 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
229 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
230 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
231 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
236 * @brief Function to fill Pucch Format 1
240 * Function : fillPucchFormat1
242 * Function to fill Pucch format 1
244 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
248 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
250 if(resrcInfo->SchPucchFormat.format1)
252 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
253 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
254 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
255 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
256 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
257 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
262 * @brief Function to fill Pucch format for UL Sched Info
266 * Function : fillUlSchedPucchFormat
268 * Function to fill Pucch format for UL Sched Info
270 * @param[in] pucchFormat , SchPucchInfo pointer,
271 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
275 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
276 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
285 fillPucchFormat0(ulSchedPucch, resrcInfo);
292 fillPucchFormat1(ulSchedPucch, resrcInfo);
296 memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
299 }/* To Add support for more Pucch Format */
302 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
310 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
314 * Function : fillUlSchedPucchDedicatedCfg
316 * Function to fill Pucch Dedicated Cfg for UL Sched Info
318 * @param[in] pucchFormat to be filled
319 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
323 uint8_t fillUlSchedPucchDedicatedCfg(uint16_t numSlots, SchPucchCfg *pucchDedCfg,\
324 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
326 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
327 uint16_t srOffset = 0;
330 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
332 //Assuming one entry in the list
333 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
335 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
337 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
338 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
340 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
341 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
342 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
343 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
344 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
345 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
352 if(pucchDedCfg->format1)
354 memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
355 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
360 /* setting SR and UCI flag */
361 if(pucchDedCfg->schedReq)
363 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
365 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
366 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
369 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
371 ulSchedPucch->srFlag = true;
372 ulSchedPucch->uciFlag = true;
379 * @brief Function to fill Pucch Resource Info
383 * Function : fillPucchResourceInfo
385 * Function to fill Pucch Resource Info
387 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
388 * @return ROK/RFAILED
391 uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst)
393 uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
394 SchCellCb *cell = schCb[inst].cells[inst];
395 SchPucchCfgCmn *pucchCfg = NULLP;
396 SchBwpParams *ulBwp = NULLP;
398 GET_UE_IDX(schPucchInfo->rnti, ueIdx);
399 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
401 /* fill pucch dedicated cfg */
402 ret = fillUlSchedPucchDedicatedCfg(cell->numSlots,\
403 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg, &cell->slotInfo, schPucchInfo);
406 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
407 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
413 /* fill pucch common cfg */
414 /* derive pucchResourceSet from schCellCfg */
415 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
416 pucchIdx = pucchCfg->pucchResourceCommon;
417 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
418 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
419 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
420 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
421 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
422 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
424 /* set SR and UCI flag to false */
425 schPucchInfo->srFlag = true;
426 schPucchInfo->uciFlag = true;
428 /* set HARQ flag to true */
429 schPucchInfo->harqFlag = true;
430 schPucchInfo->numHarqBits = 1; /* 1 bit for HARQ */
436 * @brief resource allocation for UL
440 * Function : schUlResAlloc
442 * This function handles UL Resource allocation
444 * @param[in] SchCellCb *cell, cellCb
447 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
450 UlSchedInfo ulSchedInfo;
451 SchUlSlotInfo *schUlSlotInfo = NULLP;
452 SlotTimingInfo ulTimingInfo;
453 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
456 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA);
458 ulSchedInfo.cellId = cell->cellId;
459 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
460 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
461 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
463 /* Schedule resources for PRACH */
464 if(cell->firstSib1Transmitted)
465 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
467 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
468 if(schUlSlotInfo->schPuschInfo)
470 ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
471 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
472 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
473 sizeof(SchPuschInfo));
474 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
475 schUlSlotInfo->schPuschInfo = NULL;
478 if(schUlSlotInfo->pucchPres)
480 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
481 fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst);
482 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
483 sizeof(SchPucchInfo));
484 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
488 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
491 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
494 schInitUlSlot(schUlSlotInfo);
498 /*******************************************************************
500 * @brief Fills pdcch and pdsch info for msg4
504 * Function : schDlRsrcAllocMsg4
507 * Fills pdcch and pdsch info for msg4
510 * @return ROK - success
513 * ****************************************************************/
514 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueIdx, DlMsgAlloc *msg4Alloc, uint8_t k0Idx)
516 uint8_t coreset0Idx = 0;
517 uint8_t firstSymbol = 0;
518 uint8_t numSymbols = 0;
519 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
520 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
523 SchBwpDlCfg *initialBwp = NULLP;
524 PdcchCfg *pdcch = NULLP;
525 PdschCfg *pdsch = NULLP;
530 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
534 if(msg4Alloc == NULL)
536 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : msg4Alloc is NULL");
540 initialBwp = &cell->cellCfg.schInitialDlBwp;
541 pdcch = &msg4Alloc->dlMsgPdcchCfg;
542 pdsch = &msg4Alloc->dlMsgPdschCfg;
543 bwp = &msg4Alloc->bwp;
544 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
546 msg4Alloc->dlMsgInfo = cell->raCb[ueIdx].dlMsgInfo;
547 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
548 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
549 numRbs = coresetIdxTable[coreset0Idx][1];
550 numSymbols = coresetIdxTable[coreset0Idx][2];
552 /* calculate time domain parameters */
553 uint16_t mask = 0x2000;
554 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
556 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
563 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
564 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
565 bwp->subcarrierSpacing = initialBwp->bwp.scs;
566 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
568 /* fill the PDCCH PDU */
569 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
570 pdcch->coresetCfg.durationSymbols = numSymbols;
571 memcpy(pdcch->coresetCfg.freqDomainResource, \
572 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
574 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
575 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
576 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
577 pdcch->coresetCfg.coreSetType = 0;
578 pdcch->coresetCfg.coreSetSize = numRbs;
579 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
580 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
582 pdcch->dci.rnti = cell->raCb[ueIdx].tcrnti;
583 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
584 pdcch->dci.scramblingRnti = 0;
585 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
586 pdcch->dci.aggregLevel = 4;
587 pdcch->dci.beamPdcchInfo.numPrgs = 1;
588 pdcch->dci.beamPdcchInfo.prgSize = 1;
589 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
590 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
591 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
592 pdcch->dci.txPdcchPower.powerValue = 0;
593 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
594 pdcch->dci.pdschCfg = pdsch;
596 /* fill the PDSCH PDU */
598 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
599 pdsch->rnti = cell->raCb[ueIdx].tcrnti;
601 pdsch->numCodewords = 1;
602 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
604 pdsch->codeword[cwCount].targetCodeRate = 308;
605 pdsch->codeword[cwCount].qamModOrder = 2;
606 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
607 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
608 pdsch->codeword[cwCount].rvIndex = 0;
609 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
610 pdsch->codeword[cwCount].tbSize = tbSize;
612 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
613 pdsch->numLayers = 1;
614 pdsch->transmissionScheme = 0;
616 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
617 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
618 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
619 pdsch->dmrs.scid = 0;
620 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
621 pdsch->dmrs.dmrsPorts = 0;
622 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
623 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
624 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
626 pdsch->pdschTimeAlloc.timeAlloc.startSymb =initialBwp->pdschCommon.timeDomRsrcAllocList[k0Idx].startSymbol;
627 pdsch->pdschTimeAlloc.timeAlloc.numSymb = initialBwp->pdschCommon.timeDomRsrcAllocList[k0Idx].lengthSymbol;
629 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
630 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
631 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, \
632 initialBwp->pdschCommon.timeDomRsrcAllocList[k0Idx].lengthSymbol);
633 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
635 /* Find total symbols occupied including DMRS */
636 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
637 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
638 * in that case only PDSCH symbols are marked as occupied */
639 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
641 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
642 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
644 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
647 startSymbol = dmrsStartSymbol;
648 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
651 /* Allocate the number of PRBs required for RAR PDSCH */
652 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
653 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
655 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
659 pdsch->beamPdschInfo.numPrgs = 1;
660 pdsch->beamPdschInfo.prgSize = 1;
661 pdsch->beamPdschInfo.digBfInterfaces = 0;
662 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
663 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
664 pdsch->txPdschPower.powerControlOffset = 0;
665 pdsch->txPdschPower.powerControlOffsetSS = 0;
670 /*******************************************************************
672 * @brief Scheduling for Pucch Resource
676 * Function : schAllocPucchResource
679 * Scheduling for Pucch Resource
681 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
682 * @return ROK - success
685 *******************************************************************/
687 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti)
689 uint16_t pucchSlot = 0;
690 SchUlSlotInfo *schUlSlotInfo = NULLP;
692 pucchSlot = pucchTime.slot;
693 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
694 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
696 schUlSlotInfo->pucchPres = true;
697 schUlSlotInfo->schPucchInfo.rnti = crnti;
702 /*******************************************************************
704 * @brief Fills pdcch and pdsch info for dedicated DL msg
708 * Function : schDlRsrcAllocDlMsg
711 * Fills pdcch and pdsch info for dl msg
714 * @return ROK - success
717 * ****************************************************************/
718 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
719 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB)
722 PdcchCfg *pdcch = NULLP;
723 PdschCfg *pdsch = NULLP;
726 SchControlRsrcSet coreset1;
727 SchPdschConfig pdschCfg;
728 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
730 pdcch = &dlMsgAlloc->dlMsgPdcchCfg;
731 pdsch = &dlMsgAlloc->dlMsgPdschCfg;
732 bwp = &dlMsgAlloc->bwp;
734 GET_UE_IDX(crnti, ueIdx);
735 ueCb = cell->ueCb[ueIdx-1];
736 coreset1 = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
737 pdschCfg = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdschCfg;
740 bwp->freqAlloc.numPrb = MAX_NUM_RB;
741 bwp->freqAlloc.startPrb = 0;
742 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
743 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
745 /* fill the PDCCH PDU */
746 //Considering coreset1 also starts from same symbol as coreset0
747 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
748 pdcch->coresetCfg.durationSymbols = coreset1.duration;
749 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
750 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
751 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
752 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
753 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
754 //Considering number of RBs in coreset1 is same as coreset0
755 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
756 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
757 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
759 pdcch->dci.rnti = ueCb.crnti;
760 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
761 pdcch->dci.scramblingRnti = 0;
762 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
763 pdcch->dci.aggregLevel = 4;
764 pdcch->dci.beamPdcchInfo.numPrgs = 1;
765 pdcch->dci.beamPdcchInfo.prgSize = 1;
766 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
767 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
768 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
769 pdcch->dci.txPdcchPower.powerValue = 0;
770 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
772 /* fill the PDSCH PDU */
774 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
775 pdsch->rnti = ueCb.crnti;
777 pdsch->numCodewords = 1;
778 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
780 pdsch->codeword[cwCount].targetCodeRate = 308;
781 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
782 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
783 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
784 pdsch->codeword[cwCount].rvIndex = 0;
786 tbSize +=TX_PAYLOAD_HDR_LEN;
787 pdsch->codeword[cwCount].tbSize = tbSize;
789 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
790 pdsch->numLayers = 1;
791 pdsch->transmissionScheme = 0;
793 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
794 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
795 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
796 pdsch->dmrs.scid = 0;
797 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
798 pdsch->dmrs.dmrsPorts = 0;
799 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
800 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
801 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
803 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschCfg.timeDomRsrcAllociList[0].startSymbol;
804 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschCfg.timeDomRsrcAllociList[0].symbolLength;
806 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
807 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
808 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
809 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, \
810 pdschCfg.timeDomRsrcAllociList[0].symbolLength);
812 /* Find total symbols occupied including DMRS */
813 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
814 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
815 * in that case only PDSCH symbols are marked as occupied */
816 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
818 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
819 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
821 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
824 startSymbol = dmrsStartSymbol;
825 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
828 /* Allocate the number of PRBs required for DL PDSCH */
829 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
830 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
832 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
836 pdsch->beamPdschInfo.numPrgs = 1;
837 pdsch->beamPdschInfo.prgSize = 1;
838 pdsch->beamPdschInfo.digBfInterfaces = 0;
839 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
840 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
841 pdsch->txPdschPower.powerControlOffset = 0;
842 pdsch->txPdschPower.powerControlOffsetSS = 0;
844 pdcch->dci.pdschCfg = pdsch;
848 /*******************************************************************
850 * @brief Fills k0 and k1 information table for FDD
854 * Function : BuildK0K1TableForFdd
857 * Fills k0 and k1 information table for FDD
859 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
860 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
861 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
862 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
863 * @return ROK - success
866 * ****************************************************************/
867 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
868 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
871 uint8_t k1TmpVal =0, cfgIdx=0;
872 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
874 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
875 * required but this will require for harq processing */
876 // uint8_t k0TmpVal = 0;
877 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
878 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
880 /* Initialization the structure and storing the total slot values. */
881 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
882 k0K1InfoTbl->tblSize = cell->numSlots;
884 /* Storing time domain resource allocation list based on common or dedicated configuration. */
885 if(pdschCfgCmnPres == true)
887 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
888 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
890 /*TODO uncomment this line during harq processing */
891 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
896 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
897 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
899 /*TODO uncomment this line during harq processing */
900 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
904 /* Checking all the slots for K0 and K1 values. */
905 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
908 /* Storing the values of k0 based on time domain resource
909 * allocation list. If the value is unavailable then fill default values,
910 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
911 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
913 /* TODO These if 0 we will remove during harq processing */
915 if(pdschCfgCmnPres == true)
917 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
921 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
923 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
927 k0TmpVal = DEFAULT_K0_VALUE;
931 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
932 * then skip else continue storing the values. */
934 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
936 k1TmpVal = UlAckTbl[k1Index];
937 if(k1TmpVal <= MIN_NUM_K1_IDX)
942 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
943 /* TODO Store K1 index where harq feedback will be received in harq table. */
947 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
948 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
954 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
959 /*******************************************************************
961 * @brief Fills k0 and k1 information table
965 * Function : BuildK0K1Table
968 * Fills K0 and k1 information table
970 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
971 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
972 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
973 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
974 * @return ROK - success
977 * ****************************************************************/
978 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
979 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
984 bool ulSlotPresent = false;
985 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
986 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
987 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
988 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
991 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
993 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
999 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1000 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1001 k0K1InfoTbl->tblSize = cell->numSlots;
1002 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1004 /* Storing time domain resource allocation list based on common or
1005 * dedicated configuration availability. */
1006 if(pdschCfgCmnPres == true)
1008 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1009 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1011 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1016 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1017 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1019 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1023 /* Checking all possible indexes for K0 and K1 values. */
1024 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1026 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1027 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1028 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1033 /* Storing K0 , start symbol and length symbol for further processing.
1034 * If K0 value is not available then we can fill the default values
1035 * given in spec 38.331. */
1037 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1039 if(pdschCfgCmnPres == true)
1041 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1042 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1043 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1047 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1049 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1053 k0TmpVal = DEFAULT_K0_VALUE;
1055 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1056 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1059 /* If current slot + k0 is UL then skip the slot
1060 * else if it is DL slot then continue the next steps
1061 * else if it is a FLEXI slot then check symbols of slot, It should not
1062 * contain any UL slot. */
1063 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1064 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1065 if(slotCfg == UL_SLOT)
1069 if(slotCfg == FLEXI_SLOT)
1071 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1073 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1074 if(slotCfg == UL_SLOT)
1081 /* If current slot + k0 + k1 is a DL slot then skip the slot
1082 * else if it is UL slot then store the information
1083 * else if it is FLEXI slot then check the symbols, it must have
1084 * at least one UL symbol. */
1086 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1088 k1TmpVal = UlAckTbl[k1Index];
1089 if(k1TmpVal > MIN_NUM_K1_IDX)
1091 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1092 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1093 if(slotCfg == DL_SLOT)
1097 if(slotCfg == FLEXI_SLOT)
1099 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1101 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1103 ulSlotPresent = true;
1108 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1110 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1111 /* TODO Store K1 index where harq feedback will be received
1117 /* Store all the values if all condition satisfies. */
1120 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1121 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1127 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1134 /*******************************************************************
1136 * @brief Fills K2 information table for FDD
1140 * Function : BuildK2InfoTableForFdd
1143 * Fills K2 information table for FDD
1145 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1146 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1147 * @return ROK - success
1150 * ****************************************************************/
1151 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1152 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1154 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1156 /* Initialization the structure and storing the total slot values. */
1157 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1158 k2InfoTbl->tblSize = cell->numSlots;
1160 msg3K2InfoTbl->tblSize = cell->numSlots;
1162 /* Checking all possible indexes for K2. */
1163 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1165 /* Storing K2 values. */
1166 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1168 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1169 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1170 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1172 /* Updating K2 values for MSG3 */
1175 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1176 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1177 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1183 /*******************************************************************
1185 * @brief Fills K2 information table
1189 * Function : BuildK2InfoTable
1192 * Fills K2 information table
1194 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1195 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1196 * @return ROK - success
1199 * ****************************************************************/
1200 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1201 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1205 bool dlSymbolPresent = false;
1206 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1207 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1208 SlotConfig currentSlot;
1211 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1213 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1219 /* Initialization the structure and storing the total slot values. */
1220 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1221 k2InfoTbl->tblSize = cell->numSlots;
1223 msg3K2InfoTbl->tblSize = cell->numSlots;
1224 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1226 /* Checking all possible indexes for K2. */
1227 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1229 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1231 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1232 if(currentSlot != UL_SLOT)
1234 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1236 /* Storing k2, startSymbol, endSymbol information for further processing.
1237 * If k2 is absent then fill the default values given in spec 38.331
1238 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1239 k2Val = timeDomRsrcAllocList[k2Index].k2;
1242 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1245 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1248 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1251 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1254 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1259 /* Current slot + k2 should be either UL or FLEXI slot.
1260 * If slot is FLEXI then check all the symbols of that slot,
1261 * it should not contain any DL or FLEXI slot */
1262 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1263 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1264 if(slotCfg != DL_SLOT)
1266 if(slotCfg == FLEXI_SLOT)
1268 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1269 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1270 dlSymbolPresent = false;
1271 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1273 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1274 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1276 dlSymbolPresent = true;
1281 /* Store all the values if all condition satisfies. */
1282 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1284 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1285 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1286 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1292 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1294 /* Check for K2 for MSG3 */
1295 /* Current slot + k2 should be either UL or FLEXI slot.
1296 * If slot is FLEXI then check all the symbols of that slot,
1297 * it should not contain any DL or FLEXI slot */
1298 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1299 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1300 if(slotCfg != DL_SLOT)
1302 if(slotCfg == FLEXI_SLOT)
1304 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1305 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1306 dlSymbolPresent = false;
1307 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1309 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1310 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1312 dlSymbolPresent = true;
1317 /* Store all the values if all condition satisfies. */
1318 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1320 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1321 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1322 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1333 /*******************************************************************************************
1335 * @brief Allocate the PRB using RRM policy
1339 * Function : prbAllocUsingRRMPolicy
1342 * [Step1]: Traverse each Node in the LC list
1343 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1344 * [Step3]: Calcualte the maxPRB for this LC.
1345 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1347 * b. For Default, just SharedPRB count
1348 * [Step4]: If the LC is the First one to be allocated for this UE then add
1349 * TX_PAYLODN_LEN to reqBO
1350 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1351 * based on reqBO and maxPRB left.
1352 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1353 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1354 * [Step8]: Continue the next loop from List->head
1357 * [Exit1]: If all the LCs are allocated in list
1358 * [Exit2]: If PRBs are exhausted
1360 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1361 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1362 * I/P > mcsIdx and PDSCH symbols count
1363 * I/P & O/P > Shared PRB , reserved PRB Count
1364 * I/P & O/P > Total TBS size accumulated
1365 * I/P & O/P > isTxPayloadLenAdded : Decision flag to add the TX_PAYLOAD_HDR_LEN
1369 * *******************************************************************************************/
1370 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1371 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded)
1373 CmLList *node = NULLP;
1374 LcInfo *lcNode = NULLP;
1375 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1379 DU_LOG("\nERROR --> SCH: LcList not present");
1384 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1385 * For Other LcList, remReservedPRB = 0*/
1386 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1388 remReservedPRB = *reservedPRB;
1395 /*For Debugging purpose*/
1398 lcNode = (LcInfo *)node->node;
1400 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1401 * process of LCID which was fully allocated. Check is just for safety purpose*/
1402 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1404 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1406 deleteNodeFromLList(lcLL, node);
1407 SCH_FREE(lcNode, sizeof(LcInfo));
1412 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1413 if(lcNode->allocBO != 0)
1415 DU_LOG("\nWARNING --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1419 /*[Exit2]: If PRBs are exhausted*/
1422 /*Loop Exit: All resources exhausted*/
1423 if(remReservedPRB == 0 && *sharedPRB == 0)
1425 DU_LOG("\nWARNING --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1431 /*Loop Exit: All resources exhausted*/
1434 DU_LOG("\nWARNING --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1440 maxPRB = remReservedPRB + *sharedPRB;
1443 if(!(*isTxPayloadLenAdded))
1445 DU_LOG("\nINFO --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1447 *isTxPayloadLenAdded = TRUE;
1448 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1449 mcsIdx, numSymbols, maxPRB, &estPrb);
1450 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1455 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1456 mcsIdx, numSymbols, maxPRB, &estPrb);
1459 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1460 * estimated PRB allocated*/
1461 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1463 remReservedPRB = remReservedPRB - estPrb;
1465 else /*LC requirement need PRB share from SharedPRB*/
1467 if(*sharedPRB <= (estPrb - remReservedPRB))
1469 DU_LOG("\nINFO --> SCH: SharedPRB is less");
1474 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1480 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1481 lcNode->allocPRB = estPrb;
1482 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1484 /*[Step8]:Next loop: First LC to be picked from the list
1485 * because Allocated Nodes are moved to the last*/
1492 /*******************************************************************************************
1494 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1499 * Function : updateGrantSizeForBoRpt
1502 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1503 * BO Report in dlMsgAlloc Pointer
1505 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1506 * I/P & O/P > dlMsgAlloc(Pending LC to be added in this context)
1507 * I/P & O/P > accumalatedBOSize
1510 * *******************************************************************************************/
1511 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc, uint32_t *accumalatedBOSize)
1513 CmLList *node = NULLP, *next = NULLP;
1514 LcInfo *lcNode = NULLP;
1518 DU_LOG("\nERROR --> SCH: LcList not present");
1536 lcNode = (LcInfo *)node->node;
1539 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1540 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1542 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1543 * report for allocation can be sent to MAC*/
1544 dlMsgAlloc->lcSchInfo[dlMsgAlloc->numLc].lcId = lcNode->lcId;
1545 dlMsgAlloc->lcSchInfo[dlMsgAlloc->numLc].schBytes = lcNode->allocBO;
1547 /*Calculate the Total Payload/BO size allocated*/
1548 *accumalatedBOSize += dlMsgAlloc->lcSchInfo[dlMsgAlloc->numLc].schBytes;
1550 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1551 lcNode->lcId,lcNode->reqBO, dlMsgAlloc->numLc, *accumalatedBOSize);
1553 dlMsgAlloc->numLc++;
1554 /*The LC has been fully allocated, clean it*/
1555 if(lcNode->reqBO == 0)
1557 handleLcLList(lcLL, lcNode->lcId, DELETE);
1565 /*******************************************************************
1567 * @brief sch Process pending Msg4 Req
1571 * Function : schProcessMsg4Req
1574 * sch Process pending Msg4 Req
1576 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1577 * @return ROK - success
1580 *******************************************************************/
1582 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime)
1584 bool k1Found = FALSE;
1585 uint16_t pdcchSlot = 0, pdschSlot = 0;
1586 uint8_t ueIdx = 0, numK0 = 0, k0TblIdx = 0, k0Index = 0, k0Val = 0;
1587 uint8_t k1TblIdx = 0, k1Index = 0, k1Val = 0, numK1 = 0;
1588 SchK0K1TimingInfoTbl *k0K1InfoTbl;
1589 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1590 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1591 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1595 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1599 while(ueIdx < MAX_NUM_UE)
1601 if(cell->raCb[ueIdx].msg4recvd == FALSE)
1607 ADD_DELTA_TO_TIME(currTime, pdcchTime, PHY_DELTA_DL + SCHED_DELTA);
1608 pdcchSlot = pdcchTime.slot;
1610 if(schGetSlotSymbFrmt(pdcchSlot, cell->slotFrmtBitMap) != DL_SLOT)
1615 k0K1InfoTbl = &cell->cellCfg.schInitialDlBwp.k0K1InfoTbl;
1616 numK0 = k0K1InfoTbl->k0k1TimingInfo[pdcchSlot].numK0;
1617 for(k0TblIdx = 0; k0TblIdx < numK0; k0TblIdx++)
1619 k0Index = k0K1InfoTbl->k0k1TimingInfo[pdcchSlot].k0Indexes[k0TblIdx].k0Index;
1620 k0Val = cell->cellCfg.schInitialDlBwp.pdschCommon.timeDomRsrcAllocList[k0Index].k0;
1622 ADD_DELTA_TO_TIME(pdcchTime, pdschTime, k0Val);
1623 pdschSlot = pdschTime.slot;
1625 if(schGetSlotSymbFrmt(pdschSlot, cell->slotFrmtBitMap) != DL_SLOT)
1630 numK1 = k0K1InfoTbl->k0k1TimingInfo[pdcchSlot].k0Indexes[k0TblIdx].k1TimingInfo.numK1;
1631 for(k1TblIdx = 0; k1TblIdx < numK1; k1TblIdx++)
1633 k1Index = k0K1InfoTbl->k0k1TimingInfo[pdcchSlot].k0Indexes[k0TblIdx].k1TimingInfo.k1Indexes[k1TblIdx];
1634 k1Val = defaultUlAckTbl[k1Index];
1636 ADD_DELTA_TO_TIME(pdschTime, pucchTime, k1Val);
1638 if(schGetSlotSymbFrmt(pucchTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1650 /* If K0-K1 combination not found, no scheduling happens */
1657 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1658 if(dciSlotAlloc == NULLP)
1660 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1663 cell->schDlSlotInfo[pdcchSlot]->dlMsgAlloc = dciSlotAlloc;
1665 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1666 if((schDlRsrcAllocMsg4(cell, pdschTime, ueIdx, dciSlotAlloc, k0Index)) != ROK)
1668 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschSlot);
1669 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1670 cell->schDlSlotInfo[pdcchSlot]->dlMsgAlloc = NULLP;
1673 /* Check if both DCI and RAR are sent in the same slot.
1674 * If not, allocate memory RAR PDSCH slot to store RAR info
1676 if(pdcchSlot == pdschSlot)
1677 dciSlotAlloc->pduPres = BOTH;
1680 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1681 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1682 if(msg4SlotAlloc == NULLP)
1684 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1685 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1686 cell->schDlSlotInfo[pdcchSlot]->rarAlloc = NULLP;
1689 cell->schDlSlotInfo[pdschSlot]->dlMsgAlloc = msg4SlotAlloc;
1691 /* Copy all RAR info */
1692 memcpy(msg4SlotAlloc, dciSlotAlloc, sizeof(DlMsgAlloc));
1693 msg4SlotAlloc->dlMsgPdcchCfg.dci.pdschCfg = &msg4SlotAlloc->dlMsgPdschCfg;
1695 /* Assign correct PDU types in corresponding slots */
1696 msg4SlotAlloc->pduPres = PDSCH_PDU;
1697 dciSlotAlloc->pduPres = PDCCH_PDU;
1698 dciSlotAlloc->pdschSlot = pdschSlot;
1701 /* PUCCH resource */
1702 schAllocPucchResource(cell, pucchTime, cell->raCb[ueIdx].tcrnti);
1703 cell->raCb[ueIdx].msg4recvd = FALSE;
1708 /**********************************************************************
1710 **********************************************************************/