1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
46 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
54 * @brief common resource allocation for SSB
58 * Function : schBroadcastSsbAlloc
60 * This function handles common scheduling for SSB
62 * @param[in] SchCellCb *cell, cell cb
63 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
66 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
69 uint8_t ssbStartSymb, idx;
71 SchDlSlotInfo *schDlSlotInfo;
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
80 if(dlBrdcstAlloc == NULL)
82 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
86 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
87 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
88 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
90 /* Assign interface structure */
91 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
94 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
95 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
96 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
97 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
98 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
99 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
102 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
104 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
109 schDlSlotInfo->ssbPres = true;
110 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
115 * @brief common resource allocation for SIB1
119 * Function : schBroadcastSib1Alloc
121 * This function handles common scheduling for SIB1
123 * @param[in] SchCellCb *cell, cell cb
124 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
127 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
129 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
131 FreqDomainAlloc freqAlloc;
132 TimeDomainAlloc timeAlloc;
133 SchDlSlotInfo *schDlSlotInfo = NULLP;
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
141 if(dlBrdcstAlloc == NULL)
143 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
147 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
148 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
149 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
150 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
152 /* Find total symbols used including DMRS */
153 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
154 * in that case only PDSCH symbols are marked as occupied */
155 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
156 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
158 startSymbol = timeAlloc.startSymb;
159 numSymbol = timeAlloc.numSymb;
161 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
164 startSymbol = dmrsStartSymbol;
165 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
169 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
171 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
175 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
176 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
177 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
178 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
179 schDlSlotInfo->sib1Pres = true;
183 /*******************************************************************
185 * @brief Handles sending UL scheduler info to MAC
189 * Function : sendUlSchInfoToMac
192 * Sends UL Sch info to MAC from SCH
195 * @return ROK - success
198 * ****************************************************************/
199 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
203 memset(&pst, 0, sizeof(Pst));
204 FILL_PST_SCH_TO_MAC(pst, inst);
205 pst.event = EVENT_UL_SCH_INFO;
207 return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
211 * @brief Function to fill Pucch Format 0
215 * Function : fillPucchFormat0
217 * Function to fill Pucch format 0
219 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
223 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
225 if(resrcInfo->SchPucchFormat.format0)
227 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
228 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
229 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
230 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
231 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
236 * @brief Function to fill Pucch Format 1
240 * Function : fillPucchFormat1
242 * Function to fill Pucch format 1
244 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
248 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
250 if(resrcInfo->SchPucchFormat.format1)
252 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
253 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
254 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
255 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
256 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
257 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
262 * @brief Function to fill Pucch format for UL Sched Info
266 * Function : fillUlSchedPucchFormat
268 * Function to fill Pucch format for UL Sched Info
270 * @param[in] pucchFormat , SchPucchInfo pointer,
271 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
275 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
276 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
285 fillPucchFormat0(ulSchedPucch, resrcInfo);
292 fillPucchFormat1(ulSchedPucch, resrcInfo);
296 memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
299 }/* To Add support for more Pucch Format */
302 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
310 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
314 * Function : fillUlSchedPucchDedicatedCfg
316 * Function to fill Pucch Dedicated Cfg for UL Sched Info
318 * @param[in] pucchFormat to be filled
319 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
323 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
324 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
326 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
327 uint16_t srOffset = 0;
328 uint16_t numSlots = cell->numSlots;
329 bool isAllocated = false;
330 uint16_t pucchStartPrb;
332 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
334 //Assuming one entry in the list
335 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
337 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
339 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
340 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
342 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
343 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
344 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
345 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
346 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
347 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
351 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
352 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
365 if(pucchDedCfg->format1)
367 memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
368 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
378 /* setting SR and UCI flag */
379 if(pucchDedCfg->schedReq)
381 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
383 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
384 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
387 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
389 ulSchedPucch->srFlag = true;
390 ulSchedPucch->uciFlag = true;
392 ulSchedPucch->harqFlag = true;//check how to enable?
398 * @brief Function to fill Pucch Resource Info
402 * Function : fillPucchResourceInfo
404 * Function to fill Pucch Resource Info
406 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
407 * @return ROK/RFAILED
410 uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
412 uint8_t ret = ROK, ueId = 0, ueIdx = 0, pucchIdx = 0;
413 SchCellCb *cell = schCb[inst].cells[inst];
414 SchPucchCfgCmn *pucchCfg = NULLP;
415 SchBwpParams *ulBwp = NULLP;
417 SchUeCb *ueCb = NULLP;
421 GET_UE_ID(schPucchInfo->rnti, ueId);
424 ueCb = schGetUeCb(cell, schPucchInfo->rnti);
425 if(ueCb->ueDrxInfoPres)
427 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
431 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfgPres)
433 /* fill pucch dedicated cfg */
434 ret = fillUlSchedPucchDedicatedCfg(cell,\
435 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
438 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
439 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
445 /* fill pucch common cfg */
446 /* derive pucchResourceSet from schCellCfg */
447 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
448 pucchIdx = pucchCfg->pucchResourceCommon;
449 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
450 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
451 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
452 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
455 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
456 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
457 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
458 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
459 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
461 /* set SR and UCI flag to false */
462 schPucchInfo->srFlag = true;
463 schPucchInfo->uciFlag = true;
470 * @brief resource allocation for UL
474 * Function : schUlResAlloc
476 * This function handles UL Resource allocation
478 * @param[in] SchCellCb *cell, cellCb
481 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
487 UlSchedInfo ulSchedInfo;
488 SchUlSlotInfo *schUlSlotInfo = NULLP;
489 SlotTimingInfo ulTimingInfo;
490 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
493 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA, cell->numSlots);
495 ulSchedInfo.cellId = cell->cellId;
496 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
497 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
498 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
500 /* Schedule resources for PRACH */
501 if(cell->firstSib1Transmitted)
502 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
504 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
505 if(schUlSlotInfo->schPuschInfo)
507 ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
508 /* Check the ue drx status if the UE is active for uplink scheduling or not */
510 ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
511 if(ueCb->ueDrxInfoPres)
513 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
517 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
518 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
519 sizeof(SchPuschInfo));
520 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
521 schUlSlotInfo->schPuschInfo = NULL;
524 if(schUlSlotInfo->pucchPres)
526 ret = fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
529 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
530 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
531 sizeof(SchPucchInfo));
537 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
541 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
544 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
547 schInitUlSlot(schUlSlotInfo);
551 /*******************************************************************
553 * @brief Fills pdcch and pdsch info for msg4
557 * Function : schDlRsrcAllocMsg4
560 * Fills pdcch and pdsch info for msg4
562 * @params[in] SchCellCb *cell, SlotTimingInfo msg4Time
563 * @params[in] uint8_t ueId, DlMsgAlloc *dlMsgAlloc
564 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
565 * @params[in] bool isRetx, SchDlHqProcCb *hqP
566 * @return ROK - success
569 * ****************************************************************/
570 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
571 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
573 uint8_t coreset0Idx = 0;
574 uint8_t firstSymbol = 0;
575 uint8_t numSymbols = 0;
576 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
577 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
580 SchBwpDlCfg *initialBwp = NULLP;
581 PdcchCfg *pdcch = NULLP;
582 PdschCfg *pdsch = NULLP;
584 DlMsgSchInfo *msg4Alloc = NULLP;
588 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
592 if(dlMsgAlloc == NULL)
594 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
598 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
599 initialBwp = &cell->cellCfg.schInitialDlBwp;
600 pdcch = &msg4Alloc->dlMsgPdcchCfg;
601 pdsch = &msg4Alloc->dlMsgPdschCfg;
602 bwp = &msg4Alloc->bwp;
603 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
605 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti, isRetx, hqP);
606 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
608 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
609 numRbs = coresetIdxTable[coreset0Idx][1];
610 numSymbols = coresetIdxTable[coreset0Idx][2];
612 /* calculate time domain parameters */
613 uint16_t mask = 0x2000;
614 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
616 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
623 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
624 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
625 bwp->subcarrierSpacing = initialBwp->bwp.scs;
626 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
628 /* fill the PDCCH PDU */
629 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
630 pdcch->coresetCfg.durationSymbols = numSymbols;
631 memcpy(pdcch->coresetCfg.freqDomainResource, \
632 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
634 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
635 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
636 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
637 pdcch->coresetCfg.coreSetType = 0;
638 pdcch->coresetCfg.coreSetSize = numRbs;
639 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
640 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
642 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
643 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
644 pdcch->dci.scramblingRnti = 0;
645 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
646 pdcch->dci.aggregLevel = 4;
647 pdcch->dci.beamPdcchInfo.numPrgs = 1;
648 pdcch->dci.beamPdcchInfo.prgSize = 1;
649 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
650 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
651 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
652 pdcch->dci.txPdcchPower.powerValue = 0;
653 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
654 pdcch->dci.pdschCfg = pdsch;
656 /* fill the PDSCH PDU */
658 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
659 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
661 pdsch->numCodewords = 1;
662 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
664 pdsch->codeword[cwCount].targetCodeRate = 308;
665 pdsch->codeword[cwCount].qamModOrder = 2;
666 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
667 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
670 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
671 hqP->tbInfo[cwCount].tbSzReq = tbSize;
672 pdsch->codeword[cwCount].rvIndex = 0;
676 pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03;
677 tbSize = hqP->tbInfo[cwCount].tbSzReq;
679 pdsch->codeword[cwCount].tbSize = tbSize;
681 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
682 pdsch->numLayers = 1;
683 pdsch->transmissionScheme = 0;
685 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
686 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
687 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
688 pdsch->dmrs.scid = 0;
689 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
690 pdsch->dmrs.dmrsPorts = 0;
691 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
692 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
693 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
695 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
696 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
698 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
699 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
700 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
701 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
703 /* Find total symbols occupied including DMRS */
704 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
705 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
706 * in that case only PDSCH symbols are marked as occupied */
707 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
709 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
710 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
712 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
715 startSymbol = dmrsStartSymbol;
716 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
719 /* Allocate the number of PRBs required for RAR PDSCH */
720 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
721 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
723 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
727 pdsch->beamPdschInfo.numPrgs = 1;
728 pdsch->beamPdschInfo.prgSize = 1;
729 pdsch->beamPdschInfo.digBfInterfaces = 0;
730 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
731 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
732 pdsch->txPdschPower.powerControlOffset = 0;
733 pdsch->txPdschPower.powerControlOffsetSS = 0;
735 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
739 /*******************************************************************
741 * @brief Scheduling for Pucch Resource
745 * Function : schAllocPucchResource
748 * Scheduling for Pucch Resource
750 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
751 * @params[in] SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP
752 * @return ROK - success
755 *******************************************************************/
757 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,
758 SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP)
760 uint16_t pucchSlot = 0;
761 SchUlSlotInfo *schUlSlotInfo = NULLP;
763 pucchSlot = pucchTime.slot;
764 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
765 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
767 schUlSlotInfo->pucchPres = true;
768 schUlSlotInfo->schPucchInfo.rnti = crnti;
771 /* set HARQ flag to true */
772 schUlSlotInfo->schPucchInfo.harqFlag = true;
773 schUlSlotInfo->schPucchInfo.numHarqBits = 1; /* 1 bit for HARQ */
774 ADD_DELTA_TO_TIME(pucchTime, pucchTime, 3, cell->numSlots); /* SLOT_DELAY=3 */
775 cmLListAdd2Tail(&(ueCb->hqDlmap[pucchTime.slot]->hqList), &hqP->ulSlotLnk);
780 /*******************************************************************
782 * @brief Fills pdcch and pdsch info for dedicated DL msg
786 * Function : schDlRsrcAllocDlMsg
789 * Fills pdcch and pdsch info for dl msg
791 * @params[in] SchCellCb *cell, SlotTimingInfo slotTime
792 * @params[in] uint16_t crnti, uint32_t tbSize
793 * @params[in] DlMsgAlloc *dlMsgAlloc, uint16_t startPRB
794 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
795 * @params[in] bool isRetx, SchDlHqProcCb *hqP
796 * @return ROK - success
799 * ****************************************************************/
800 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
801 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol,
802 uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
805 PdcchCfg *pdcch = NULLP;
806 PdschCfg *pdsch = NULLP;
809 SchControlRsrcSet coreset1;
810 SchPdschConfig pdschCfg;
811 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
813 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
814 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
815 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
817 GET_UE_ID(crnti, ueId);
818 ueCb = cell->ueCb[ueId-1];
819 coreset1 = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
820 pdschCfg = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg;
823 bwp->freqAlloc.numPrb = MAX_NUM_RB;
824 bwp->freqAlloc.startPrb = 0;
825 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
826 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
828 /* fill the PDCCH PDU */
829 //Considering coreset1 also starts from same symbol as coreset0
830 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
831 pdcch->coresetCfg.durationSymbols = coreset1.duration;
832 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
833 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
834 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
835 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
836 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
837 //Considering number of RBs in coreset1 is same as coreset0
838 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
839 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
840 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
842 pdcch->dci.rnti = ueCb.crnti;
843 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
844 pdcch->dci.scramblingRnti = 0;
845 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
846 pdcch->dci.aggregLevel = 4;
847 pdcch->dci.beamPdcchInfo.numPrgs = 1;
848 pdcch->dci.beamPdcchInfo.prgSize = 1;
849 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
850 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
851 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
852 pdcch->dci.txPdcchPower.powerValue = 0;
853 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
855 /* fill the PDSCH PDU */
857 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
858 pdsch->rnti = ueCb.crnti;
860 pdsch->numCodewords = 1;
861 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
863 pdsch->codeword[cwCount].targetCodeRate = 308;
864 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
865 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
866 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
867 pdsch->codeword[cwCount].rvIndex = 0;
871 tbSize +=TX_PAYLOAD_HDR_LEN;
872 hqP->tbInfo[cwCount].tbSzReq = tbSize;
874 pdsch->codeword[cwCount].tbSize = tbSize;
876 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
877 pdsch->numLayers = 1;
878 pdsch->transmissionScheme = 0;
880 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
881 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
882 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
883 pdsch->dmrs.scid = 0;
884 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
885 pdsch->dmrs.dmrsPorts = 0;
886 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
887 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
888 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
890 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
891 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
893 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
894 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
895 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
896 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
898 /* Find total symbols occupied including DMRS */
899 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
900 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
901 * in that case only PDSCH symbols are marked as occupied */
902 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
904 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
905 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
907 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
910 startSymbol = dmrsStartSymbol;
911 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
914 /* Allocate the number of PRBs required for DL PDSCH */
915 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
916 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
918 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
922 pdsch->beamPdschInfo.numPrgs = 1;
923 pdsch->beamPdschInfo.prgSize = 1;
924 pdsch->beamPdschInfo.digBfInterfaces = 0;
925 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
926 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
927 pdsch->txPdschPower.powerControlOffset = 0;
928 pdsch->txPdschPower.powerControlOffsetSS = 0;
930 pdcch->dci.pdschCfg = pdsch;
934 /*******************************************************************
936 * @brief Fills k0 and k1 information table for FDD
940 * Function : BuildK0K1TableForFdd
943 * Fills k0 and k1 information table for FDD
945 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
946 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
947 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
948 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
949 * @return ROK - success
952 * ****************************************************************/
953 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
954 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
957 uint8_t k1TmpVal =0, cfgIdx=0;
958 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
960 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
961 * required but this will require for harq processing */
962 // uint8_t k0TmpVal = 0;
963 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
964 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
966 /* Initialization the structure and storing the total slot values. */
967 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
968 k0K1InfoTbl->tblSize = cell->numSlots;
970 /* Storing time domain resource allocation list based on common or dedicated configuration. */
971 if(pdschCfgCmnPres == true)
973 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
974 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
976 /*TODO uncomment this line during harq processing */
977 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
982 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
983 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
985 /*TODO uncomment this line during harq processing */
986 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
990 /* Checking all the slots for K0 and K1 values. */
991 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
994 /* Storing the values of k0 based on time domain resource
995 * allocation list. If the value is unavailable then fill default values,
996 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
997 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
999 /* TODO These if 0 we will remove during harq processing */
1001 if(pdschCfgCmnPres == true)
1003 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1007 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1009 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1013 k0TmpVal = DEFAULT_K0_VALUE;
1017 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
1018 * then skip else continue storing the values. */
1020 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1022 k1TmpVal = UlAckTbl[k1Index];
1023 if(k1TmpVal <= MIN_NUM_K1_IDX)
1028 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1029 /* TODO Store K1 index where harq feedback will be received in harq table. */
1033 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1034 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1040 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1045 /*******************************************************************
1047 * @brief Fills k0 and k1 information table
1051 * Function : BuildK0K1Table
1054 * Fills K0 and k1 information table
1056 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1057 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1058 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1059 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1060 * @return ROK - success
1063 * ****************************************************************/
1064 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1065 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1070 bool ulSlotPresent = false;
1071 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1072 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1073 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1074 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1077 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1079 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1085 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1086 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1087 k0K1InfoTbl->tblSize = cell->numSlots;
1088 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1090 /* Storing time domain resource allocation list based on common or
1091 * dedicated configuration availability. */
1092 if(pdschCfgCmnPres == true)
1094 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1095 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1097 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1102 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1103 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1105 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1109 /* Checking all possible indexes for K0 and K1 values. */
1110 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1112 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1113 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1114 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1119 /* Storing K0 , start symbol and length symbol for further processing.
1120 * If K0 value is not available then we can fill the default values
1121 * given in spec 38.331. */
1123 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1125 if(pdschCfgCmnPres == true)
1127 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1128 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1129 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1133 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1135 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1139 k0TmpVal = DEFAULT_K0_VALUE;
1141 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1142 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1145 /* If current slot + k0 is UL then skip the slot
1146 * else if it is DL slot then continue the next steps
1147 * else if it is a FLEXI slot then check symbols of slot, It should not
1148 * contain any UL slot. */
1149 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1150 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1151 if(slotCfg == UL_SLOT)
1155 if(slotCfg == FLEXI_SLOT)
1157 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1159 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1160 if(slotCfg == UL_SLOT)
1167 /* If current slot + k0 + k1 is a DL slot then skip the slot
1168 * else if it is UL slot then store the information
1169 * else if it is FLEXI slot then check the symbols, it must have
1170 * at least one UL symbol. */
1172 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1174 k1TmpVal = UlAckTbl[k1Index];
1175 if(k1TmpVal > MIN_NUM_K1_IDX)
1177 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1178 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1179 if(slotCfg == DL_SLOT)
1183 if(slotCfg == FLEXI_SLOT)
1185 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1187 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1189 ulSlotPresent = true;
1194 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1196 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1197 /* TODO Store K1 index where harq feedback will be received
1203 /* Store all the values if all condition satisfies. */
1206 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1207 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1213 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1220 /*******************************************************************
1222 * @brief Fills K2 information table for FDD
1226 * Function : BuildK2InfoTableForFdd
1229 * Fills K2 information table for FDD
1231 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1232 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1233 * @return ROK - success
1236 * ****************************************************************/
1237 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1238 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1240 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1242 /* Initialization the structure and storing the total slot values. */
1243 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1244 k2InfoTbl->tblSize = cell->numSlots;
1246 msg3K2InfoTbl->tblSize = cell->numSlots;
1248 /* Checking all possible indexes for K2. */
1249 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1251 /* Storing K2 values. */
1252 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1254 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1255 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1256 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1258 /* Updating K2 values for MSG3 */
1261 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1262 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1263 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1269 /*******************************************************************
1271 * @brief Fills K2 information table
1275 * Function : BuildK2InfoTable
1278 * Fills K2 information table
1280 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1281 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1282 * @return ROK - success
1285 * ****************************************************************/
1286 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1287 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1291 bool dlSymbolPresent = false;
1292 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1293 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1294 SlotConfig currentSlot;
1297 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1299 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1305 /* Initialization the structure and storing the total slot values. */
1306 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1307 k2InfoTbl->tblSize = cell->numSlots;
1309 msg3K2InfoTbl->tblSize = cell->numSlots;
1310 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1312 /* Checking all possible indexes for K2. */
1313 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1315 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1317 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1318 if(currentSlot != UL_SLOT)
1320 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1322 /* Storing k2, startSymbol, endSymbol information for further processing.
1323 * If k2 is absent then fill the default values given in spec 38.331
1324 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1325 k2Val = timeDomRsrcAllocList[k2Index].k2;
1328 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1331 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1334 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1337 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1340 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1345 /* Current slot + k2 should be either UL or FLEXI slot.
1346 * If slot is FLEXI then check all the symbols of that slot,
1347 * it should not contain any DL or FLEXI slot */
1348 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1349 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1350 if(slotCfg != DL_SLOT)
1352 if(slotCfg == FLEXI_SLOT)
1354 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1355 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1356 dlSymbolPresent = false;
1357 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1359 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1360 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1362 dlSymbolPresent = true;
1367 /* Store all the values if all condition satisfies. */
1368 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1370 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1371 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1372 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1378 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1380 /* Check for K2 for MSG3 */
1381 /* Current slot + k2 should be either UL or FLEXI slot.
1382 * If slot is FLEXI then check all the symbols of that slot,
1383 * it should not contain any DL or FLEXI slot */
1384 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1385 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1386 if(slotCfg != DL_SLOT)
1388 if(slotCfg == FLEXI_SLOT)
1390 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1391 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1392 dlSymbolPresent = false;
1393 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1395 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1396 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1398 dlSymbolPresent = true;
1403 /* Store all the values if all condition satisfies. */
1404 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1406 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1407 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1408 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1419 /*******************************************************************************************
1421 * @brief Allocate the PRB using RRM policy
1425 * Function : prbAllocUsingRRMPolicy
1428 * [Step1]: Traverse each Node in the LC list
1429 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1430 * [Step3]: Calcualte the maxPRB for this LC.
1431 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1433 * b. For Default, just SharedPRB count
1434 * [Step4]: If the LC is the First one to be allocated for this UE then add
1435 * TX_PAYLODN_LEN to reqBO
1436 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1437 * based on reqBO and maxPRB left.
1438 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1439 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1440 * [Step8]: Continue the next loop from List->head
1443 * [Exit1]: If all the LCs are allocated in list
1444 * [Exit2]: If PRBs are exhausted
1446 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1447 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1448 * I/P > mcsIdx and PDSCH symbols count
1449 * I/P & O/P > Shared PRB , reserved PRB Count
1450 * I/P & O/P > Total TBS size accumulated
1451 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1452 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1456 * *******************************************************************************************/
1457 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1458 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1460 CmLList *node = NULLP;
1461 LcInfo *lcNode = NULLP;
1462 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1466 DU_LOG("\nERROR --> SCH: LcList not present");
1471 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1472 * For Other LcList, remReservedPRB = 0*/
1473 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1475 remReservedPRB = *reservedPRB;
1482 /*For Debugging purpose*/
1485 lcNode = (LcInfo *)node->node;
1487 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1488 * process of LCID which was fully allocated. Check is just for safety purpose*/
1489 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1491 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1493 deleteNodeFromLList(lcLL, node);
1494 SCH_FREE(lcNode, sizeof(LcInfo));
1499 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1500 if(lcNode->allocBO != 0)
1502 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1506 /*[Exit2]: If PRBs are exhausted*/
1509 /*Loop Exit: All resources exhausted*/
1510 if(remReservedPRB == 0 && *sharedPRB == 0)
1512 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1518 /*Loop Exit: All resources exhausted*/
1521 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1527 maxPRB = remReservedPRB + *sharedPRB;
1530 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1532 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1534 *isTxPayloadLenAdded = TRUE;
1535 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1536 mcsIdx, numSymbols, maxPRB, &estPrb);
1537 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1539 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1541 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1544 lcNode->reqBO += UL_GRANT_SIZE;
1545 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1550 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1551 mcsIdx, numSymbols, maxPRB, &estPrb);
1554 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1555 * estimated PRB allocated*/
1556 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1558 remReservedPRB = remReservedPRB - estPrb;
1560 else /*LC requirement need PRB share from SharedPRB*/
1562 if(*sharedPRB <= (estPrb - remReservedPRB))
1564 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1569 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1575 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1576 lcNode->allocPRB = estPrb;
1577 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1579 /*[Step8]:Next loop: First LC to be picked from the list
1580 * because Allocated Nodes are moved to the last*/
1587 /*******************************************************************************************
1589 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1594 * Function : updateGrantSizeForBoRpt
1597 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1598 * BO Report in dlMsgAlloc Pointer
1600 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1601 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1602 * I/P & O/P > BsrInfo (applicable for UL)
1603 * I/P & O/P > accumalatedBOSize
1606 * *******************************************************************************************/
1607 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1608 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1610 CmLList *node = NULLP, *next = NULLP;
1611 LcInfo *lcNode = NULLP;
1612 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1616 DU_LOG("\nERROR --> SCH: LcList not present");
1634 lcNode = (LcInfo *)node->node;
1637 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1638 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1639 if(dlMsgAlloc != NULLP)
1641 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1643 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1644 * report for allocation can be sent to MAC*/
1645 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1646 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1648 /*Calculate the Total Payload/BO size allocated*/
1649 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1651 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1652 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1654 dlMsgSchInfo->numLc++;
1655 /*The LC has been fully allocated, clean it*/
1656 if(lcNode->reqBO == 0)
1658 handleLcLList(lcLL, lcNode->lcId, DELETE);
1661 else if(bsrInfo != NULLP)
1663 *accumalatedBOSize += lcNode->allocBO;
1664 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1665 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1673 /*******************************************************************
1675 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1679 * Function : fillDlMsgInfo
1682 * fill DL message information for MSG4 and Dedicated DL Msg
1684 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1685 * @params[in] bool isRetx, SchDlHqProcCb *hqP
1688 *******************************************************************/
1689 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti, bool isRetx, SchDlHqProcCb *hqP)
1691 hqP->tbInfo[0].isEnabled = TRUE;
1692 hqP->tbInfo[0].state = HQ_TB_WAITING;
1693 hqP->tbInfo[0].txCntr++;
1694 hqP->tbInfo[1].isEnabled = TRUE;
1695 hqP->tbInfo[1].state = HQ_TB_WAITING;
1696 hqP->tbInfo[1].txCntr++;
1697 dlMsgInfo->crnti = crnti;
1698 dlMsgInfo->ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
1699 dlMsgInfo->harqProcNum = hqP->procId;
1700 dlMsgInfo->dlAssignIdx = 0;
1701 dlMsgInfo->pucchTpc = 0;
1702 dlMsgInfo->pucchResInd = 0;
1703 dlMsgInfo->harqFeedbackInd = hqP->k1;
1704 dlMsgInfo->dciFormatId = 1;
1707 /*******************************************************************
1709 * @brief sch Process pending Msg4 Req
1713 * Function : schProcessMsg4Req
1716 * sch Process pending Msg4 Req
1718 * @params[in] SchCellCb *cell, cell cb struct pointer
1719 * @params[in] SlotTimingInfo currTime, current timing info
1720 * @params[in] uint8_t ueId, ue ID
1721 * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
1722 * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
1723 * @return ROK - success
1726 *******************************************************************/
1728 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
1730 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1731 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1732 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1733 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1737 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1741 if (isRetxMsg4 == FALSE)
1743 if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
1745 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : No process");
1750 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1751 &pucchTime, isRetxMsg4, *msg4HqProc) != true )
1753 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : k0 k1 not found");
1757 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1759 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1760 if(dciSlotAlloc == NULLP)
1762 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1765 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1766 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1767 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1770 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1772 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1773 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
1775 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1776 if(dciSlotAlloc->numSchedInfo == 0)
1778 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1779 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1782 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1786 /* Check if both DCI and RAR are sent in the same slot.
1787 * If not, allocate memory RAR PDSCH slot to store RAR info
1789 if(pdcchTime.slot == pdschTime.slot)
1791 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1792 dciSlotAlloc->numSchedInfo++;
1796 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1797 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1799 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1800 if(msg4SlotAlloc == NULLP)
1802 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1803 if(dciSlotAlloc->numSchedInfo == 0)
1805 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1806 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1809 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1812 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1813 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1814 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1817 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1819 /* Copy all RAR info */
1820 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1821 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1822 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1823 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1825 /* Assign correct PDU types in corresponding slots */
1826 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1827 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1828 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1830 dciSlotAlloc->numSchedInfo++;
1831 msg4SlotAlloc->numSchedInfo++;
1834 /* PUCCH resource */
1835 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti, &cell->ueCb[ueId-1], isRetxMsg4, *msg4HqProc);
1837 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1838 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1839 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1840 cell->raCb[ueId-1].msg4recvd = FALSE;
1843 cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
1848 /*******************************************************************
1850 * @brief Handler to calculate TBS size for BSR requested
1854 * Function : schCalculateUlTbs
1856 * Functionality: Function will note the required TBS for each LCGIDX and use
1857 * the Priority LCG List and RRM policy to allocate the TBS size
1859 * @params [in] ueCb (Pointer to UE CB)
1860 * [in] puschTime (Time slot where PUSCH will be sent)
1861 * [in] symbLen (No of Symbols used for PUSCH transmission)
1862 * [out] startPrb(Pointer to startPRB which will be calculated while
1863 * finding the best Free Block)
1864 * [out] totTBS(Pointer to total TBS size)
1865 * [in] isRetx (to indicate retransmission)
1866 * [in] hqP (UL Harq process pointer)
1868 * @return uint8_t : ROK > Scheduling of UL grant is successful
1869 * RFAILED > vice versa
1871 * ****************************************************************/
1872 uint8_t schCalculateUlTbs(SchUeCb *ueCb, SlotTimingInfo puschTime, uint8_t symbLen,\
1873 uint16_t *startPrb, uint32_t *totTBS, bool isRetx, SchUlHqProcCb *hqP)
1875 uint16_t mcsIdx = 0;
1876 CmLListCp *lcLL = NULLP;
1877 uint16_t lcgIdx = 0, lcId =0, maxFreePRB = 0;
1878 uint16_t rsvdDedicatedPRB;
1883 for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
1885 if(ueCb->bsrInfo[lcgIdx].dataVol == 0)
1890 /*TODO: lcgIdx and LCID has been implemented as one to one mapping.
1891 * Need to check the mapping to figure out the LCID and lcgIdx once L2
1892 * spec specifies any logic*/
1894 if(ueCb->ulInfo.ulLcCtxt[lcId].isDedicated)
1896 lcLL = &(hqP->ulLcPrbEst.dedLcList);
1897 rsvdDedicatedPRB = ueCb->ulInfo.ulLcCtxt[lcId].rsvdDedicatedPRB;
1901 lcLL = &(hqP->ulLcPrbEst.defLcList);
1904 /*[Step2]: Update the reqPRB and Payloadsize for this LC in the appropriate List*/
1905 if(updateLcListReqPRB(lcLL, lcId, ueCb->bsrInfo[lcgIdx].dataVol) != ROK)
1907 DU_LOG("\nERROR --> SCH: LcgId:%d updation failed",lcId);
1912 if ((hqP->ulLcPrbEst.defLcList.count == 0) && (hqP->ulLcPrbEst.dedLcList.count == 0))
1914 if( (ueCb->srRcvd) || (isRetx) )
1916 *startPrb = MAX_NUM_RB;
1917 *totTBS = schCalcTbSize(UL_GRANT_SIZE);
1919 /*Returning true when NO Grant is there for UE as this is not scheduling
1924 maxFreePRB = searchLargestFreeBlock(ueCb->cellCb, puschTime, startPrb, DIR_UL);
1926 /*[Step4]: Estimation of PRB and BO which can be allocated to each LC in
1927 * the list based on RRM policy*/
1929 /*Either this UE contains no reservedPRB pool fir dedicated S-NSSAI or
1930 * Num of Free PRB available is not enough to reserve Dedicated PRBs*/
1933 mcsIdx = ueCb->ueCfg.ulModInfo.mcsIndex;
1934 if((hqP->ulLcPrbEst.dedLcList.count == 0) || ((maxFreePRB < rsvdDedicatedPRB)))
1936 hqP->ulLcPrbEst.sharedNumPrb = maxFreePRB;
1937 DU_LOG("\nDEBUG --> SCH : UL Only Default Slice is scheduled, sharedPRB Count:%d",\
1938 hqP->ulLcPrbEst.sharedNumPrb);
1940 /*PRB Alloc for Default LCs*/
1941 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen,\
1942 &(hqP->ulLcPrbEst.sharedNumPrb), NULLP, NULLP,&(ueCb->srRcvd));
1946 hqP->ulLcPrbEst.sharedNumPrb = maxFreePRB - rsvdDedicatedPRB;
1948 /*PRB Alloc for Dedicated LCs*/
1949 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.dedLcList), TRUE, mcsIdx, symbLen,\
1950 &(hqP->ulLcPrbEst.sharedNumPrb), &(rsvdDedicatedPRB),\
1951 NULLP,&(ueCb->srRcvd));
1953 /*PRB Alloc for Default LCs*/
1954 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen, \
1955 &(hqP->ulLcPrbEst.sharedNumPrb), &(rsvdDedicatedPRB),\
1956 NULLP,&(ueCb->srRcvd));
1959 /*[Step5]:Traverse each LCID in LcList to calculate the exact Scheduled Bytes
1960 * using allocated BO per LC and Update dlMsgAlloc(BO report for MAC*/
1961 if(hqP->ulLcPrbEst.dedLcList.count != 0)
1962 updateGrantSizeForBoRpt(&(hqP->ulLcPrbEst.dedLcList), NULLP, ueCb->bsrInfo, totTBS);
1964 updateGrantSizeForBoRpt(&(hqP->ulLcPrbEst.defLcList), NULLP, ueCb->bsrInfo, totTBS);
1966 /*Below case will hit if NO LC(s) are allocated due to resource crunch*/
1971 DU_LOG("\nERROR --> SCH : NO FREE PRB!!");
1975 /*Schedule the LC for next slot*/
1976 DU_LOG("\nDEBUG --> SCH : No LC has been scheduled");
1983 /*******************************************************************
1985 * @brief sch Process pending Sr or Bsr Req
1989 * Function : schProcessSrOrBsrReq
1992 * sch Process pending Sr or Bsr Req
1994 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1995 * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
1996 * @return true - success
1999 *******************************************************************/
2000 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
2002 bool k2Found = FALSE;
2003 uint8_t ret = RFAILED;
2004 uint8_t startSymb = 0, symbLen = 0;
2005 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
2006 uint16_t startPrb = 0;
2007 uint32_t totDataReq = 0; /* in bytes */
2009 SchPuschInfo *puschInfo;
2010 DciInfo *dciInfo = NULLP;
2011 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
2012 SlotTimingInfo dciTime, puschTime;
2016 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
2020 ueCb = &cell->ueCb[ueId-1];
2024 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
2028 if (isRetx == FALSE)
2030 if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
2036 /* Calculating time frame to send DCI for SR */
2037 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
2039 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2042 if(ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
2043 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2InfoTbl;
2045 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
2047 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
2049 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
2051 if(!ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
2053 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
2054 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
2055 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
2059 k2Val = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
2060 startSymb = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
2061 symbLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
2063 /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
2064 /* Calculating time frame to send PUSCH for SR */
2065 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots);
2067 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2070 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
2077 ADD_DELTA_TO_TIME(puschTime, (*hqP)->puschTime, 0, cell->numSlots);
2085 ret = schCalculateUlTbs(ueCb, puschTime, symbLen, &startPrb, &totDataReq, isRetx, *hqP);
2087 if(totDataReq > 0 && ret == ROK)
2089 SCH_ALLOC(dciInfo, sizeof(DciInfo));
2092 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
2095 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2096 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, RFAILED);
2098 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2102 cell->schDlSlotInfo[dciTime.slot]->ulGrant = dciInfo;
2103 memset(dciInfo,0,sizeof(DciInfo));
2105 /* Update PUSCH allocation */
2106 if(schFillPuschAlloc(ueCb, puschTime, totDataReq, startSymb, symbLen, startPrb, isRetx, *hqP) == ROK)
2108 if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
2110 puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
2111 if(puschInfo != NULLP)
2113 /* Fill DCI for UL grant */
2114 schFillUlDci(ueCb, puschInfo, dciInfo, isRetx, *hqP);
2115 memcpy(&dciInfo->slotIndInfo, &dciTime, sizeof(SlotTimingInfo));
2116 ueCb->srRcvd = false;
2117 ueCb->bsrRcvd = false;
2118 cell->schUlSlotInfo[puschTime.slot]->puschUe = ueId;
2119 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2120 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, ROK);
2121 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, ROK);
2122 cmLListAdd2Tail(&(ueCb->hqUlmap[puschTime.slot]->hqList), &(*hqP)->ulSlotLnk);
2127 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2128 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, RFAILED);
2129 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2134 DU_LOG("\nERROR --> SCH : schProcessSrOrBsrReq(): K2 value is not found");
2141 /*******************************************************************
2143 * @brief sch Process pending Sr or Bsr Req
2147 * Function : updateBsrAndLcList
2150 * Updating the BSRInfo in UECB and Lclist
2152 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
2153 * @return ROK - success
2156 *******************************************************************/
2157 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
2159 CmLList *node = NULLP, *next = NULLP;
2160 LcInfo *lcNode = NULLP;
2164 DU_LOG("\nERROR --> SCH: LcList not present");
2181 lcNode = (LcInfo *)node->node;
2184 /*Only when Status is OK then allocation is marked as ZERO and reqBO
2185 * is updated in UE's DB. If Failure, then allocation is added to reqBO
2186 * and same is updated in Ue's DB inside BSR Info structure*/
2189 lcNode->allocBO = 0;
2192 lcNode->reqBO += lcNode->allocBO;
2193 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
2194 if(lcNode->reqBO == 0)
2196 handleLcLList(lcLL, lcNode->lcId, DELETE);
2203 /********************************************************************************
2205 * @brief Increment the Slot by a input factor
2209 * Function : schIncrSlot
2212 * Increment the slot by a input factor till num of Slots configured in a
2213 * Radio Frame. If it exceeds, move to next sfn.
2215 * @params[in/out] SlotTimingInfo timingInfo
2216 * [in] uint8_t incr [Increment factor]
2217 * [in] numSlotsPerRF [Number of Slots configured per RF as per
2219 * @return ROK - success
2222 *******************************************************************/
2223 void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
2225 timingInfo->slot += incr;
2226 if(timingInfo->slot >= numSlotsPerRF)
2228 timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
2229 timingInfo->slot %= numSlotsPerRF;
2230 if(timingInfo->sfn > MAX_SFN)
2232 timingInfo->sfn %= MAX_SFN;
2237 /*******************************************************************
2239 * @brief Fill PDSCH info in Page Alloc
2243 * Function : schFillPagePdschCfg
2245 * Functionality: Fill PDSCH info in Page Alloc
2247 * @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
2248 * uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
2250 * @return pointer to return Value(ROK, RFAILED)
2252 * ****************************************************************/
2253 uint8_t schFillPagePdschCfg(SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
2255 uint8_t cwCount = 0;
2256 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
2258 /* fill the PDSCH PDU */
2260 pagePdschCfg->pduBitmap = 0; /* PTRS and CBG params are excluded */
2261 pagePdschCfg->rnti = P_RNTI; /* SI-RNTI */
2262 pagePdschCfg->pduIndex = 0;
2263 pagePdschCfg->numCodewords = 1;
2264 for(cwCount = 0; cwCount < pagePdschCfg->numCodewords; cwCount++)
2266 pagePdschCfg->codeword[cwCount].targetCodeRate = 308;
2267 pagePdschCfg->codeword[cwCount].qamModOrder = 2;
2268 pagePdschCfg->codeword[cwCount].mcsIndex = mcs;
2269 pagePdschCfg->codeword[cwCount].mcsTable = 0; /* notqam256 */
2270 pagePdschCfg->codeword[cwCount].rvIndex = 0;
2271 tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
2272 pagePdschCfg->codeword[cwCount].tbSize = tbSize;
2274 pagePdschCfg->dataScramblingId = cell->cellCfg.phyCellId;
2275 pagePdschCfg->numLayers = 1;
2276 pagePdschCfg->transmissionScheme = 0;
2277 pagePdschCfg->refPoint = 0;
2278 pagePdschCfg->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
2279 pagePdschCfg->dmrs.dmrsConfigType = 0; /* type-1 */
2280 pagePdschCfg->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
2281 pagePdschCfg->dmrs.scid = 0;
2282 pagePdschCfg->dmrs.numDmrsCdmGrpsNoData = 1;
2283 pagePdschCfg->dmrs.dmrsPorts = 0x0001;
2284 pagePdschCfg->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
2285 pagePdschCfg->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
2286 pagePdschCfg->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
2288 pagePdschCfg->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
2289 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
2290 pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb = startPrb;
2291 pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
2292 pagePdschCfg->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
2293 pagePdschCfg->pdschTimeAlloc.rowIndex = 1;
2294 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
2295 pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
2296 pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
2298 /* Find total symbols occupied including DMRS */
2299 dmrsStartSymbol = findDmrsStartSymbol(pagePdschCfg->dmrs.dlDmrsSymbPos);
2300 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
2301 * in that case only PDSCH symbols are marked as occupied */
2302 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
2304 startSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb;
2305 numSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2307 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
2310 startSymbol = dmrsStartSymbol;
2311 numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2314 /* Allocate the number of PRBs required for DL PDSCH */
2315 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
2316 &pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
2318 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
2322 pagePdschCfg->beamPdschInfo.numPrgs = 1;
2323 pagePdschCfg->beamPdschInfo.prgSize = 1;
2324 pagePdschCfg->beamPdschInfo.digBfInterfaces = 0;
2325 pagePdschCfg->beamPdschInfo.prg[0].pmIdx = 0;
2326 pagePdschCfg->beamPdschInfo.prg[0].beamIdx[0] = 0;
2327 pagePdschCfg->txPdschPower.powerControlOffset = 0;
2328 pagePdschCfg->txPdschPower.powerControlOffsetSS = 0;
2333 /**********************************************************************
2335 **********************************************************************/