1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
46 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
54 * @brief common resource allocation for SSB
58 * Function : schBroadcastSsbAlloc
60 * This function handles common scheduling for SSB
62 * @param[in] SchCellCb *cell, cell cb
63 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
66 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
69 uint8_t ssbStartSymb, idx;
71 SchDlSlotInfo *schDlSlotInfo;
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
80 if(dlBrdcstAlloc == NULL)
82 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
86 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
87 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
88 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
90 /* Assign interface structure */
91 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
94 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
95 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
96 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
97 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
98 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
99 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
102 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
104 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
109 schDlSlotInfo->ssbPres = true;
110 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
115 * @brief common resource allocation for SIB1
119 * Function : schBroadcastSib1Alloc
121 * This function handles common scheduling for SIB1
123 * @param[in] SchCellCb *cell, cell cb
124 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
127 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
129 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
131 ResAllocType1 freqAlloc;
132 TimeDomainAlloc timeAlloc;
133 SchDlSlotInfo *schDlSlotInfo = NULLP;
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
141 if(dlBrdcstAlloc == NULL)
143 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
147 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
148 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
149 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
150 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
152 /* Find total symbols used including DMRS */
153 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
154 * in that case only PDSCH symbols are marked as occupied */
155 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
156 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
158 startSymbol = timeAlloc.startSymb;
159 numSymbol = timeAlloc.numSymb;
161 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
164 startSymbol = dmrsStartSymbol;
165 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
169 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
171 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
175 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
176 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
177 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
178 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
179 schDlSlotInfo->sib1Pres = true;
183 /*******************************************************************
185 * @brief Handles sending UL scheduler info to MAC
189 * Function : sendUlSchInfoToMac
192 * Sends UL Sch info to MAC from SCH
195 * @return ROK - success
198 * ****************************************************************/
199 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
203 memset(&pst, 0, sizeof(Pst));
204 FILL_PST_SCH_TO_MAC(pst, inst);
205 pst.event = EVENT_UL_SCH_INFO;
207 return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
211 * @brief Function to fill Pucch Format 0
215 * Function : fillPucchFormat0
217 * Function to fill Pucch format 0
219 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
223 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
225 if(resrcInfo->SchPucchFormat.format0)
227 ulSchedPucch->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
228 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
229 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
230 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
231 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
236 * @brief Function to fill Pucch Format 1
240 * Function : fillPucchFormat1
242 * Function to fill Pucch format 1
244 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
248 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
250 if(resrcInfo->SchPucchFormat.format1)
252 ulSchedPucch->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
253 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
254 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
255 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
256 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
257 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
262 * @brief Function to fill Pucch format for UL Sched Info
266 * Function : fillUlSchedPucchFormat
268 * Function to fill Pucch format for UL Sched Info
270 * @param[in] pucchFormat , SchPucchInfo pointer,
271 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
275 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
276 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
285 fillPucchFormat0(ulSchedPucch, resrcInfo);
292 fillPucchFormat1(ulSchedPucch, resrcInfo);
296 ulSchedPucch->addDmrs = formatCfg->addDmrs;
297 ulSchedPucch->pi2BPSK = formatCfg->pi2BPSK;
300 }/* To Add support for more Pucch Format */
303 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
311 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
315 * Function : fillUlSchedPucchDedicatedCfg
317 * Function to fill Pucch Dedicated Cfg for UL Sched Info
319 * @param[in] pucchFormat to be filled
320 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
324 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
325 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
327 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
328 uint16_t srOffset = 0;
329 uint16_t numSlots = cell->numSlots;
330 bool isAllocated = false;
331 uint16_t pucchStartPrb;
333 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
335 //Assuming one entry in the list
336 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
338 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
340 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
341 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
343 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
344 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
345 ulSchedPucch->fdAlloc.resAlloc.type1.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
346 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
347 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
348 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
352 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
353 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
366 if(pucchDedCfg->format1)
368 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
378 /* setting SR and UCI flag */
379 if(pucchDedCfg->schedReq)
381 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
383 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
384 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
387 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
389 ulSchedPucch->srFlag = true;
396 * @brief Function to fill Pucch Resource Info
400 * Function : fillPucchResourceInfo
402 * Function to fill Pucch Resource Info
404 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
405 * @return ROK/RFAILED
408 uint16_t fillPucchResourceInfo(uint8_t ueId, SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
410 uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
411 SchCellCb *cell = schCb[inst].cells[inst];
412 SchPucchCfgCmn *pucchCfg = NULLP;
413 SchBwpParams *ulBwp = NULLP;
415 SchUeCb *ueCb = NULLP;
421 ueCb = &(cell->ueCb[ueIdx]);
422 if(ueCb->ueDrxInfoPres)
424 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
428 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfgPres)
430 /* fill pucch dedicated cfg */
431 ret = fillUlSchedPucchDedicatedCfg(cell,\
432 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
435 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
436 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
442 /* fill pucch common cfg */
443 /* derive pucchResourceSet from schCellCfg */
444 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
445 pucchIdx = pucchCfg->pucchResourceCommon;
446 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
447 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
448 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
449 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
452 schPucchInfo->fdAlloc.resAlloc.type1.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
453 schPucchInfo->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
454 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
455 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
456 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
458 /* set SR and UCI flag to false */
459 schPucchInfo->srFlag = true;
466 * @brief resource allocation for UL
470 * Function : schUlResAlloc
472 * This function handles UL Resource allocation
474 * @param[in] SchCellCb *cell, cellCb
477 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
483 UlSchedInfo ulSchedInfo;
484 SchUlSlotInfo *schUlSlotInfo = NULLP;
485 SlotTimingInfo ulTimingInfo;
486 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
489 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA, cell->numSlots);
491 ulSchedInfo.cellId = cell->cellId;
492 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
493 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
494 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
496 /* Schedule resources for PRACH */
497 if(cell->firstSib1Transmitted)
498 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
500 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
501 if(schUlSlotInfo->schPuschInfo)
503 GET_CRNTI(ulSchedInfo.crnti, schUlSlotInfo->puschUe);
504 /* Check the ue drx status if the UE is active for uplink scheduling or not */
506 ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
507 if(ueCb->ueDrxInfoPres)
509 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
513 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
514 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
515 sizeof(SchPuschInfo));
516 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
517 schUlSlotInfo->schPuschInfo = NULL;
520 if(schUlSlotInfo->pucchPres)
522 GET_CRNTI(ulSchedInfo.crnti, schUlSlotInfo->pucchUe);
523 ret = fillPucchResourceInfo(schUlSlotInfo->pucchUe, &schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
526 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
527 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
528 sizeof(SchPucchInfo));
534 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
538 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
541 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
544 schInitUlSlot(schUlSlotInfo);
548 /*******************************************************************
550 * @brief Fills pdcch and pdsch info for msg4
554 * Function : schDlRsrcAllocMsg4
557 * Fills pdcch and pdsch info for msg4
559 * @params[in] SchCellCb *cell, SlotTimingInfo msg4Time
560 * @params[in] uint8_t ueId, DlMsgAlloc *dlMsgAlloc
561 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
562 * @params[in] bool isRetx, SchDlHqProcCb *hqP
563 * @return ROK - success
566 * ****************************************************************/
567 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
568 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
570 uint8_t coreset0Idx = 0;
571 uint8_t firstSymbol = 0;
572 uint8_t numSymbols = 0;
573 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
574 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
577 SchBwpDlCfg *initialBwp = NULLP;
578 PdcchCfg *pdcch = NULLP;
579 PdschCfg *pdsch = NULLP;
581 DlMsgSchInfo *msg4Alloc = NULLP;
585 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
589 if(dlMsgAlloc == NULL)
591 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
595 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
596 initialBwp = &cell->cellCfg.schInitialDlBwp;
597 pdcch = &msg4Alloc->dlMsgPdcchCfg;
598 pdsch = &msg4Alloc->dlMsgPdschCfg;
599 bwp = &msg4Alloc->bwp;
600 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
602 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti, isRetx, hqP);
603 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
605 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
606 numRbs = coresetIdxTable[coreset0Idx][1];
607 numSymbols = coresetIdxTable[coreset0Idx][2];
609 /* calculate time domain parameters */
610 uint16_t mask = 0x2000;
611 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
613 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
620 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
621 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
622 bwp->subcarrierSpacing = initialBwp->bwp.scs;
623 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
625 /* fill the PDCCH PDU */
626 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
627 pdcch->coresetCfg.durationSymbols = numSymbols;
628 memcpy(pdcch->coresetCfg.freqDomainResource, \
629 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
631 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
632 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
633 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
634 pdcch->coresetCfg.coreSetType = 0;
635 pdcch->coresetCfg.coreSetSize = numRbs;
636 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
637 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
639 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
640 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
641 pdcch->dci.scramblingRnti = 0;
642 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
643 pdcch->dci.aggregLevel = 4;
644 pdcch->dci.beamPdcchInfo.numPrgs = 1;
645 pdcch->dci.beamPdcchInfo.prgSize = 1;
646 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
647 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
648 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
649 pdcch->dci.txPdcchPower.powerValue = 0;
650 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
651 pdcch->dci.pdschCfg = pdsch;
653 /* fill the PDSCH PDU */
655 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
656 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
658 pdsch->numCodewords = 1;
659 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
661 pdsch->codeword[cwCount].targetCodeRate = 308;
662 pdsch->codeword[cwCount].qamModOrder = 2;
663 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
664 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
667 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
668 hqP->tbInfo[cwCount].tbSzReq = tbSize;
669 pdsch->codeword[cwCount].rvIndex = 0;
673 pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03;
674 tbSize = hqP->tbInfo[cwCount].tbSzReq;
676 pdsch->codeword[cwCount].tbSize = tbSize;
678 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
679 pdsch->numLayers = 1;
680 pdsch->transmissionScheme = 0;
682 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
683 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
684 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
685 pdsch->dmrs.scid = 0;
686 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
687 pdsch->dmrs.dmrsPorts = 0;
688 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
689 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
690 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
692 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
693 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
695 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
696 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
697 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
698 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
700 /* Find total symbols occupied including DMRS */
701 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
702 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
703 * in that case only PDSCH symbols are marked as occupied */
704 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
706 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
707 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
709 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
712 startSymbol = dmrsStartSymbol;
713 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
716 /* Allocate the number of PRBs required for RAR PDSCH */
717 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
718 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
720 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
724 pdsch->beamPdschInfo.numPrgs = 1;
725 pdsch->beamPdschInfo.prgSize = 1;
726 pdsch->beamPdschInfo.digBfInterfaces = 0;
727 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
728 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
729 pdsch->txPdschPower.powerControlOffset = 0;
730 pdsch->txPdschPower.powerControlOffsetSS = 0;
732 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
736 /*******************************************************************
738 * @brief Scheduling for Pucch Resource
742 * Function : schAllocPucchResource
745 * Scheduling for Pucch Resource
747 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
748 * @params[in] SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP
749 * @return ROK - success
752 *******************************************************************/
754 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,
755 SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP)
757 uint16_t pucchSlot = 0;
758 SchUlSlotInfo *schUlSlotInfo = NULLP;
760 pucchSlot = pucchTime.slot;
761 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
762 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
764 schUlSlotInfo->pucchPres = true;
767 /* set HARQ flag to true */
768 schUlSlotInfo->schPucchInfo.harqInfo.harqBitLength = 1; /* 1 bit for HARQ */
769 ADD_DELTA_TO_TIME(pucchTime, pucchTime, 3, cell->numSlots); /* SLOT_DELAY=3 */
770 cmLListAdd2Tail(&(ueCb->hqDlmap[pucchTime.slot]->hqList), &hqP->ulSlotLnk);
775 /*******************************************************************
777 * @brief Fills pdcch and pdsch info for dedicated DL msg
781 * Function : schDlRsrcAllocDlMsg
784 * Fills pdcch and pdsch info for dl msg
786 * @params[in] SchCellCb *cell, SlotTimingInfo slotTime
787 * @params[in] uint16_t crnti, uint32_t tbSize
788 * @params[in] DlMsgAlloc *dlMsgAlloc, uint16_t startPRB
789 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
790 * @params[in] bool isRetx, SchDlHqProcCb *hqP
791 * @return ROK - success
794 * ****************************************************************/
795 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
796 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol,
797 uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
800 PdcchCfg *pdcch = NULLP;
801 PdschCfg *pdsch = NULLP;
804 SchControlRsrcSet coreset1;
805 SchPdschConfig pdschCfg;
806 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
808 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
809 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
810 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
812 GET_UE_ID(crnti, ueId);
813 ueCb = cell->ueCb[ueId-1];
814 coreset1 = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
815 pdschCfg = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg;
818 bwp->freqAlloc.numPrb = MAX_NUM_RB;
819 bwp->freqAlloc.startPrb = 0;
820 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
821 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
823 /* fill the PDCCH PDU */
824 //Considering coreset1 also starts from same symbol as coreset0
825 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
826 pdcch->coresetCfg.durationSymbols = coreset1.duration;
827 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
828 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
829 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
830 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
831 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
832 //Considering number of RBs in coreset1 is same as coreset0
833 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
834 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
835 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
837 pdcch->dci.rnti = ueCb.crnti;
838 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
839 pdcch->dci.scramblingRnti = 0;
840 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
841 pdcch->dci.aggregLevel = 4;
842 pdcch->dci.beamPdcchInfo.numPrgs = 1;
843 pdcch->dci.beamPdcchInfo.prgSize = 1;
844 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
845 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
846 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
847 pdcch->dci.txPdcchPower.powerValue = 0;
848 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
850 /* fill the PDSCH PDU */
852 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
853 pdsch->rnti = ueCb.crnti;
855 pdsch->numCodewords = 1;
856 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
858 pdsch->codeword[cwCount].targetCodeRate = 308;
859 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
860 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
861 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
862 pdsch->codeword[cwCount].rvIndex = 0;
866 tbSize +=TX_PAYLOAD_HDR_LEN;
867 hqP->tbInfo[cwCount].tbSzReq = tbSize;
869 pdsch->codeword[cwCount].tbSize = tbSize;
871 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
872 pdsch->numLayers = 1;
873 pdsch->transmissionScheme = 0;
875 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
876 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
877 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
878 pdsch->dmrs.scid = 0;
879 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
880 pdsch->dmrs.dmrsPorts = 0;
881 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
882 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
883 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
885 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
886 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
888 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
889 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
890 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
891 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
893 /* Find total symbols occupied including DMRS */
894 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
895 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
896 * in that case only PDSCH symbols are marked as occupied */
897 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
899 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
900 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
902 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
905 startSymbol = dmrsStartSymbol;
906 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
909 /* Allocate the number of PRBs required for DL PDSCH */
910 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
911 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
913 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
917 pdsch->beamPdschInfo.numPrgs = 1;
918 pdsch->beamPdschInfo.prgSize = 1;
919 pdsch->beamPdschInfo.digBfInterfaces = 0;
920 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
921 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
922 pdsch->txPdschPower.powerControlOffset = 0;
923 pdsch->txPdschPower.powerControlOffsetSS = 0;
925 pdcch->dci.pdschCfg = pdsch;
929 /*******************************************************************
931 * @brief Fills k0 and k1 information table for FDD
935 * Function : BuildK0K1TableForFdd
938 * Fills k0 and k1 information table for FDD
940 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
941 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
942 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
943 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
944 * @return ROK - success
947 * ****************************************************************/
948 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
949 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
952 uint8_t k1TmpVal =0, cfgIdx=0;
953 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
955 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
956 * required but this will require for harq processing */
957 // uint8_t k0TmpVal = 0;
958 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
959 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
961 /* Initialization the structure and storing the total slot values. */
962 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
963 k0K1InfoTbl->tblSize = cell->numSlots;
965 /* Storing time domain resource allocation list based on common or dedicated configuration. */
966 if(pdschCfgCmnPres == true)
968 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
969 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
971 /*TODO uncomment this line during harq processing */
972 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
977 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
978 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
980 /*TODO uncomment this line during harq processing */
981 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
985 /* Checking all the slots for K0 and K1 values. */
986 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
989 /* Storing the values of k0 based on time domain resource
990 * allocation list. If the value is unavailable then fill default values,
991 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
992 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
994 /* TODO These if 0 we will remove during harq processing */
996 if(pdschCfgCmnPres == true)
998 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1002 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1004 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1008 k0TmpVal = DEFAULT_K0_VALUE;
1012 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
1013 * then skip else continue storing the values. */
1015 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1017 k1TmpVal = UlAckTbl[k1Index];
1018 if(k1TmpVal <= MIN_NUM_K1_IDX)
1023 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1024 /* TODO Store K1 index where harq feedback will be received in harq table. */
1028 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1029 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1035 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1040 /*******************************************************************
1042 * @brief Fills k0 and k1 information table
1046 * Function : BuildK0K1Table
1049 * Fills K0 and k1 information table
1051 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1052 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1053 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1054 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1055 * @return ROK - success
1058 * ****************************************************************/
1059 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1060 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1065 bool ulSlotPresent = false;
1066 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1067 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1068 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1069 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1072 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1074 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1080 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1081 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1082 k0K1InfoTbl->tblSize = cell->numSlots;
1083 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1085 /* Storing time domain resource allocation list based on common or
1086 * dedicated configuration availability. */
1087 if(pdschCfgCmnPres == true)
1089 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1090 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1092 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1097 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1098 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1100 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1104 /* Checking all possible indexes for K0 and K1 values. */
1105 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1107 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1108 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1109 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1114 /* Storing K0 , start symbol and length symbol for further processing.
1115 * If K0 value is not available then we can fill the default values
1116 * given in spec 38.331. */
1118 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1120 if(pdschCfgCmnPres == true)
1122 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1123 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1124 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1128 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1130 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1134 k0TmpVal = DEFAULT_K0_VALUE;
1136 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1137 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1140 /* If current slot + k0 is UL then skip the slot
1141 * else if it is DL slot then continue the next steps
1142 * else if it is a FLEXI slot then check symbols of slot, It should not
1143 * contain any UL slot. */
1144 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1145 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1146 if(slotCfg == UL_SLOT)
1150 if(slotCfg == FLEXI_SLOT)
1152 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1154 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1155 if(slotCfg == UL_SLOT)
1162 /* If current slot + k0 + k1 is a DL slot then skip the slot
1163 * else if it is UL slot then store the information
1164 * else if it is FLEXI slot then check the symbols, it must have
1165 * at least one UL symbol. */
1167 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1169 k1TmpVal = UlAckTbl[k1Index];
1170 if(k1TmpVal > MIN_NUM_K1_IDX)
1172 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1173 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1174 if(slotCfg == DL_SLOT)
1178 if(slotCfg == FLEXI_SLOT)
1180 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1182 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1184 ulSlotPresent = true;
1189 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1191 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1192 /* TODO Store K1 index where harq feedback will be received
1198 /* Store all the values if all condition satisfies. */
1201 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1202 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1208 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1215 /*******************************************************************
1217 * @brief Fills K2 information table for FDD
1221 * Function : BuildK2InfoTableForFdd
1224 * Fills K2 information table for FDD
1226 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1227 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1228 * @return ROK - success
1231 * ****************************************************************/
1232 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1233 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1235 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1237 /* Initialization the structure and storing the total slot values. */
1238 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1239 k2InfoTbl->tblSize = cell->numSlots;
1241 msg3K2InfoTbl->tblSize = cell->numSlots;
1243 /* Checking all possible indexes for K2. */
1244 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1246 /* Storing K2 values. */
1247 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1249 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1250 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1251 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1253 /* Updating K2 values for MSG3 */
1256 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1257 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1258 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1264 /*******************************************************************
1266 * @brief Fills K2 information table
1270 * Function : BuildK2InfoTable
1273 * Fills K2 information table
1275 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1276 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1277 * @return ROK - success
1280 * ****************************************************************/
1281 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1282 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1286 bool dlSymbolPresent = false;
1287 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1288 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1289 SlotConfig currentSlot;
1292 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1294 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1300 /* Initialization the structure and storing the total slot values. */
1301 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1302 k2InfoTbl->tblSize = cell->numSlots;
1304 msg3K2InfoTbl->tblSize = cell->numSlots;
1305 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1307 /* Checking all possible indexes for K2. */
1308 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1310 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1312 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1313 if(currentSlot != UL_SLOT)
1315 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1317 /* Storing k2, startSymbol, endSymbol information for further processing.
1318 * If k2 is absent then fill the default values given in spec 38.331
1319 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1320 k2Val = timeDomRsrcAllocList[k2Index].k2;
1323 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1326 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1329 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1332 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1335 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1340 /* Current slot + k2 should be either UL or FLEXI slot.
1341 * If slot is FLEXI then check all the symbols of that slot,
1342 * it should not contain any DL or FLEXI slot */
1343 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1344 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1345 if(slotCfg != DL_SLOT)
1347 if(slotCfg == FLEXI_SLOT)
1349 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1350 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1351 dlSymbolPresent = false;
1352 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1354 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1355 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1357 dlSymbolPresent = true;
1362 /* Store all the values if all condition satisfies. */
1363 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1365 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1366 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1367 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1373 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1375 /* Check for K2 for MSG3 */
1376 /* Current slot + k2 should be either UL or FLEXI slot.
1377 * If slot is FLEXI then check all the symbols of that slot,
1378 * it should not contain any DL or FLEXI slot */
1379 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1380 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1381 if(slotCfg != DL_SLOT)
1383 if(slotCfg == FLEXI_SLOT)
1385 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1386 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1387 dlSymbolPresent = false;
1388 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1390 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1391 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1393 dlSymbolPresent = true;
1398 /* Store all the values if all condition satisfies. */
1399 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1401 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1402 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1403 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1414 /*******************************************************************************************
1416 * @brief Allocate the PRB using RRM policy
1420 * Function : prbAllocUsingRRMPolicy
1423 * [Step1]: Traverse each Node in the LC list
1424 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1425 * [Step3]: Calcualte the maxPRB for this LC.
1426 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1428 * b. For Default, just SharedPRB count
1429 * [Step4]: If the LC is the First one to be allocated for this UE then add
1430 * TX_PAYLODN_LEN to reqBO
1431 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1432 * based on reqBO and maxPRB left.
1433 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1434 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1435 * [Step8]: Continue the next loop from List->head
1438 * [Exit1]: If all the LCs are allocated in list
1439 * [Exit2]: If PRBs are exhausted
1441 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1442 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1443 * I/P > mcsIdx and PDSCH symbols count
1444 * I/P & O/P > Shared PRB , reserved PRB Count
1445 * I/P & O/P > Total TBS size accumulated
1446 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1447 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1451 * *******************************************************************************************/
1452 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1453 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1455 CmLList *node = NULLP;
1456 LcInfo *lcNode = NULLP;
1457 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1461 DU_LOG("\nERROR --> SCH: LcList not present");
1466 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1467 * For Other LcList, remReservedPRB = 0*/
1468 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1470 remReservedPRB = *reservedPRB;
1477 /*For Debugging purpose*/
1480 lcNode = (LcInfo *)node->node;
1482 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1483 * process of LCID which was fully allocated. Check is just for safety purpose*/
1484 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1486 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1488 deleteNodeFromLList(lcLL, node);
1489 SCH_FREE(lcNode, sizeof(LcInfo));
1494 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1495 if(lcNode->allocBO != 0)
1497 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1501 /*[Exit2]: If PRBs are exhausted*/
1504 /*Loop Exit: All resources exhausted*/
1505 if(remReservedPRB == 0 && *sharedPRB == 0)
1507 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1513 /*Loop Exit: All resources exhausted*/
1516 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1522 maxPRB = remReservedPRB + *sharedPRB;
1525 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1527 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1529 *isTxPayloadLenAdded = TRUE;
1530 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1531 mcsIdx, numSymbols, maxPRB, &estPrb);
1532 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1534 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1536 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1539 lcNode->reqBO += UL_GRANT_SIZE;
1540 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1545 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1546 mcsIdx, numSymbols, maxPRB, &estPrb);
1549 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1550 * estimated PRB allocated*/
1551 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1553 remReservedPRB = remReservedPRB - estPrb;
1555 else /*LC requirement need PRB share from SharedPRB*/
1557 if(*sharedPRB <= (estPrb - remReservedPRB))
1559 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1564 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1570 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1571 lcNode->allocPRB = estPrb;
1572 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1574 /*[Step8]:Next loop: First LC to be picked from the list
1575 * because Allocated Nodes are moved to the last*/
1582 /*******************************************************************************************
1584 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1589 * Function : updateGrantSizeForBoRpt
1592 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1593 * BO Report in dlMsgAlloc Pointer
1595 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1596 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1597 * I/P & O/P > BsrInfo (applicable for UL)
1598 * I/P & O/P > accumalatedBOSize
1601 * *******************************************************************************************/
1602 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1603 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1605 CmLList *node = NULLP, *next = NULLP;
1606 LcInfo *lcNode = NULLP;
1607 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1611 DU_LOG("\nERROR --> SCH: LcList not present");
1629 lcNode = (LcInfo *)node->node;
1632 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1633 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1634 if(dlMsgAlloc != NULLP)
1636 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1638 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1639 * report for allocation can be sent to MAC*/
1640 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1641 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1643 /*Calculate the Total Payload/BO size allocated*/
1644 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1646 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1647 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1649 dlMsgSchInfo->numLc++;
1650 /*The LC has been fully allocated, clean it*/
1651 if(lcNode->reqBO == 0)
1653 handleLcLList(lcLL, lcNode->lcId, DELETE);
1656 else if(bsrInfo != NULLP)
1658 *accumalatedBOSize += lcNode->allocBO;
1659 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1660 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1668 /*******************************************************************
1670 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1674 * Function : fillDlMsgInfo
1677 * fill DL message information for MSG4 and Dedicated DL Msg
1679 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1680 * @params[in] bool isRetx, SchDlHqProcCb *hqP
1683 *******************************************************************/
1684 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti, bool isRetx, SchDlHqProcCb *hqP)
1686 hqP->tbInfo[0].isEnabled = TRUE;
1687 hqP->tbInfo[0].state = HQ_TB_WAITING;
1688 hqP->tbInfo[0].txCntr++;
1689 hqP->tbInfo[1].isEnabled = TRUE;
1690 hqP->tbInfo[1].state = HQ_TB_WAITING;
1691 hqP->tbInfo[1].txCntr++;
1692 dlMsgInfo->crnti = crnti;
1693 dlMsgInfo->ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
1694 dlMsgInfo->harqProcNum = hqP->procId;
1695 dlMsgInfo->dlAssignIdx = 0;
1696 dlMsgInfo->pucchTpc = 0;
1697 dlMsgInfo->pucchResInd = 0;
1698 dlMsgInfo->harqFeedbackInd = hqP->k1;
1699 dlMsgInfo->dciFormatId = 1;
1702 /*******************************************************************
1704 * @brief sch Process pending Msg4 Req
1708 * Function : schProcessMsg4Req
1711 * sch Process pending Msg4 Req
1713 * @params[in] SchCellCb *cell, cell cb struct pointer
1714 * @params[in] SlotTimingInfo currTime, current timing info
1715 * @params[in] uint8_t ueId, ue ID
1716 * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
1717 * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
1718 * @return ROK - success
1721 *******************************************************************/
1723 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
1725 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1726 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1727 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1728 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1732 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1736 if (isRetxMsg4 == FALSE)
1738 if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
1740 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : No process");
1745 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1746 &pucchTime, isRetxMsg4, *msg4HqProc) != true )
1748 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : k0 k1 not found");
1752 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1754 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1755 if(dciSlotAlloc == NULLP)
1757 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1760 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1761 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1762 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1765 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1767 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1768 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
1770 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1771 if(dciSlotAlloc->numSchedInfo == 0)
1773 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1774 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1777 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1781 /* Check if both DCI and RAR are sent in the same slot.
1782 * If not, allocate memory RAR PDSCH slot to store RAR info
1784 if(pdcchTime.slot == pdschTime.slot)
1786 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1787 dciSlotAlloc->numSchedInfo++;
1791 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1792 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1794 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1795 if(msg4SlotAlloc == NULLP)
1797 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1798 if(dciSlotAlloc->numSchedInfo == 0)
1800 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1801 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1804 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1807 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1808 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1809 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1812 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1814 /* Copy all RAR info */
1815 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1816 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1817 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1818 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1820 /* Assign correct PDU types in corresponding slots */
1821 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1822 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1823 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1825 dciSlotAlloc->numSchedInfo++;
1826 msg4SlotAlloc->numSchedInfo++;
1829 /* PUCCH resource */
1830 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti, &cell->ueCb[ueId-1], isRetxMsg4, *msg4HqProc);
1832 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1833 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1834 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1835 cell->raCb[ueId-1].msg4recvd = FALSE;
1838 cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
1843 /*******************************************************************
1845 * @brief Handler to calculate TBS size for BSR requested
1849 * Function : schCalculateUlTbs
1851 * Functionality: Function will note the required TBS for each LCGIDX and use
1852 * the Priority LCG List and RRM policy to allocate the TBS size
1854 * @params [in] ueCb (Pointer to UE CB)
1855 * [in] puschTime (Time slot where PUSCH will be sent)
1856 * [in] symbLen (No of Symbols used for PUSCH transmission)
1857 * [out] startPrb(Pointer to startPRB which will be calculated while
1858 * finding the best Free Block)
1859 * [out] totTBS(Pointer to total TBS size)
1860 * [in] isRetx (to indicate retransmission)
1861 * [in] hqP (UL Harq process pointer)
1863 * @return uint8_t : ROK > Scheduling of UL grant is successful
1864 * RFAILED > vice versa
1866 * ****************************************************************/
1867 uint8_t schCalculateUlTbs(SchUeCb *ueCb, SlotTimingInfo puschTime, uint8_t symbLen,\
1868 uint16_t *startPrb, uint32_t *totTBS, bool isRetx, SchUlHqProcCb *hqP)
1870 uint16_t mcsIdx = 0;
1871 CmLListCp *lcLL = NULLP;
1872 uint16_t lcgIdx = 0, lcId =0, maxFreePRB = 0;
1873 uint16_t rsvdDedicatedPRB;
1878 for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
1880 if(ueCb->bsrInfo[lcgIdx].dataVol == 0)
1885 /*TODO: lcgIdx and LCID has been implemented as one to one mapping.
1886 * Need to check the mapping to figure out the LCID and lcgIdx once L2
1887 * spec specifies any logic*/
1889 if(ueCb->ulInfo.ulLcCtxt[lcId].isDedicated)
1891 lcLL = &(hqP->ulLcPrbEst.dedLcList);
1892 rsvdDedicatedPRB = ueCb->ulInfo.ulLcCtxt[lcId].rsvdDedicatedPRB;
1896 lcLL = &(hqP->ulLcPrbEst.defLcList);
1899 /*[Step2]: Update the reqPRB and Payloadsize for this LC in the appropriate List*/
1900 if(updateLcListReqPRB(lcLL, lcId, ueCb->bsrInfo[lcgIdx].dataVol) != ROK)
1902 DU_LOG("\nERROR --> SCH: LcgId:%d updation failed",lcId);
1907 if ((hqP->ulLcPrbEst.defLcList.count == 0) && (hqP->ulLcPrbEst.dedLcList.count == 0))
1909 if( (ueCb->srRcvd) || (isRetx) )
1911 *startPrb = MAX_NUM_RB;
1912 *totTBS = schCalcTbSize(UL_GRANT_SIZE);
1914 /*Returning true when NO Grant is there for UE as this is not scheduling
1919 maxFreePRB = searchLargestFreeBlock(ueCb->cellCb, puschTime, startPrb, DIR_UL);
1921 /*[Step4]: Estimation of PRB and BO which can be allocated to each LC in
1922 * the list based on RRM policy*/
1924 /*Either this UE contains no reservedPRB pool fir dedicated S-NSSAI or
1925 * Num of Free PRB available is not enough to reserve Dedicated PRBs*/
1928 mcsIdx = ueCb->ueCfg.ulModInfo.mcsIndex;
1929 if((hqP->ulLcPrbEst.dedLcList.count == 0) || ((maxFreePRB < rsvdDedicatedPRB)))
1931 hqP->ulLcPrbEst.sharedNumPrb = maxFreePRB;
1932 DU_LOG("\nDEBUG --> SCH : UL Only Default Slice is scheduled, sharedPRB Count:%d",\
1933 hqP->ulLcPrbEst.sharedNumPrb);
1935 /*PRB Alloc for Default LCs*/
1936 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen,\
1937 &(hqP->ulLcPrbEst.sharedNumPrb), NULLP, NULLP,&(ueCb->srRcvd));
1941 hqP->ulLcPrbEst.sharedNumPrb = maxFreePRB - rsvdDedicatedPRB;
1943 /*PRB Alloc for Dedicated LCs*/
1944 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.dedLcList), TRUE, mcsIdx, symbLen,\
1945 &(hqP->ulLcPrbEst.sharedNumPrb), &(rsvdDedicatedPRB),\
1946 NULLP,&(ueCb->srRcvd));
1948 /*PRB Alloc for Default LCs*/
1949 prbAllocUsingRRMPolicy(&(hqP->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen, \
1950 &(hqP->ulLcPrbEst.sharedNumPrb), &(rsvdDedicatedPRB),\
1951 NULLP,&(ueCb->srRcvd));
1954 /*[Step5]:Traverse each LCID in LcList to calculate the exact Scheduled Bytes
1955 * using allocated BO per LC and Update dlMsgAlloc(BO report for MAC*/
1956 if(hqP->ulLcPrbEst.dedLcList.count != 0)
1957 updateGrantSizeForBoRpt(&(hqP->ulLcPrbEst.dedLcList), NULLP, ueCb->bsrInfo, totTBS);
1959 updateGrantSizeForBoRpt(&(hqP->ulLcPrbEst.defLcList), NULLP, ueCb->bsrInfo, totTBS);
1961 /*Below case will hit if NO LC(s) are allocated due to resource crunch*/
1966 DU_LOG("\nERROR --> SCH : NO FREE PRB!!");
1970 /*Schedule the LC for next slot*/
1971 DU_LOG("\nDEBUG --> SCH : No LC has been scheduled");
1978 /*******************************************************************
1980 * @brief sch Process pending Sr or Bsr Req
1984 * Function : schProcessSrOrBsrReq
1987 * sch Process pending Sr or Bsr Req
1989 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1990 * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
1991 * @return true - success
1994 *******************************************************************/
1995 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
1997 bool k2Found = FALSE;
1998 uint8_t ret = RFAILED;
1999 uint8_t startSymb = 0, symbLen = 0;
2000 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
2001 uint16_t startPrb = 0;
2002 uint32_t totDataReq = 0; /* in bytes */
2004 SchPuschInfo *puschInfo;
2005 DciInfo *dciInfo = NULLP;
2006 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
2007 SlotTimingInfo dciTime, puschTime;
2011 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
2015 ueCb = &cell->ueCb[ueId-1];
2019 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
2023 if (isRetx == FALSE)
2025 if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
2031 /* Calculating time frame to send DCI for SR */
2032 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
2034 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2037 if(ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
2038 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2InfoTbl;
2040 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
2042 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
2044 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
2046 if(!ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
2048 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
2049 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
2050 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
2054 k2Val = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
2055 startSymb = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
2056 symbLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
2058 /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
2059 /* Calculating time frame to send PUSCH for SR */
2060 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots);
2062 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2065 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
2072 ADD_DELTA_TO_TIME(puschTime, (*hqP)->puschTime, 0, cell->numSlots);
2080 ret = schCalculateUlTbs(ueCb, puschTime, symbLen, &startPrb, &totDataReq, isRetx, *hqP);
2082 if(totDataReq > 0 && ret == ROK)
2084 SCH_ALLOC(dciInfo, sizeof(DciInfo));
2087 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
2090 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2091 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, RFAILED);
2093 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2097 cell->schDlSlotInfo[dciTime.slot]->ulGrant = dciInfo;
2098 memset(dciInfo,0,sizeof(DciInfo));
2100 /* Update PUSCH allocation */
2101 if(schFillPuschAlloc(ueCb, puschTime, totDataReq, startSymb, symbLen, startPrb, isRetx, *hqP) == ROK)
2103 if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
2105 puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
2106 if(puschInfo != NULLP)
2108 /* Fill DCI for UL grant */
2109 schFillUlDci(ueCb, puschInfo, dciInfo, isRetx, *hqP);
2110 memcpy(&dciInfo->slotIndInfo, &dciTime, sizeof(SlotTimingInfo));
2111 ueCb->srRcvd = false;
2112 ueCb->bsrRcvd = false;
2113 cell->schUlSlotInfo[puschTime.slot]->puschUe = ueId;
2114 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2115 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, ROK);
2116 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, ROK);
2117 cmLListAdd2Tail(&(ueCb->hqUlmap[puschTime.slot]->hqList), &(*hqP)->ulSlotLnk);
2122 if((*hqP)->ulLcPrbEst.dedLcList.count != 0)
2123 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.dedLcList), ueCb->bsrInfo, RFAILED);
2124 updateBsrAndLcList(&((*hqP)->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2129 DU_LOG("\nERROR --> SCH : schProcessSrOrBsrReq(): K2 value is not found");
2136 /*******************************************************************
2138 * @brief sch Process pending Sr or Bsr Req
2142 * Function : updateBsrAndLcList
2145 * Updating the BSRInfo in UECB and Lclist
2147 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
2148 * @return ROK - success
2151 *******************************************************************/
2152 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
2154 CmLList *node = NULLP, *next = NULLP;
2155 LcInfo *lcNode = NULLP;
2159 DU_LOG("\nERROR --> SCH: LcList not present");
2176 lcNode = (LcInfo *)node->node;
2179 /*Only when Status is OK then allocation is marked as ZERO and reqBO
2180 * is updated in UE's DB. If Failure, then allocation is added to reqBO
2181 * and same is updated in Ue's DB inside BSR Info structure*/
2184 lcNode->allocBO = 0;
2187 lcNode->reqBO += lcNode->allocBO;
2188 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
2189 if(lcNode->reqBO == 0)
2191 handleLcLList(lcLL, lcNode->lcId, DELETE);
2198 /********************************************************************************
2200 * @brief Increment the Slot by a input factor
2204 * Function : schIncrSlot
2207 * Increment the slot by a input factor till num of Slots configured in a
2208 * Radio Frame. If it exceeds, move to next sfn.
2210 * @params[in/out] SlotTimingInfo timingInfo
2211 * [in] uint8_t incr [Increment factor]
2212 * [in] numSlotsPerRF [Number of Slots configured per RF as per
2214 * @return ROK - success
2217 *******************************************************************/
2218 void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
2220 timingInfo->slot += incr;
2221 if(timingInfo->slot >= numSlotsPerRF)
2223 timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
2224 timingInfo->slot %= numSlotsPerRF;
2225 if(timingInfo->sfn > MAX_SFN)
2227 timingInfo->sfn %= MAX_SFN;
2232 /*******************************************************************
2234 * @brief Fill PDSCH info in Page Alloc
2238 * Function : schFillPagePdschCfg
2240 * Functionality: Fill PDSCH info in Page Alloc
2242 * @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
2243 * uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
2245 * @return pointer to return Value(ROK, RFAILED)
2247 * ****************************************************************/
2248 uint8_t schFillPagePdschCfg(SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
2250 uint8_t cwCount = 0;
2251 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
2253 /* fill the PDSCH PDU */
2255 pagePdschCfg->pduBitmap = 0; /* PTRS and CBG params are excluded */
2256 pagePdschCfg->rnti = P_RNTI; /* SI-RNTI */
2257 pagePdschCfg->pduIndex = 0;
2258 pagePdschCfg->numCodewords = 1;
2259 for(cwCount = 0; cwCount < pagePdschCfg->numCodewords; cwCount++)
2261 pagePdschCfg->codeword[cwCount].targetCodeRate = 308;
2262 pagePdschCfg->codeword[cwCount].qamModOrder = 2;
2263 pagePdschCfg->codeword[cwCount].mcsIndex = mcs;
2264 pagePdschCfg->codeword[cwCount].mcsTable = 0; /* notqam256 */
2265 pagePdschCfg->codeword[cwCount].rvIndex = 0;
2266 tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
2267 pagePdschCfg->codeword[cwCount].tbSize = tbSize;
2269 pagePdschCfg->dataScramblingId = cell->cellCfg.phyCellId;
2270 pagePdschCfg->numLayers = 1;
2271 pagePdschCfg->transmissionScheme = 0;
2272 pagePdschCfg->refPoint = 0;
2273 pagePdschCfg->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
2274 pagePdschCfg->dmrs.dmrsConfigType = 0; /* type-1 */
2275 pagePdschCfg->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
2276 pagePdschCfg->dmrs.scid = 0;
2277 pagePdschCfg->dmrs.numDmrsCdmGrpsNoData = 1;
2278 pagePdschCfg->dmrs.dmrsPorts = 0x0001;
2279 pagePdschCfg->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
2280 pagePdschCfg->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
2281 pagePdschCfg->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
2283 pagePdschCfg->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
2284 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
2285 pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb = startPrb;
2286 pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
2287 pagePdschCfg->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
2288 pagePdschCfg->pdschTimeAlloc.rowIndex = 1;
2289 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
2290 pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
2291 pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
2293 /* Find total symbols occupied including DMRS */
2294 dmrsStartSymbol = findDmrsStartSymbol(pagePdschCfg->dmrs.dlDmrsSymbPos);
2295 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
2296 * in that case only PDSCH symbols are marked as occupied */
2297 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
2299 startSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.startSymb;
2300 numSymbol = pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2302 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
2305 startSymbol = dmrsStartSymbol;
2306 numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.timeAlloc.numSymb;
2309 /* Allocate the number of PRBs required for DL PDSCH */
2310 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
2311 &pagePdschCfg->pdschFreqAlloc.freqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
2313 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
2317 pagePdschCfg->beamPdschInfo.numPrgs = 1;
2318 pagePdschCfg->beamPdschInfo.prgSize = 1;
2319 pagePdschCfg->beamPdschInfo.digBfInterfaces = 0;
2320 pagePdschCfg->beamPdschInfo.prg[0].pmIdx = 0;
2321 pagePdschCfg->beamPdschInfo.prg[0].beamIdx[0] = 0;
2322 pagePdschCfg->txPdschPower.powerControlOffset = 0;
2323 pagePdschCfg->txPdschPower.powerControlOffsetSS = 0;
2328 /**********************************************************************
2330 **********************************************************************/