1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
47 * @brief common resource allocation for SSB
51 * Function : schBroadcastSsbAlloc
53 * This function handles common scheduling for SSB
55 * @param[in] SchCellCb *cell, cell cb
56 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
59 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
62 uint8_t ssbStartSymb, idx;
64 SchDlSlotInfo *schDlSlotInfo;
69 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
73 if(dlBrdcstAlloc == NULL)
75 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
79 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
80 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
81 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
83 /* Assign interface structure */
84 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
87 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
88 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
89 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
90 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
91 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
92 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
95 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
97 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
102 schDlSlotInfo->ssbPres = true;
103 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
108 * @brief common resource allocation for SIB1
112 * Function : schBroadcastSib1Alloc
114 * This function handles common scheduling for SIB1
116 * @param[in] SchCellCb *cell, cell cb
117 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
120 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
122 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
124 PdschFreqAlloc freqAlloc;
125 PdschTimeAlloc timeAlloc;
126 SchDlSlotInfo *schDlSlotInfo = NULLP;
130 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
134 if(dlBrdcstAlloc == NULL)
136 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
140 dlBrdcstAlloc->crnti = SI_RNTI;
141 dmrs = cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->dmrs;
142 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschFreqAlloc;
143 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdcchCfg.dci.pdschCfg->pdschTimeAlloc;
144 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
146 /* Find total symbols used including DMRS */
147 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
148 * in that case only PDSCH symbols are marked as occupied */
149 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
150 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
152 startSymbol = timeAlloc.startSymb;
153 numSymbol = timeAlloc.numSymb;
155 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
158 startSymbol = dmrsStartSymbol;
159 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
163 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
165 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
169 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
170 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
171 schDlSlotInfo->sib1Pres = true;
175 /*******************************************************************
177 * @brief Handles sending UL scheduler info to MAC
181 * Function : sendUlSchInfoToMac
184 * Sends UL Sch info to MAC from SCH
187 * @return ROK - success
190 * ****************************************************************/
191 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
195 memset(&pst, 0, sizeof(Pst));
196 FILL_PST_SCH_TO_MAC(pst, inst);
197 pst.event = EVENT_UL_SCH_INFO;
199 return(MacMessageRouter(&pst, (void *)ulSchedInfo));
203 * @brief Function to fill Pucch Format 0
207 * Function : fillPucchFormat0
209 * Function to fill Pucch format 0
211 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
215 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
217 if(resrcInfo->SchPucchFormat.format0)
219 ulSchedPucch->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
220 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
221 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
222 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
223 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
228 * @brief Function to fill Pucch Format 1
232 * Function : fillPucchFormat1
234 * Function to fill Pucch format 1
236 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
240 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
242 if(resrcInfo->SchPucchFormat.format1)
244 ulSchedPucch->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
245 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
246 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
247 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
248 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
249 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
254 * @brief Function to fill Pucch format for UL Sched Info
258 * Function : fillUlSchedPucchFormat
260 * Function to fill Pucch format for UL Sched Info
262 * @param[in] pucchFormat , SchPucchInfo pointer,
263 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
267 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
268 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
277 fillPucchFormat0(ulSchedPucch, resrcInfo);
284 fillPucchFormat1(ulSchedPucch, resrcInfo);
288 ulSchedPucch->addDmrs = formatCfg->addDmrs;
289 ulSchedPucch->pi2BPSK = formatCfg->pi2BPSK;
292 }/* To Add support for more Pucch Format */
295 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
303 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
307 * Function : fillUlSchedPucchDedicatedCfg
309 * Function to fill Pucch Dedicated Cfg for UL Sched Info
311 * @param[in] pucchFormat to be filled
312 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
316 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
317 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
319 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
320 uint16_t srOffset = 0;
321 uint16_t numSlots = cell->numSlots;
322 bool isAllocated = false;
323 uint16_t pucchStartPrb;
325 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
327 //Assuming one entry in the list
328 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
330 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
332 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
333 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
335 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
336 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
337 ulSchedPucch->fdAlloc.resAlloc.type1.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
338 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
339 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
340 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
344 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
345 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
358 if(pucchDedCfg->format1)
360 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
370 /* setting SR and UCI flag */
371 if(pucchDedCfg->schedReq)
373 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
375 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
376 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
379 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
381 ulSchedPucch->srFlag = true;
388 * @brief Function to fill Pucch Resource Info
392 * Function : fillPucchResourceInfo
394 * Function to fill Pucch Resource Info
396 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
397 * @return ROK/RFAILED
400 uint16_t fillPucchResourceInfo(uint8_t ueId, SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
402 uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
403 SchCellCb *cell = schCb[inst].cells[inst];
404 SchPucchCfgCmn *pucchCfg = NULLP;
405 SchBwpParams *ulBwp = NULLP;
407 SchUeCb *ueCb = NULLP;
413 ueCb = &(cell->ueCb[ueIdx]);
414 if(ueCb->ueDrxInfoPres)
416 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
420 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfgPres)
422 /* fill pucch dedicated cfg */
423 ret = fillUlSchedPucchDedicatedCfg(cell,\
424 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
427 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
428 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
434 /* fill pucch common cfg */
435 /* derive pucchResourceSet from schCellCfg */
436 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
437 pucchIdx = pucchCfg->pucchResourceCommon;
438 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
439 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
440 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
441 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
444 schPucchInfo->fdAlloc.resAlloc.type1.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
445 schPucchInfo->fdAlloc.resAlloc.type1.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
446 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
447 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
448 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
450 /* set SR and UCI flag to false */
451 schPucchInfo->srFlag = true;
458 * @brief resource allocation for UL
462 * Function : schUlResAlloc
464 * This function handles UL Resource allocation
466 * @param[in] SchCellCb *cell, cellCb
469 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
475 UlSchedInfo ulSchedInfo;
476 SchUlSlotInfo *schUlSlotInfo = NULLP;
477 SlotTimingInfo ulTimingInfo;
478 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
481 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA, cell->numSlots);
483 ulSchedInfo.cellId = cell->cellId;
484 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
485 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
486 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
488 /* Schedule resources for PRACH */
489 if(cell->firstSib1Transmitted)
490 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
492 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
493 if(schUlSlotInfo->schPuschInfo)
495 GET_CRNTI(ulSchedInfo.crnti, schUlSlotInfo->puschUe);
496 /* Check the ue drx status if the UE is active for uplink scheduling or not */
498 ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
499 if(ueCb->ueDrxInfoPres)
501 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
505 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
506 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
507 sizeof(SchPuschInfo));
508 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
509 schUlSlotInfo->schPuschInfo = NULL;
512 if(schUlSlotInfo->pucchPres)
514 GET_CRNTI(ulSchedInfo.crnti, schUlSlotInfo->pucchUe);
515 ret = fillPucchResourceInfo(schUlSlotInfo->pucchUe, &schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
518 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
519 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
520 sizeof(SchPucchInfo));
526 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
530 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
533 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
536 schInitUlSlot(schUlSlotInfo);
540 /*******************************************************************
542 * @brief Fills pdcch and pdsch info for msg4
546 * Function : schDlRsrcAllocMsg4
549 * Fills pdcch and pdsch info for msg4
551 * @params[in] SchCellCb *cell, SlotTimingInfo msg4Time
552 * @params[in] uint8_t ueId, DlMsgAlloc *dlMsgAlloc
553 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
554 * @params[in] bool isRetx, SchDlHqProcCb *hqP
555 * @return ROK - success
558 * ****************************************************************/
559 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
560 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
562 uint8_t coreset0Idx = 0;
563 uint8_t firstSymbol = 0;
564 uint8_t numSymbols = 0;
565 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
566 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
569 SchBwpDlCfg *initialBwp = NULLP;
570 PdcchCfg *pdcch = NULLP;
571 PdschCfg *pdsch = NULLP;
573 DlMsgSchInfo *msg4Alloc = NULLP;
577 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
581 if(dlMsgAlloc == NULL)
583 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
587 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
588 initialBwp = &cell->cellCfg.schInitialDlBwp;
589 pdcch = &msg4Alloc->dlMsgPdcchCfg;
590 pdsch = &msg4Alloc->dlMsgPdschCfg;
591 bwp = &msg4Alloc->bwp;
592 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
594 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti, isRetx, hqP);
595 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
597 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
598 numRbs = coresetIdxTable[coreset0Idx][1];
599 numSymbols = coresetIdxTable[coreset0Idx][2];
601 /* calculate time domain parameters */
602 uint16_t mask = 0x2000;
603 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
605 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
612 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
613 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
614 bwp->subcarrierSpacing = initialBwp->bwp.scs;
615 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
617 /* fill the PDCCH PDU */
618 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
619 pdcch->coresetCfg.durationSymbols = numSymbols;
620 memcpy(pdcch->coresetCfg.freqDomainResource, \
621 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
623 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
624 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
625 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
626 pdcch->coresetCfg.coreSetType = 0;
627 pdcch->coresetCfg.coreSetSize = numRbs;
628 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
629 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
631 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
632 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
633 pdcch->dci.scramblingRnti = 0;
634 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
635 pdcch->dci.aggregLevel = 4;
636 pdcch->dci.beamPdcchInfo.numPrgs = 1;
637 pdcch->dci.beamPdcchInfo.prgSize = 1;
638 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
639 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
640 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
641 pdcch->dci.txPdcchPower.beta_pdcch_1_0 = 0;
642 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
643 pdcch->dci.pdschCfg = pdsch;
645 /* fill the PDSCH PDU */
647 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
648 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
650 pdsch->numCodewords = 1;
651 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
653 pdsch->codeword[cwCount].targetCodeRate = 308;
654 pdsch->codeword[cwCount].qamModOrder = 2;
655 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
656 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
659 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
660 hqP->tbInfo[cwCount].tbSzReq = tbSize;
661 pdsch->codeword[cwCount].rvIndex = 0;
665 pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03;
666 tbSize = hqP->tbInfo[cwCount].tbSzReq;
668 pdsch->codeword[cwCount].tbSize = tbSize;
670 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
671 pdsch->numLayers = 1;
672 pdsch->transmissionScheme = 0;
674 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
675 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
676 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
677 pdsch->dmrs.scid = 0;
678 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
679 pdsch->dmrs.dmrsPorts = 0;
680 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
681 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
682 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
684 pdsch->pdschTimeAlloc.startSymb = pdschStartSymbol;
685 pdsch->pdschTimeAlloc.numSymb = pdschNumSymbols;
687 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
688 pdsch->pdschFreqAlloc.startPrb = MAX_NUM_RB;
689 pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
690 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
692 /* Find total symbols occupied including DMRS */
693 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
694 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
695 * in that case only PDSCH symbols are marked as occupied */
696 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
698 startSymbol = pdsch->pdschTimeAlloc.startSymb;
699 numSymbol = pdsch->pdschTimeAlloc.numSymb;
701 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
704 startSymbol = dmrsStartSymbol;
705 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb;
708 /* Allocate the number of PRBs required for RAR PDSCH */
709 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
710 &pdsch->pdschFreqAlloc.startPrb, pdsch->pdschFreqAlloc.numPrb)) != ROK)
712 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
716 pdsch->beamPdschInfo.numPrgs = 1;
717 pdsch->beamPdschInfo.prgSize = 1;
718 pdsch->beamPdschInfo.digBfInterfaces = 0;
719 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
720 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
721 pdsch->txPdschPower.powerControlOffset = 0;
722 pdsch->txPdschPower.powerControlOffsetSS = 0;
724 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
728 /*******************************************************************
730 * @brief Scheduling for Pucch Resource
734 * Function : schAllocPucchResource
737 * Scheduling for Pucch Resource
739 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
740 * @params[in] SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP
741 * @return ROK - success
744 *******************************************************************/
746 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,
747 SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP)
749 uint16_t pucchSlot = 0;
750 SchUlSlotInfo *schUlSlotInfo = NULLP;
752 pucchSlot = pucchTime.slot;
753 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
754 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
756 schUlSlotInfo->pucchPres = true;
759 /* set HARQ flag to true */
760 schUlSlotInfo->schPucchInfo.harqInfo.harqBitLength = 1; /* 1 bit for HARQ */
761 ADD_DELTA_TO_TIME(pucchTime, pucchTime, 3, cell->numSlots); /* SLOT_DELAY=3 */
762 cmLListAdd2Tail(&(ueCb->hqDlmap[pucchTime.slot]->hqList), &hqP->ulSlotLnk);
767 /*******************************************************************
769 * @brief Fills pdcch and pdsch info for dedicated DL msg
773 * Function : schDlRsrcAllocDlMsg
776 * Fills pdcch and pdsch info for dl msg
778 * @params[in] SchCellCb *cell, SlotTimingInfo slotTime
779 * @params[in] uint16_t crnti, uint32_t tbSize
780 * @params[in] DlMsgAlloc *dlMsgAlloc, uint16_t startPRB
781 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
782 * @params[in] bool isRetx, SchDlHqProcCb *hqP
783 * @return ROK - success
786 * ****************************************************************/
787 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
788 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol,
789 uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
792 PdcchCfg *pdcch = NULLP;
793 PdschCfg *pdsch = NULLP;
796 SchControlRsrcSet coreset1;
797 SchPdschConfig pdschCfg;
798 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
800 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
801 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
802 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
804 GET_UE_ID(crnti, ueId);
805 ueCb = cell->ueCb[ueId-1];
806 coreset1 = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
807 pdschCfg = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg;
810 bwp->freqAlloc.numPrb = MAX_NUM_RB;
811 bwp->freqAlloc.startPrb = 0;
812 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
813 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
815 /* fill the PDCCH PDU */
816 //Considering coreset1 also starts from same symbol as coreset0
817 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
818 pdcch->coresetCfg.durationSymbols = coreset1.duration;
819 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
820 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
821 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
822 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
823 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
824 //Considering number of RBs in coreset1 is same as coreset0
825 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
826 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
827 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
829 pdcch->dci.rnti = ueCb.crnti;
830 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
831 pdcch->dci.scramblingRnti = 0;
832 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
833 pdcch->dci.aggregLevel = 4;
834 pdcch->dci.beamPdcchInfo.numPrgs = 1;
835 pdcch->dci.beamPdcchInfo.prgSize = 1;
836 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
837 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
838 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
839 pdcch->dci.txPdcchPower.beta_pdcch_1_0 = 0;
840 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
842 /* fill the PDSCH PDU */
844 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
845 pdsch->rnti = ueCb.crnti;
847 pdsch->numCodewords = 1;
848 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
850 pdsch->codeword[cwCount].targetCodeRate = 308;
851 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
852 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
853 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
854 pdsch->codeword[cwCount].rvIndex = 0;
858 tbSize +=TX_PAYLOAD_HDR_LEN;
859 hqP->tbInfo[cwCount].tbSzReq = tbSize;
861 pdsch->codeword[cwCount].tbSize = tbSize;
863 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
864 pdsch->numLayers = 1;
865 pdsch->transmissionScheme = 0;
867 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
868 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
869 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
870 pdsch->dmrs.scid = 0;
871 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
872 pdsch->dmrs.dmrsPorts = 0;
873 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
874 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
875 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
877 pdsch->pdschTimeAlloc.startSymb = pdschStartSymbol;
878 pdsch->pdschTimeAlloc.numSymb = pdschNumSymbols;
880 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
881 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
882 pdsch->pdschFreqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
883 pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
885 /* Find total symbols occupied including DMRS */
886 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
887 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
888 * in that case only PDSCH symbols are marked as occupied */
889 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
891 startSymbol = pdsch->pdschTimeAlloc.startSymb;
892 numSymbol = pdsch->pdschTimeAlloc.numSymb;
894 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
897 startSymbol = dmrsStartSymbol;
898 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb;
901 /* Allocate the number of PRBs required for DL PDSCH */
902 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
903 &pdsch->pdschFreqAlloc.startPrb, pdsch->pdschFreqAlloc.numPrb)) != ROK)
905 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
909 pdsch->beamPdschInfo.numPrgs = 1;
910 pdsch->beamPdschInfo.prgSize = 1;
911 pdsch->beamPdschInfo.digBfInterfaces = 0;
912 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
913 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
914 pdsch->txPdschPower.powerControlOffset = 0;
915 pdsch->txPdschPower.powerControlOffsetSS = 0;
917 pdcch->dci.pdschCfg = pdsch;
921 /*******************************************************************
923 * @brief Fills k0 and k1 information table for FDD
927 * Function : BuildK0K1TableForFdd
930 * Fills k0 and k1 information table for FDD
932 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
933 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
934 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
935 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
936 * @return ROK - success
939 * ****************************************************************/
940 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
941 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
944 uint8_t k1TmpVal =0, cfgIdx=0;
945 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
947 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
948 * required but this will require for harq processing */
949 // uint8_t k0TmpVal = 0;
950 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
951 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
953 /* Initialization the structure and storing the total slot values. */
954 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
955 k0K1InfoTbl->tblSize = cell->numSlots;
957 /* Storing time domain resource allocation list based on common or dedicated configuration. */
958 if(pdschCfgCmnPres == true)
960 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
961 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
963 /*TODO uncomment this line during harq processing */
964 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
969 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
970 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
972 /*TODO uncomment this line during harq processing */
973 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
977 /* Checking all the slots for K0 and K1 values. */
978 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
981 /* Storing the values of k0 based on time domain resource
982 * allocation list. If the value is unavailable then fill default values,
983 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
984 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
986 /* TODO These if 0 we will remove during harq processing */
988 if(pdschCfgCmnPres == true)
990 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
994 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
996 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1000 k0TmpVal = DEFAULT_K0_VALUE;
1004 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
1005 * then skip else continue storing the values. */
1007 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1009 k1TmpVal = UlAckTbl[k1Index];
1010 if(k1TmpVal <= MIN_NUM_K1_IDX)
1015 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1016 /* TODO Store K1 index where harq feedback will be received in harq table. */
1020 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1021 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1027 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1032 /*******************************************************************
1034 * @brief Fills k0 and k1 information table
1038 * Function : BuildK0K1Table
1041 * Fills K0 and k1 information table
1043 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1044 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1045 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1046 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1047 * @return ROK - success
1050 * ****************************************************************/
1051 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1052 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1057 bool ulSlotPresent = false;
1058 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1059 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1060 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1061 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1064 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1066 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1072 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1073 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1074 k0K1InfoTbl->tblSize = cell->numSlots;
1075 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1077 /* Storing time domain resource allocation list based on common or
1078 * dedicated configuration availability. */
1079 if(pdschCfgCmnPres == true)
1081 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1082 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1084 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1089 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1090 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1092 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1096 /* Checking all possible indexes for K0 and K1 values. */
1097 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1099 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1100 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1101 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1106 /* Storing K0 , start symbol and length symbol for further processing.
1107 * If K0 value is not available then we can fill the default values
1108 * given in spec 38.331. */
1110 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1112 if(pdschCfgCmnPres == true)
1114 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1115 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1116 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1120 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1122 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1126 k0TmpVal = DEFAULT_K0_VALUE;
1128 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1129 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1132 /* If current slot + k0 is UL then skip the slot
1133 * else if it is DL slot then continue the next steps
1134 * else if it is a FLEXI slot then check symbols of slot, It should not
1135 * contain any UL slot. */
1136 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1137 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1138 if(slotCfg == UL_SLOT)
1142 if(slotCfg == FLEXI_SLOT)
1144 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1146 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1147 if(slotCfg == UL_SLOT)
1154 /* If current slot + k0 + k1 is a DL slot then skip the slot
1155 * else if it is UL slot then store the information
1156 * else if it is FLEXI slot then check the symbols, it must have
1157 * at least one UL symbol. */
1159 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1161 k1TmpVal = UlAckTbl[k1Index];
1162 if(k1TmpVal > MIN_NUM_K1_IDX)
1164 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1165 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1166 if(slotCfg == DL_SLOT)
1170 if(slotCfg == FLEXI_SLOT)
1172 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1174 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1176 ulSlotPresent = true;
1181 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1183 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1184 /* TODO Store K1 index where harq feedback will be received
1190 /* Store all the values if all condition satisfies. */
1193 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1194 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1200 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1207 /*******************************************************************
1209 * @brief Fills K2 information table for FDD
1213 * Function : BuildK2InfoTableForFdd
1216 * Fills K2 information table for FDD
1218 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1219 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1220 * @return ROK - success
1223 * ****************************************************************/
1224 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1225 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1227 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1229 /* Initialization the structure and storing the total slot values. */
1230 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1231 k2InfoTbl->tblSize = cell->numSlots;
1233 msg3K2InfoTbl->tblSize = cell->numSlots;
1235 /* Checking all possible indexes for K2. */
1236 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1238 /* Storing K2 values. */
1239 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1241 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1242 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1243 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1245 /* Updating K2 values for MSG3 */
1248 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1249 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1250 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1256 /*******************************************************************
1258 * @brief Fills K2 information table
1262 * Function : BuildK2InfoTable
1265 * Fills K2 information table
1267 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1268 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1269 * @return ROK - success
1272 * ****************************************************************/
1273 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1274 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1278 bool dlSymbolPresent = false;
1279 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1280 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1281 SlotConfig currentSlot;
1284 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1286 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1292 /* Initialization the structure and storing the total slot values. */
1293 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1294 k2InfoTbl->tblSize = cell->numSlots;
1296 msg3K2InfoTbl->tblSize = cell->numSlots;
1297 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1299 /* Checking all possible indexes for K2. */
1300 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1302 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1304 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1305 if(currentSlot != UL_SLOT)
1307 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1309 /* Storing k2, startSymbol, endSymbol information for further processing.
1310 * If k2 is absent then fill the default values given in spec 38.331
1311 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1312 k2Val = timeDomRsrcAllocList[k2Index].k2;
1315 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1318 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1321 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1324 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1327 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1332 /* Current slot + k2 should be either UL or FLEXI slot.
1333 * If slot is FLEXI then check all the symbols of that slot,
1334 * it should not contain any DL or FLEXI slot */
1335 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1336 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1337 if(slotCfg != DL_SLOT)
1339 if(slotCfg == FLEXI_SLOT)
1341 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1342 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1343 dlSymbolPresent = false;
1344 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1346 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1347 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1349 dlSymbolPresent = true;
1354 /* Store all the values if all condition satisfies. */
1355 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1357 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1358 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1359 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1365 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1367 /* Check for K2 for MSG3 */
1368 /* Current slot + k2 should be either UL or FLEXI slot.
1369 * If slot is FLEXI then check all the symbols of that slot,
1370 * it should not contain any DL or FLEXI slot */
1371 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1372 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1373 if(slotCfg != DL_SLOT)
1375 if(slotCfg == FLEXI_SLOT)
1377 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1378 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1379 dlSymbolPresent = false;
1380 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1382 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1383 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1385 dlSymbolPresent = true;
1390 /* Store all the values if all condition satisfies. */
1391 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1393 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1394 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1395 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1406 /*******************************************************************************************
1408 * @brief Allocate the PRB using RRM policy
1412 * Function : prbAllocUsingRRMPolicy
1415 * [Step1]: Traverse each Node in the LC list
1416 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1417 * [Step3]: Calcualte the maxPRB for this LC.
1418 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1420 * b. For Default, just SharedPRB count
1421 * [Step4]: If the LC is the First one to be allocated for this UE then add
1422 * TX_PAYLODN_LEN to reqBO
1423 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1424 * based on reqBO and maxPRB left.
1425 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1426 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1427 * [Step8]: Continue the next loop from List->head
1430 * [Exit1]: If all the LCs are allocated in list
1431 * [Exit2]: If PRBs are exhausted
1433 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1434 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1435 * I/P > mcsIdx and PDSCH symbols count
1436 * I/P & O/P > Shared PRB , reserved PRB Count
1437 * I/P & O/P > Total TBS size accumulated
1438 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1439 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1443 * *******************************************************************************************/
1444 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1445 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1447 CmLList *node = NULLP;
1448 LcInfo *lcNode = NULLP;
1449 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1453 DU_LOG("\nERROR --> SCH: LcList not present");
1458 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1459 * For Other LcList, remReservedPRB = 0*/
1460 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1462 remReservedPRB = *reservedPRB;
1469 /*For Debugging purpose*/
1472 lcNode = (LcInfo *)node->node;
1474 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1475 * process of LCID which was fully allocated. Check is just for safety purpose*/
1476 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1478 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1480 deleteNodeFromLList(lcLL, node);
1481 SCH_FREE(lcNode, sizeof(LcInfo));
1486 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1487 if(lcNode->allocBO != 0)
1489 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1493 /*[Exit2]: If PRBs are exhausted*/
1496 /*Loop Exit: All resources exhausted*/
1497 if(remReservedPRB == 0 && *sharedPRB == 0)
1499 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1505 /*Loop Exit: All resources exhausted*/
1508 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1514 maxPRB = remReservedPRB + *sharedPRB;
1517 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1519 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1521 *isTxPayloadLenAdded = TRUE;
1522 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1523 mcsIdx, numSymbols, maxPRB, &estPrb);
1524 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1526 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1528 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1531 lcNode->reqBO += UL_GRANT_SIZE;
1532 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1537 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1538 mcsIdx, numSymbols, maxPRB, &estPrb);
1541 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1542 * estimated PRB allocated*/
1543 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1545 remReservedPRB = remReservedPRB - estPrb;
1547 else /*LC requirement need PRB share from SharedPRB*/
1549 if(*sharedPRB <= (estPrb - remReservedPRB))
1551 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1556 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1562 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1563 lcNode->allocPRB = estPrb;
1564 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1566 /*[Step8]:Next loop: First LC to be picked from the list
1567 * because Allocated Nodes are moved to the last*/
1574 /*******************************************************************************************
1576 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1581 * Function : updateGrantSizeForBoRpt
1584 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1585 * BO Report in dlMsgAlloc Pointer
1587 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1588 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1589 * I/P & O/P > BsrInfo (applicable for UL)
1590 * I/P & O/P > accumalatedBOSize
1593 * *******************************************************************************************/
1594 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1595 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1597 CmLList *node = NULLP, *next = NULLP;
1598 LcInfo *lcNode = NULLP;
1599 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1603 DU_LOG("\nERROR --> SCH: LcList not present");
1621 lcNode = (LcInfo *)node->node;
1624 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1625 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1626 if(dlMsgAlloc != NULLP)
1628 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1630 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1631 * report for allocation can be sent to MAC*/
1632 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1633 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1635 /*Calculate the Total Payload/BO size allocated*/
1636 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1638 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1639 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1641 dlMsgSchInfo->numLc++;
1642 /* The LC has been fully allocated, clean it */
1643 if(lcNode->reqBO == 0)
1645 handleLcLList(lcLL, lcNode->lcId, DELETE);
1648 else if(bsrInfo != NULLP)
1650 *accumalatedBOSize += lcNode->allocBO;
1651 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1652 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1660 /*******************************************************************
1662 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1666 * Function : fillDlMsgInfo
1669 * fill DL message information for MSG4 and Dedicated DL Msg
1671 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1672 * @params[in] bool isRetx, SchDlHqProcCb *hqP
1675 *******************************************************************/
1676 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti, bool isRetx, SchDlHqProcCb *hqP)
1678 hqP->tbInfo[0].isEnabled = TRUE;
1679 hqP->tbInfo[0].state = HQ_TB_WAITING;
1680 hqP->tbInfo[0].txCntr++;
1681 hqP->tbInfo[1].isEnabled = TRUE;
1682 hqP->tbInfo[1].state = HQ_TB_WAITING;
1683 hqP->tbInfo[1].txCntr++;
1684 dlMsgInfo->crnti = crnti;
1685 dlMsgInfo->ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
1686 dlMsgInfo->harqProcNum = hqP->procId;
1687 dlMsgInfo->dlAssignIdx = 0;
1688 dlMsgInfo->pucchTpc = 0;
1689 dlMsgInfo->pucchResInd = 0;
1690 dlMsgInfo->harqFeedbackInd = hqP->k1;
1691 dlMsgInfo->dciFormatId = 1;
1694 /*******************************************************************
1696 * @brief sch Process pending Msg4 Req
1700 * Function : schProcessMsg4Req
1703 * sch Process pending Msg4 Req
1705 * @params[in] SchCellCb *cell, cell cb struct pointer
1706 * @params[in] SlotTimingInfo currTime, current timing info
1707 * @params[in] uint8_t ueId, ue ID
1708 * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
1709 * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
1710 * @return ROK - success
1713 *******************************************************************/
1715 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
1717 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1718 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1719 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1720 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1724 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1728 if (isRetxMsg4 == FALSE)
1730 if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
1732 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : No process");
1737 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1738 &pucchTime, isRetxMsg4, *msg4HqProc) != true )
1740 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : k0 k1 not found");
1744 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1746 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1747 if(dciSlotAlloc == NULLP)
1749 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1752 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1753 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1754 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1757 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1759 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1760 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
1762 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1763 if(dciSlotAlloc->numSchedInfo == 0)
1765 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1766 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1769 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1773 /* Check if both DCI and RAR are sent in the same slot.
1774 * If not, allocate memory RAR PDSCH slot to store RAR info
1776 if(pdcchTime.slot == pdschTime.slot)
1778 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1779 dciSlotAlloc->numSchedInfo++;
1783 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1784 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1786 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1787 if(msg4SlotAlloc == NULLP)
1789 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1790 if(dciSlotAlloc->numSchedInfo == 0)
1792 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1793 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1796 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1799 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1800 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1801 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1804 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1806 /* Copy all RAR info */
1807 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1808 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1809 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1810 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1812 /* Assign correct PDU types in corresponding slots */
1813 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1814 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1815 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1817 dciSlotAlloc->numSchedInfo++;
1818 msg4SlotAlloc->numSchedInfo++;
1821 /* PUCCH resource */
1822 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti, &cell->ueCb[ueId-1], isRetxMsg4, *msg4HqProc);
1824 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1825 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1826 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1827 cell->raCb[ueId-1].msg4recvd = FALSE;
1830 cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
1835 /*******************************************************************
1837 * @brief sch Process pending Sr or Bsr Req
1841 * Function : updateBsrAndLcList
1844 * Updating the BSRInfo in UECB and Lclist
1846 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1847 * @return ROK - success
1850 *******************************************************************/
1851 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
1853 CmLList *node = NULLP, *next = NULLP;
1854 LcInfo *lcNode = NULLP;
1858 DU_LOG("\nERROR --> SCH: LcList not present");
1875 lcNode = (LcInfo *)node->node;
1878 /*Only when Status is OK then allocation is marked as ZERO and reqBO
1879 * is updated in UE's DB. If Failure, then allocation is added to reqBO
1880 * and same is updated in Ue's DB inside BSR Info structure*/
1883 lcNode->allocBO = 0;
1886 lcNode->reqBO += lcNode->allocBO;
1887 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
1888 if(lcNode->reqBO == 0)
1890 handleLcLList(lcLL, lcNode->lcId, DELETE);
1897 /*******************************************************************
1899 * @brief sch Process pending Sr or Bsr Req
1903 * Function : schProcessSrOrBsrReq
1906 * sch Process pending Sr or Bsr Req
1908 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1909 * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
1910 * @return true - success
1913 *******************************************************************/
1914 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
1916 bool k2Found = FALSE;
1917 uint8_t startSymb = 0, symbLen = 0;
1918 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
1920 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
1921 SlotTimingInfo dciTime, puschTime;
1925 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
1929 ueCb = &cell->ueCb[ueId-1];
1933 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
1937 if (isRetx == FALSE)
1939 if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
1945 /* Calculating time frame to send DCI for SR */
1946 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
1948 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1951 if(ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
1952 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2InfoTbl;
1954 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
1956 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
1958 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
1960 if(!ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.k2TblPrsnt)
1962 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
1963 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
1964 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
1968 k2Val = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
1969 startSymb = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
1970 symbLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
1972 /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
1973 /* Calculating time frame to send PUSCH for SR */
1974 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots);
1976 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1979 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
1986 ADD_DELTA_TO_TIME(puschTime, (*hqP)->puschTime, 0, cell->numSlots);
1994 if(cell->api->SchScheduleUlLc(dciTime, puschTime, startSymb, symbLen, isRetx, hqP) != ROK)
1999 DU_LOG("\nERROR --> SCH : schProcessSrOrBsrReq(): K2 value is not found");
2005 /********************************************************************************
2007 * @brief Increment the Slot by a input factor
2011 * Function : schIncrSlot
2014 * Increment the slot by a input factor till num of Slots configured in a
2015 * Radio Frame. If it exceeds, move to next sfn.
2017 * @params[in/out] SlotTimingInfo timingInfo
2018 * [in] uint8_t incr [Increment factor]
2019 * [in] numSlotsPerRF [Number of Slots configured per RF as per
2021 * @return ROK - success
2024 *******************************************************************/
2025 void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
2027 timingInfo->slot += incr;
2028 if(timingInfo->slot >= numSlotsPerRF)
2030 timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
2031 timingInfo->slot %= numSlotsPerRF;
2032 if(timingInfo->sfn > MAX_SFN)
2034 timingInfo->sfn %= MAX_SFN;
2039 /*******************************************************************
2041 * @brief Fill PDSCH info in Page Alloc
2045 * Function : schFillPagePdschCfg
2047 * Functionality: Fill PDSCH info in Page Alloc
2049 * @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
2050 * uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
2052 * @return pointer to return Value(ROK, RFAILED)
2054 * ****************************************************************/
2055 uint8_t schFillPagePdschCfg(SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
2057 uint8_t cwCount = 0;
2058 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
2060 /* fill the PDSCH PDU */
2062 pagePdschCfg->pduBitmap = 0; /* PTRS and CBG params are excluded */
2063 pagePdschCfg->rnti = P_RNTI; /* SI-RNTI */
2064 pagePdschCfg->pduIndex = 0;
2065 pagePdschCfg->numCodewords = 1;
2066 for(cwCount = 0; cwCount < pagePdschCfg->numCodewords; cwCount++)
2068 pagePdschCfg->codeword[cwCount].targetCodeRate = 308;
2069 pagePdschCfg->codeword[cwCount].qamModOrder = 2;
2070 pagePdschCfg->codeword[cwCount].mcsIndex = mcs;
2071 pagePdschCfg->codeword[cwCount].mcsTable = 0; /* notqam256 */
2072 pagePdschCfg->codeword[cwCount].rvIndex = 0;
2073 tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
2074 pagePdschCfg->codeword[cwCount].tbSize = tbSize;
2076 pagePdschCfg->dataScramblingId = cell->cellCfg.phyCellId;
2077 pagePdschCfg->numLayers = 1;
2078 pagePdschCfg->transmissionScheme = 0;
2079 pagePdschCfg->refPoint = 0;
2080 pagePdschCfg->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
2081 pagePdschCfg->dmrs.dmrsConfigType = 0; /* type-1 */
2082 pagePdschCfg->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
2083 pagePdschCfg->dmrs.scid = 0;
2084 pagePdschCfg->dmrs.numDmrsCdmGrpsNoData = 1;
2085 pagePdschCfg->dmrs.dmrsPorts = 0x0001;
2086 pagePdschCfg->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
2087 pagePdschCfg->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
2088 pagePdschCfg->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
2090 pagePdschCfg->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
2091 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
2092 pagePdschCfg->pdschFreqAlloc.startPrb = startPrb;
2093 pagePdschCfg->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
2094 pagePdschCfg->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
2095 pagePdschCfg->pdschTimeAlloc.rowIndex = 1;
2096 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
2097 pagePdschCfg->pdschTimeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
2098 pagePdschCfg->pdschTimeAlloc.numSymb = NUM_PDSCH_SYMBOL;
2100 /* Find total symbols occupied including DMRS */
2101 dmrsStartSymbol = findDmrsStartSymbol(pagePdschCfg->dmrs.dlDmrsSymbPos);
2102 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
2103 * in that case only PDSCH symbols are marked as occupied */
2104 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
2106 startSymbol = pagePdschCfg->pdschTimeAlloc.startSymb;
2107 numSymbol = pagePdschCfg->pdschTimeAlloc.numSymb;
2109 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
2112 startSymbol = dmrsStartSymbol;
2113 numSymbol = pagePdschCfg->dmrs.nrOfDmrsSymbols + pagePdschCfg->pdschTimeAlloc.numSymb;
2116 /* Allocate the number of PRBs required for DL PDSCH */
2117 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
2118 &pagePdschCfg->pdschFreqAlloc.startPrb, pagePdschCfg->pdschFreqAlloc.numPrb)) != ROK)
2120 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
2124 pagePdschCfg->beamPdschInfo.numPrgs = 1;
2125 pagePdschCfg->beamPdschInfo.prgSize = 1;
2126 pagePdschCfg->beamPdschInfo.digBfInterfaces = 0;
2127 pagePdschCfg->beamPdschInfo.prg[0].pmIdx = 0;
2128 pagePdschCfg->beamPdschInfo.prg[0].beamIdx[0] = 0;
2129 pagePdschCfg->txPdschPower.powerControlOffset = 0;
2130 pagePdschCfg->txPdschPower.powerControlOffsetSS = 0;
2136 * @brief Handles retransmission for MSG3
2140 * Function : schMsg3RetxSchedulingForUe
2142 * This function handles retransmission for MSG3
2144 * @param[in] SchRaCb *raCb, RA cb pointer
2149 uint8_t schMsg3RetxSchedulingForUe(SchRaCb *raCb)
2151 bool k2Found = false;
2152 uint16_t dciSlot = 0;
2153 SlotTimingInfo dciTime, msg3Time;
2154 SchCellCb *cell = NULLP;
2155 SlotTimingInfo currTime;
2156 DciInfo *dciInfo = NULLP;
2158 currTime = cell->slotInfo;
2160 /* Calculating time frame to send DCI for MSG3 Retx*/
2161 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
2163 /* Consider this slot for sending DCI, only if it is a DL slot */
2164 if(schGetSlotSymbFrmt(dciSlot, raCb->cell->slotFrmtBitMap) == DL_SLOT)
2167 /* If PDCCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
2168 if(cell->schDlSlotInfo[dciSlot]->pdcchUe != 0)
2171 k2Found = schGetMsg3K2(cell, &raCb->msg3HqProc, dciTime.slot, &msg3Time, TRUE);
2177 SCH_ALLOC(dciInfo, sizeof(DciInfo));
2180 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
2183 cell->schDlSlotInfo[msg3Time.slot]->ulGrant = dciInfo;
2184 SCH_ALLOC(cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo, sizeof(SchPuschInfo));
2185 memset(dciInfo,0,sizeof(DciInfo));
2186 schFillUlDciForMsg3Retx(raCb, cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo, dciInfo);
2188 raCb->retxMsg3HqProc = NULLP;
2193 * @brief Get K2 value for MSG3
2197 * Function : schGetMsg3K2
2199 * This function gets K2 for MSG3
2201 * @param[in] SchCellCb *cell, Cell cb struc pointer
2202 * @param[in] SchUlHqProcCb* msg3HqProc, msg3 harq proc pointer
2203 * @param[in] uint16_t dlTime, DL time of scheduling
2204 * @param[in] SlotTimingInfo *msg3Time, MSG3 timing info
2205 * @param[in] bool isRetx, indicates MSG3 retransmission
2210 bool schGetMsg3K2(SchCellCb *cell, SchUlHqProcCb* msg3HqProc, uint16_t dlTime, SlotTimingInfo *msg3Time, bool isRetx)
2212 bool k2Found = false;
2213 uint8_t k2TblIdx = 0;
2214 uint8_t k2Index = 0;
2217 uint8_t puschMu = 0;
2218 uint8_t msg3Delta = 0, msg3MinSchTime = 0;
2220 uint8_t totalCfgSlot = 0;
2222 SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
2223 SlotTimingInfo currTime, msg3TempTime;
2224 currTime = cell->slotInfo;
2225 puschMu = cell->cellCfg.numerology;
2232 numK2 = cell->cellCfg.schInitialUlBwp.k2InfoTbl.k2TimingInfo[dlTime].numK2;
2233 msg3K2InfoTbl = &cell->cellCfg.schInitialUlBwp.msg3K2InfoTbl;
2239 numK2 = cell->cellCfg.schInitialUlBwp.msg3K2InfoTbl.k2TimingInfo[dlTime].numK2;
2240 msg3K2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
2241 msg3MinSchTime = minMsg3SchTime[cell->cellCfg.numerology];
2242 msg3Delta = puschDeltaTable[puschMu];
2245 for(k2TblIdx = 0; k2TblIdx < numK2; k2TblIdx++)
2247 k2Index = msg3K2InfoTbl->k2TimingInfo[dlTime].k2Indexes[k2TblIdx];
2249 k2 = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
2252 if ((msg3HqProc->strtSymbl != cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol) ||
2253 (msg3HqProc->numSymbl != cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength))
2258 /* Delta is added to the slot allocation for msg3 based on 38.214 section 6.1.2.1 */
2259 k2 = k2 + msg3Delta;
2260 if(k2 >= msg3MinSchTime)
2262 ADD_DELTA_TO_TIME(currTime, msg3TempTime, k2, cell->numSlots);
2264 if(schGetSlotSymbFrmt(msg3TempTime.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
2267 /* If PUSCH is already scheduled on this slot, another PUSCH
2268 * pdu cannot be scheduled here */
2269 if(cell->schUlSlotInfo[msg3TempTime.slot]->puschUe != 0)
2275 if (k2Found == true)
2277 msg3Time->slot = msg3TempTime.slot;
2278 msg3Time->sfn = msg3TempTime.sfn;
2279 msg3Time->slot = msg3TempTime.slot;
2284 /**********************************************************************
2286 **********************************************************************/