1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
44 #include "sch_utils.h"
46 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
54 * @brief common resource allocation for SSB
58 * Function : schBroadcastSsbAlloc
60 * This function handles common scheduling for SSB
62 * @param[in] SchCellCb *cell, cell cb
63 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
66 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
69 uint8_t ssbStartSymb, idx;
71 SchDlSlotInfo *schDlSlotInfo;
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
80 if(dlBrdcstAlloc == NULL)
82 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
86 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
87 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA; //+Kssb
88 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
90 /* Assign interface structure */
91 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
94 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
95 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
96 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
97 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
98 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
99 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
102 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
104 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
109 schDlSlotInfo->ssbPres = true;
110 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
115 * @brief common resource allocation for SIB1
119 * Function : schBroadcastSib1Alloc
121 * This function handles common scheduling for SIB1
123 * @param[in] SchCellCb *cell, cell cb
124 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
127 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
129 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
131 FreqDomainAlloc freqAlloc;
132 TimeDomainAlloc timeAlloc;
133 SchDlSlotInfo *schDlSlotInfo = NULLP;
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
141 if(dlBrdcstAlloc == NULL)
143 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
147 dmrs = cell->cellCfg.sib1SchCfg.sib1PdschCfg.dmrs;
148 freqAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschFreqAlloc.freqAlloc;
149 timeAlloc = cell->cellCfg.sib1SchCfg.sib1PdschCfg.pdschTimeAlloc.timeAlloc;
150 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
152 /* Find total symbols used including DMRS */
153 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
154 * in that case only PDSCH symbols are marked as occupied */
155 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
156 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
158 startSymbol = timeAlloc.startSymb;
159 numSymbol = timeAlloc.numSymb;
161 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
164 startSymbol = dmrsStartSymbol;
165 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
169 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
171 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
175 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
176 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
177 memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
178 dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg.dci.pdschCfg = &dlBrdcstAlloc->sib1Alloc.sib1PdschCfg;
179 schDlSlotInfo->sib1Pres = true;
183 /*******************************************************************
185 * @brief Handles sending UL scheduler info to MAC
189 * Function : sendUlSchInfoToMac
192 * Sends UL Sch info to MAC from SCH
195 * @return ROK - success
198 * ****************************************************************/
199 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
203 memset(&pst, 0, sizeof(Pst));
204 FILL_PST_SCH_TO_MAC(pst, inst);
205 pst.event = EVENT_UL_SCH_INFO;
207 return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
211 * @brief Function to fill Pucch Format 0
215 * Function : fillPucchFormat0
217 * Function to fill Pucch format 0
219 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
223 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
225 if(resrcInfo->SchPucchFormat.format0)
227 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
228 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
229 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
230 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
231 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
236 * @brief Function to fill Pucch Format 1
240 * Function : fillPucchFormat1
242 * Function to fill Pucch format 1
244 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
248 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
250 if(resrcInfo->SchPucchFormat.format1)
252 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
253 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
254 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
255 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
256 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
257 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
262 * @brief Function to fill Pucch format for UL Sched Info
266 * Function : fillUlSchedPucchFormat
268 * Function to fill Pucch format for UL Sched Info
270 * @param[in] pucchFormat , SchPucchInfo pointer,
271 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
275 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
276 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
285 fillPucchFormat0(ulSchedPucch, resrcInfo);
292 fillPucchFormat1(ulSchedPucch, resrcInfo);
296 memcpy(&ulSchedPucch->cmnFormatCfg, formatCfg, sizeof(SchPucchFormatCfg));
299 }/* To Add support for more Pucch Format */
302 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
310 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
314 * Function : fillUlSchedPucchDedicatedCfg
316 * Function to fill Pucch Dedicated Cfg for UL Sched Info
318 * @param[in] pucchFormat to be filled
319 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
323 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
324 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
326 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
327 uint16_t srOffset = 0;
328 uint16_t numSlots = cell->numSlots;
329 bool isAllocated = false;
330 uint16_t pucchStartPrb;
332 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
334 //Assuming one entry in the list
335 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
337 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
339 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
340 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
342 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
343 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
344 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
345 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
346 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
347 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
351 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
352 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
365 if(pucchDedCfg->format1)
367 memset(&ulSchedPucch->cmnFormatCfg, 0, sizeof(SchPucchFormatCfg));
368 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
378 /* setting SR and UCI flag */
379 if(pucchDedCfg->schedReq)
381 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
383 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
384 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
387 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
389 ulSchedPucch->srFlag = true;
390 ulSchedPucch->uciFlag = true;
397 * @brief Function to fill Pucch Resource Info
401 * Function : fillPucchResourceInfo
403 * Function to fill Pucch Resource Info
405 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
406 * @return ROK/RFAILED
409 uint16_t fillPucchResourceInfo(SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
411 uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
412 SchCellCb *cell = schCb[inst].cells[inst];
413 SchPucchCfgCmn *pucchCfg = NULLP;
414 SchBwpParams *ulBwp = NULLP;
417 GET_UE_IDX(schPucchInfo->rnti, ueIdx);
419 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfgPres)
421 /* fill pucch dedicated cfg */
422 ret = fillUlSchedPucchDedicatedCfg(cell,\
423 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellCfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
426 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
427 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
433 /* fill pucch common cfg */
434 /* derive pucchResourceSet from schCellCfg */
435 pucchCfg = &cell->cellCfg.schInitialUlBwp.pucchCommon;
436 pucchIdx = pucchCfg->pucchResourceCommon;
437 ulBwp = &cell->cellCfg.schInitialUlBwp.bwp;
438 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
439 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
440 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
443 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
444 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
445 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
446 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
447 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
449 /* set SR and UCI flag to false */
450 schPucchInfo->srFlag = true;
451 schPucchInfo->uciFlag = true;
454 /* set HARQ flag to true */
455 schPucchInfo->harqFlag = true;
456 schPucchInfo->numHarqBits = 1; /* 1 bit for HARQ */
462 * @brief resource allocation for UL
466 * Function : schUlResAlloc
468 * This function handles UL Resource allocation
470 * @param[in] SchCellCb *cell, cellCb
473 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
476 UlSchedInfo ulSchedInfo;
477 SchUlSlotInfo *schUlSlotInfo = NULLP;
478 SlotTimingInfo ulTimingInfo;
479 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
482 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA);
484 ulSchedInfo.cellId = cell->cellId;
485 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
486 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
487 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
489 /* Schedule resources for PRACH */
490 if(cell->firstSib1Transmitted)
491 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
493 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
494 if(schUlSlotInfo->schPuschInfo)
496 ulSchedInfo.crnti = schUlSlotInfo->schPuschInfo->crnti;
497 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
498 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
499 sizeof(SchPuschInfo));
500 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
501 schUlSlotInfo->schPuschInfo = NULL;
504 if(schUlSlotInfo->pucchPres)
506 ret = fillPucchResourceInfo(&schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
509 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
510 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
511 sizeof(SchPucchInfo));
513 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
517 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
520 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
523 schInitUlSlot(schUlSlotInfo);
527 /*******************************************************************
529 * @brief Fills pdcch and pdsch info for msg4
533 * Function : schDlRsrcAllocMsg4
536 * Fills pdcch and pdsch info for msg4
539 * @return ROK - success
542 * ****************************************************************/
543 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgAlloc *dlMsgAlloc,\
544 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols)
546 uint8_t coreset0Idx = 0;
547 uint8_t firstSymbol = 0;
548 uint8_t numSymbols = 0;
549 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
550 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
553 SchBwpDlCfg *initialBwp = NULLP;
554 PdcchCfg *pdcch = NULLP;
555 PdschCfg *pdsch = NULLP;
557 DlMsgSchInfo *msg4Alloc = NULLP;
561 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
565 if(dlMsgAlloc == NULL)
567 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
571 msg4Alloc = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
572 initialBwp = &cell->cellCfg.schInitialDlBwp;
573 pdcch = &msg4Alloc->dlMsgPdcchCfg;
574 pdsch = &msg4Alloc->dlMsgPdschCfg;
575 bwp = &msg4Alloc->bwp;
576 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
578 fillDlMsgInfo(&msg4Alloc->dlMsgInfo, cell->raCb[ueId-1].tcrnti);
579 msg4Alloc->dlMsgInfo.dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
581 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
582 numRbs = coresetIdxTable[coreset0Idx][1];
583 numSymbols = coresetIdxTable[coreset0Idx][2];
585 /* calculate time domain parameters */
586 uint16_t mask = 0x2000;
587 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
589 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
596 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
597 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
598 bwp->subcarrierSpacing = initialBwp->bwp.scs;
599 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
601 /* fill the PDCCH PDU */
602 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
603 pdcch->coresetCfg.durationSymbols = numSymbols;
604 memcpy(pdcch->coresetCfg.freqDomainResource, \
605 cell->cellCfg.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
607 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
608 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
609 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
610 pdcch->coresetCfg.coreSetType = 0;
611 pdcch->coresetCfg.coreSetSize = numRbs;
612 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
613 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
615 pdcch->dci.rnti = cell->raCb[ueId-1].tcrnti;
616 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
617 pdcch->dci.scramblingRnti = 0;
618 pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
619 pdcch->dci.aggregLevel = 4;
620 pdcch->dci.beamPdcchInfo.numPrgs = 1;
621 pdcch->dci.beamPdcchInfo.prgSize = 1;
622 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
623 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
624 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
625 pdcch->dci.txPdcchPower.powerValue = 0;
626 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
627 pdcch->dci.pdschCfg = pdsch;
629 /* fill the PDSCH PDU */
631 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
632 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
634 pdsch->numCodewords = 1;
635 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
637 pdsch->codeword[cwCount].targetCodeRate = 308;
638 pdsch->codeword[cwCount].qamModOrder = 2;
639 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
640 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
641 pdsch->codeword[cwCount].rvIndex = 0;
642 tbSize = schCalcTbSize(msg4Alloc->dlMsgInfo.dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
643 pdsch->codeword[cwCount].tbSize = tbSize;
645 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
646 pdsch->numLayers = 1;
647 pdsch->transmissionScheme = 0;
649 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
650 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
651 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
652 pdsch->dmrs.scid = 0;
653 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
654 pdsch->dmrs.dmrsPorts = 0;
655 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
656 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
657 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
659 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
660 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
662 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
663 pdsch->pdschFreqAlloc.freqAlloc.startPrb = MAX_NUM_RB;
664 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
665 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
667 /* Find total symbols occupied including DMRS */
668 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
669 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
670 * in that case only PDSCH symbols are marked as occupied */
671 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
673 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
674 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
676 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
679 startSymbol = dmrsStartSymbol;
680 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
683 /* Allocate the number of PRBs required for RAR PDSCH */
684 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
685 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
687 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
691 pdsch->beamPdschInfo.numPrgs = 1;
692 pdsch->beamPdschInfo.prgSize = 1;
693 pdsch->beamPdschInfo.digBfInterfaces = 0;
694 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
695 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
696 pdsch->txPdschPower.powerControlOffset = 0;
697 pdsch->txPdschPower.powerControlOffsetSS = 0;
699 msg4Alloc->dlMsgInfo.isMsg4Pdu = true;
703 /*******************************************************************
705 * @brief Scheduling for Pucch Resource
709 * Function : schAllocPucchResource
712 * Scheduling for Pucch Resource
714 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
715 * @return ROK - success
718 *******************************************************************/
720 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti)
722 uint16_t pucchSlot = 0;
723 SchUlSlotInfo *schUlSlotInfo = NULLP;
725 pucchSlot = pucchTime.slot;
726 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
727 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
729 schUlSlotInfo->pucchPres = true;
730 schUlSlotInfo->schPucchInfo.rnti = crnti;
735 /*******************************************************************
737 * @brief Fills pdcch and pdsch info for dedicated DL msg
741 * Function : schDlRsrcAllocDlMsg
744 * Fills pdcch and pdsch info for dl msg
747 * @return ROK - success
750 * ****************************************************************/
751 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
752 uint32_t tbSize, DlMsgAlloc *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol, uint8_t pdschNumSymbols)
755 PdcchCfg *pdcch = NULLP;
756 PdschCfg *pdsch = NULLP;
759 SchControlRsrcSet coreset1;
760 SchPdschConfig pdschCfg;
761 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
763 pdcch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdcchCfg;
764 pdsch = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].dlMsgPdschCfg;
765 bwp = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo].bwp;
767 GET_UE_IDX(crnti, ueIdx);
768 ueCb = cell->ueCb[ueIdx-1];
769 coreset1 = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdcchCfg.cRSetToAddModList[0];
770 pdschCfg = ueCb.ueCfg.spCellCfg.servCellCfg.initDlBwp.pdschCfg;
773 bwp->freqAlloc.numPrb = MAX_NUM_RB;
774 bwp->freqAlloc.startPrb = 0;
775 bwp->subcarrierSpacing = cell->cellCfg.sib1SchCfg.bwp.subcarrierSpacing;
776 bwp->cyclicPrefix = cell->cellCfg.sib1SchCfg.bwp.cyclicPrefix;
778 /* fill the PDCCH PDU */
779 //Considering coreset1 also starts from same symbol as coreset0
780 pdcch->coresetCfg.startSymbolIndex = coresetIdxTable[0][3];
781 pdcch->coresetCfg.durationSymbols = coreset1.duration;
782 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
783 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
784 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
785 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
786 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
787 //Considering number of RBs in coreset1 is same as coreset0
788 pdcch->coresetCfg.coreSetSize = coresetIdxTable[0][1];
789 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
790 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
792 pdcch->dci.rnti = ueCb.crnti;
793 pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
794 pdcch->dci.scramblingRnti = 0;
795 pdcch->dci.cceIndex = 0; /* 0-3 for UL and 4-7 for DL */
796 pdcch->dci.aggregLevel = 4;
797 pdcch->dci.beamPdcchInfo.numPrgs = 1;
798 pdcch->dci.beamPdcchInfo.prgSize = 1;
799 pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
800 pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
801 pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
802 pdcch->dci.txPdcchPower.powerValue = 0;
803 pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
805 /* fill the PDSCH PDU */
807 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
808 pdsch->rnti = ueCb.crnti;
810 pdsch->numCodewords = 1;
811 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
813 pdsch->codeword[cwCount].targetCodeRate = 308;
814 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
815 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
816 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
817 pdsch->codeword[cwCount].rvIndex = 0;
819 tbSize +=TX_PAYLOAD_HDR_LEN;
820 pdsch->codeword[cwCount].tbSize = tbSize;
822 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
823 pdsch->numLayers = 1;
824 pdsch->transmissionScheme = 0;
826 pdsch->dmrs.dlDmrsSymbPos = 4; /* Bitmap value 00000000000100 i.e. using 3rd symbol for PDSCH DMRS */
827 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
828 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
829 pdsch->dmrs.scid = 0;
830 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
831 pdsch->dmrs.dmrsPorts = 0;
832 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
833 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
834 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
836 pdsch->pdschTimeAlloc.timeAlloc.startSymb = pdschStartSymbol;
837 pdsch->pdschTimeAlloc.timeAlloc.numSymb = pdschNumSymbols;
839 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
840 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
841 pdsch->pdschFreqAlloc.freqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
842 pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
844 /* Find total symbols occupied including DMRS */
845 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
846 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
847 * in that case only PDSCH symbols are marked as occupied */
848 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
850 startSymbol = pdsch->pdschTimeAlloc.timeAlloc.startSymb;
851 numSymbol = pdsch->pdschTimeAlloc.timeAlloc.numSymb;
853 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
856 startSymbol = dmrsStartSymbol;
857 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.timeAlloc.numSymb;
860 /* Allocate the number of PRBs required for DL PDSCH */
861 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
862 &pdsch->pdschFreqAlloc.freqAlloc.startPrb, pdsch->pdschFreqAlloc.freqAlloc.numPrb)) != ROK)
864 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
868 pdsch->beamPdschInfo.numPrgs = 1;
869 pdsch->beamPdschInfo.prgSize = 1;
870 pdsch->beamPdschInfo.digBfInterfaces = 0;
871 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
872 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
873 pdsch->txPdschPower.powerControlOffset = 0;
874 pdsch->txPdschPower.powerControlOffsetSS = 0;
876 pdcch->dci.pdschCfg = pdsch;
880 /*******************************************************************
882 * @brief Fills k0 and k1 information table for FDD
886 * Function : BuildK0K1TableForFdd
889 * Fills k0 and k1 information table for FDD
891 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
892 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
893 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
894 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
895 * @return ROK - success
898 * ****************************************************************/
899 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
900 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
903 uint8_t k1TmpVal =0, cfgIdx=0;
904 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
906 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
907 * required but this will require for harq processing */
908 // uint8_t k0TmpVal = 0;
909 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
910 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
912 /* Initialization the structure and storing the total slot values. */
913 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
914 k0K1InfoTbl->tblSize = cell->numSlots;
916 /* Storing time domain resource allocation list based on common or dedicated configuration. */
917 if(pdschCfgCmnPres == true)
919 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
920 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
922 /*TODO uncomment this line during harq processing */
923 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
928 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
929 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
931 /*TODO uncomment this line during harq processing */
932 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
936 /* Checking all the slots for K0 and K1 values. */
937 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
940 /* Storing the values of k0 based on time domain resource
941 * allocation list. If the value is unavailable then fill default values,
942 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
943 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
945 /* TODO These if 0 we will remove during harq processing */
947 if(pdschCfgCmnPres == true)
949 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
953 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
955 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
959 k0TmpVal = DEFAULT_K0_VALUE;
963 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
964 * then skip else continue storing the values. */
966 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
968 k1TmpVal = UlAckTbl[k1Index];
969 if(k1TmpVal <= MIN_NUM_K1_IDX)
974 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
975 /* TODO Store K1 index where harq feedback will be received in harq table. */
979 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
980 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
986 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
991 /*******************************************************************
993 * @brief Fills k0 and k1 information table
997 * Function : BuildK0K1Table
1000 * Fills K0 and k1 information table
1002 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1003 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1004 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1005 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1006 * @return ROK - success
1009 * ****************************************************************/
1010 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1011 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1016 bool ulSlotPresent = false;
1017 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1018 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1019 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1020 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1023 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1025 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1031 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1032 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1033 k0K1InfoTbl->tblSize = cell->numSlots;
1034 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1036 /* Storing time domain resource allocation list based on common or
1037 * dedicated configuration availability. */
1038 if(pdschCfgCmnPres == true)
1040 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1041 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1043 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1048 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1049 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1051 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1055 /* Checking all possible indexes for K0 and K1 values. */
1056 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1058 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1059 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1060 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1065 /* Storing K0 , start symbol and length symbol for further processing.
1066 * If K0 value is not available then we can fill the default values
1067 * given in spec 38.331. */
1069 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1071 if(pdschCfgCmnPres == true)
1073 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1074 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1075 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1079 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1081 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1085 k0TmpVal = DEFAULT_K0_VALUE;
1087 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1088 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1091 /* If current slot + k0 is UL then skip the slot
1092 * else if it is DL slot then continue the next steps
1093 * else if it is a FLEXI slot then check symbols of slot, It should not
1094 * contain any UL slot. */
1095 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1096 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1097 if(slotCfg == UL_SLOT)
1101 if(slotCfg == FLEXI_SLOT)
1103 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1105 slotCfg = cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol];
1106 if(slotCfg == UL_SLOT)
1113 /* If current slot + k0 + k1 is a DL slot then skip the slot
1114 * else if it is UL slot then store the information
1115 * else if it is FLEXI slot then check the symbols, it must have
1116 * at least one UL symbol. */
1118 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1120 k1TmpVal = UlAckTbl[k1Index];
1121 if(k1TmpVal > MIN_NUM_K1_IDX)
1123 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1124 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1125 if(slotCfg == DL_SLOT)
1129 if(slotCfg == FLEXI_SLOT)
1131 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1133 if(cell->cellCfg.tddCfg.slotCfg[tmpSlot][checkSymbol] == UL_SLOT)
1135 ulSlotPresent = true;
1140 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1142 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1143 /* TODO Store K1 index where harq feedback will be received
1149 /* Store all the values if all condition satisfies. */
1152 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1153 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1159 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1166 /*******************************************************************
1168 * @brief Fills K2 information table for FDD
1172 * Function : BuildK2InfoTableForFdd
1175 * Fills K2 information table for FDD
1177 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1178 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1179 * @return ROK - success
1182 * ****************************************************************/
1183 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1184 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1186 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1188 /* Initialization the structure and storing the total slot values. */
1189 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1190 k2InfoTbl->tblSize = cell->numSlots;
1192 msg3K2InfoTbl->tblSize = cell->numSlots;
1194 /* Checking all possible indexes for K2. */
1195 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1197 /* Storing K2 values. */
1198 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1200 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1201 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1202 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1204 /* Updating K2 values for MSG3 */
1207 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1208 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1209 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1215 /*******************************************************************
1217 * @brief Fills K2 information table
1221 * Function : BuildK2InfoTable
1224 * Fills K2 information table
1226 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1227 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1228 * @return ROK - success
1231 * ****************************************************************/
1232 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1233 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1237 bool dlSymbolPresent = false;
1238 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1239 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1240 SlotConfig currentSlot;
1243 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1245 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1251 /* Initialization the structure and storing the total slot values. */
1252 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1253 k2InfoTbl->tblSize = cell->numSlots;
1255 msg3K2InfoTbl->tblSize = cell->numSlots;
1256 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbSchCfg.scsCommon, cell->cellCfg.tddCfg.tddPeriod);
1258 /* Checking all possible indexes for K2. */
1259 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1261 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1263 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1264 if(currentSlot != UL_SLOT)
1266 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1268 /* Storing k2, startSymbol, endSymbol information for further processing.
1269 * If k2 is absent then fill the default values given in spec 38.331
1270 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1271 k2Val = timeDomRsrcAllocList[k2Index].k2;
1274 switch(cell->cellCfg.ssbSchCfg.scsCommon)
1277 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1280 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1283 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1286 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1291 /* Current slot + k2 should be either UL or FLEXI slot.
1292 * If slot is FLEXI then check all the symbols of that slot,
1293 * it should not contain any DL or FLEXI slot */
1294 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1295 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1296 if(slotCfg != DL_SLOT)
1298 if(slotCfg == FLEXI_SLOT)
1300 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1301 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1302 dlSymbolPresent = false;
1303 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1305 currentSymbol = cell->cellCfg.tddCfg.slotCfg[k2TmpVal][checkSymbol];
1306 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1308 dlSymbolPresent = true;
1313 /* Store all the values if all condition satisfies. */
1314 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1316 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1317 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1318 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1324 msg3Delta = puschDeltaTable[cell->cellCfg.numerology];
1326 /* Check for K2 for MSG3 */
1327 /* Current slot + k2 should be either UL or FLEXI slot.
1328 * If slot is FLEXI then check all the symbols of that slot,
1329 * it should not contain any DL or FLEXI slot */
1330 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1331 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1332 if(slotCfg != DL_SLOT)
1334 if(slotCfg == FLEXI_SLOT)
1336 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1337 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1338 dlSymbolPresent = false;
1339 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1341 currentSymbol = cell->cellCfg.tddCfg.slotCfg[msg3K2TmpVal][checkSymbol];
1342 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1344 dlSymbolPresent = true;
1349 /* Store all the values if all condition satisfies. */
1350 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1352 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1353 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1354 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1365 /*******************************************************************************************
1367 * @brief Allocate the PRB using RRM policy
1371 * Function : prbAllocUsingRRMPolicy
1374 * [Step1]: Traverse each Node in the LC list
1375 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1376 * [Step3]: Calcualte the maxPRB for this LC.
1377 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1379 * b. For Default, just SharedPRB count
1380 * [Step4]: If the LC is the First one to be allocated for this UE then add
1381 * TX_PAYLODN_LEN to reqBO
1382 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1383 * based on reqBO and maxPRB left.
1384 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1385 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1386 * [Step8]: Continue the next loop from List->head
1389 * [Exit1]: If all the LCs are allocated in list
1390 * [Exit2]: If PRBs are exhausted
1392 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1393 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1394 * I/P > mcsIdx and PDSCH symbols count
1395 * I/P & O/P > Shared PRB , reserved PRB Count
1396 * I/P & O/P > Total TBS size accumulated
1397 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1398 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1402 * *******************************************************************************************/
1403 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1404 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1406 CmLList *node = NULLP;
1407 LcInfo *lcNode = NULLP;
1408 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1412 DU_LOG("\nERROR --> SCH: LcList not present");
1417 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1418 * For Other LcList, remReservedPRB = 0*/
1419 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1421 remReservedPRB = *reservedPRB;
1428 /*For Debugging purpose*/
1431 lcNode = (LcInfo *)node->node;
1433 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1434 * process of LCID which was fully allocated. Check is just for safety purpose*/
1435 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1437 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1439 deleteNodeFromLList(lcLL, node);
1440 SCH_FREE(lcNode, sizeof(LcInfo));
1445 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1446 if(lcNode->allocBO != 0)
1448 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1452 /*[Exit2]: If PRBs are exhausted*/
1455 /*Loop Exit: All resources exhausted*/
1456 if(remReservedPRB == 0 && *sharedPRB == 0)
1458 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1464 /*Loop Exit: All resources exhausted*/
1467 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1473 maxPRB = remReservedPRB + *sharedPRB;
1476 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1478 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1480 *isTxPayloadLenAdded = TRUE;
1481 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1482 mcsIdx, numSymbols, maxPRB, &estPrb);
1483 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1485 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1487 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1490 lcNode->reqBO += UL_GRANT_SIZE;
1491 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1496 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1497 mcsIdx, numSymbols, maxPRB, &estPrb);
1500 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1501 * estimated PRB allocated*/
1502 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1504 remReservedPRB = remReservedPRB - estPrb;
1506 else /*LC requirement need PRB share from SharedPRB*/
1508 if(*sharedPRB <= (estPrb - remReservedPRB))
1510 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1515 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1521 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1522 lcNode->allocPRB = estPrb;
1523 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1525 /*[Step8]:Next loop: First LC to be picked from the list
1526 * because Allocated Nodes are moved to the last*/
1533 /*******************************************************************************************
1535 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1540 * Function : updateGrantSizeForBoRpt
1543 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1544 * BO Report in dlMsgAlloc Pointer
1546 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1547 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1548 * I/P & O/P > BsrInfo (applicable for UL)
1549 * I/P & O/P > accumalatedBOSize
1552 * *******************************************************************************************/
1553 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgAlloc *dlMsgAlloc,\
1554 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1556 CmLList *node = NULLP, *next = NULLP;
1557 LcInfo *lcNode = NULLP;
1558 DlMsgSchInfo *dlMsgSchInfo = NULLP;
1562 DU_LOG("\nERROR --> SCH: LcList not present");
1580 lcNode = (LcInfo *)node->node;
1583 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1584 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1585 if(dlMsgAlloc != NULLP)
1587 dlMsgSchInfo = &dlMsgAlloc->dlMsgSchedInfo[dlMsgAlloc->numSchedInfo];
1589 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1590 * report for allocation can be sent to MAC*/
1591 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].lcId = lcNode->lcId;
1592 dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes = lcNode->allocBO;
1594 /*Calculate the Total Payload/BO size allocated*/
1595 *accumalatedBOSize += dlMsgSchInfo->lcSchInfo[dlMsgSchInfo->numLc].schBytes;
1597 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1598 lcNode->lcId,lcNode->reqBO, dlMsgSchInfo->numLc, *accumalatedBOSize);
1600 dlMsgSchInfo->numLc++;
1601 /*The LC has been fully allocated, clean it*/
1602 if(lcNode->reqBO == 0)
1604 handleLcLList(lcLL, lcNode->lcId, DELETE);
1607 else if(bsrInfo != NULLP)
1609 *accumalatedBOSize += lcNode->allocBO;
1610 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1611 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1619 /*******************************************************************
1621 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1625 * Function : fillDlMsgInfo
1628 * fill DL message information for MSG4 and Dedicated DL Msg
1630 * @params[in] DlMsgInfo *dlMsgInfo, uint8_t crnti
1633 *******************************************************************/
1634 void fillDlMsgInfo(DlMsgInfo *dlMsgInfo, uint8_t crnti)
1636 dlMsgInfo->crnti = crnti;
1638 dlMsgInfo->harqProcNum = 0;
1639 dlMsgInfo->dlAssignIdx = 0;
1640 dlMsgInfo->pucchTpc = 0;
1641 dlMsgInfo->pucchResInd = 0;
1642 dlMsgInfo->harqFeedbackInd = 0;
1643 dlMsgInfo->dciFormatId = 1;
1646 /*******************************************************************
1648 * @brief sch Process pending Msg4 Req
1652 * Function : schProcessMsg4Req
1655 * sch Process pending Msg4 Req
1657 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1658 * @return ROK - success
1661 *******************************************************************/
1663 bool schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
1665 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1666 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1667 DlMsgAlloc *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1668 DlMsgAlloc *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1672 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1676 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1677 &pucchTime) != true )
1682 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1684 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgAlloc));
1685 if(dciSlotAlloc == NULLP)
1687 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1690 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1691 memset(dciSlotAlloc, 0, sizeof(DlMsgAlloc));
1692 GET_CRNTI(dciSlotAlloc->crnti, ueId);
1695 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1697 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1698 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols)) != ROK)
1700 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1701 if(dciSlotAlloc->numSchedInfo == 0)
1703 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1704 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1707 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1711 /* Check if both DCI and RAR are sent in the same slot.
1712 * If not, allocate memory RAR PDSCH slot to store RAR info
1714 if(pdcchTime.slot == pdschTime.slot)
1716 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = BOTH;
1717 dciSlotAlloc->numSchedInfo++;
1721 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1722 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1724 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgAlloc));
1725 if(msg4SlotAlloc == NULLP)
1727 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1728 if(dciSlotAlloc->numSchedInfo == 0)
1730 SCH_FREE(dciSlotAlloc, sizeof(DlMsgAlloc));
1731 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1734 memset(&dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], 0, sizeof(DlMsgSchInfo));
1737 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1738 memset(msg4SlotAlloc, 0, sizeof(DlMsgAlloc));
1739 msg4SlotAlloc->crnti = dciSlotAlloc->crnti;
1742 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1744 /* Copy all RAR info */
1745 memcpy(&msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo], \
1746 &dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo], sizeof(DlMsgSchInfo));
1747 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdcchCfg.dci.pdschCfg = \
1748 &msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].dlMsgPdschCfg;
1750 /* Assign correct PDU types in corresponding slots */
1751 msg4SlotAlloc->dlMsgSchedInfo[msg4SlotAlloc->numSchedInfo].pduPres = PDSCH_PDU;
1752 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pduPres = PDCCH_PDU;
1753 dciSlotAlloc->dlMsgSchedInfo[dciSlotAlloc->numSchedInfo].pdschSlot = pdschTime.slot;
1755 dciSlotAlloc->numSchedInfo++;
1756 msg4SlotAlloc->numSchedInfo++;
1759 /* PUCCH resource */
1760 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti);
1762 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1763 cell->schDlSlotInfo[pdschTime.slot]->pdschUe = ueId;
1764 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1765 cell->raCb[ueId-1].msg4recvd = FALSE;
1769 /*******************************************************************
1771 * @brief Handler to calculate TBS size for BSR requested
1775 * Function : schCalculateUlTbs
1777 * Functionality: Function will note the required TBS for each LCGIDX and use
1778 * the Priority LCG List and RRM policy to allocate the TBS size
1780 * @params [in] ueCb (Pointer to UE CB)
1781 * [in] puschTime (Time slot where PUSCH will be sent)
1782 * [in] symbLen (No of Symbols used for PUSCH transmission)
1783 * [out] startPrb(Pointer to startPRB which will be calculated while
1784 * finding the best Free Block)
1785 * [out] totTBS(Pointer to total TBS size)
1787 * @return bool : true > Scheduling of UL grant is successful
1788 * false > vice versa
1790 * ****************************************************************/
1791 bool schCalculateUlTbs(SchUeCb *ueCb, SlotTimingInfo puschTime, uint8_t symbLen,\
1792 uint16_t *startPrb, uint32_t *totTBS)
1794 uint16_t mcsIdx = 0;
1795 CmLListCp *lcLL = NULLP;
1796 uint16_t lcgIdx = 0, lcId =0, maxFreePRB = 0;
1802 for(lcgIdx=0; lcgIdx<MAX_NUM_LOGICAL_CHANNEL_GROUPS; lcgIdx++)
1804 if(ueCb->bsrInfo[lcgIdx].dataVol == 0)
1809 /*TODO: lcgIdx and LCID has been implemented as one to one mapping.
1810 * Need to check the mapping to figure out the LCID and lcgIdx once L2
1811 * spec specifies any logic*/
1813 if(ueCb->ulInfo.ulLcCtxt[lcId].isDedicated)
1815 lcLL = &(ueCb->ulLcPrbEst.dedLcInfo->dedLcList);
1819 lcLL = &(ueCb->ulLcPrbEst.defLcList);
1822 /*[Step2]: Update the reqPRB and Payloadsize for this LC in the appropriate List*/
1823 if(updateLcListReqPRB(lcLL, lcId, ueCb->bsrInfo[lcgIdx].dataVol) != ROK)
1825 DU_LOG("\nERROR --> SCH: LcgId:%d updation failed",lcId);
1830 if ((ueCb->ulLcPrbEst.defLcList.count == 0) && \
1831 ((ueCb->ulLcPrbEst.dedLcInfo == NULL) || (ueCb->ulLcPrbEst.dedLcInfo->dedLcList.count == 0)))
1835 *startPrb = MAX_NUM_RB;
1836 *totTBS = schCalcTbSize(UL_GRANT_SIZE);
1839 /*Returning true when NO Grant is there for UE as this is not scheduling
1844 maxFreePRB = searchLargestFreeBlock(ueCb->cellCb, puschTime, startPrb, DIR_UL);
1846 /*[Step4]: Estimation of PRB and BO which can be allocated to each LC in
1847 * the list based on RRM policy*/
1849 /*Either this UE contains no reservedPRB pool fir dedicated S-NSSAI or
1850 * Num of Free PRB available is not enough to reserve Dedicated PRBs*/
1853 mcsIdx = ueCb->ueCfg.ulModInfo.mcsIndex;
1854 if((ueCb->ulLcPrbEst.dedLcInfo == NULLP)
1855 || ((maxFreePRB < ueCb->ulLcPrbEst.dedLcInfo->rsvdDedicatedPRB)))
1857 ueCb->ulLcPrbEst.sharedNumPrb = maxFreePRB;
1858 DU_LOG("\nDEBUG --> SCH : UL Only Default Slice is scheduled, sharedPRB Count:%d",\
1859 ueCb->ulLcPrbEst.sharedNumPrb);
1861 /*PRB Alloc for Default LCs*/
1862 prbAllocUsingRRMPolicy(&(ueCb->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen,\
1863 &(ueCb->ulLcPrbEst.sharedNumPrb), NULLP, NULLP,&(ueCb->srRcvd));
1867 ueCb->ulLcPrbEst.sharedNumPrb = maxFreePRB - ueCb->ulLcPrbEst.dedLcInfo->rsvdDedicatedPRB;
1869 /*PRB Alloc for Dedicated LCs*/
1870 prbAllocUsingRRMPolicy(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), TRUE, mcsIdx, symbLen,\
1871 &(ueCb->ulLcPrbEst.sharedNumPrb), &(ueCb->ulLcPrbEst.dedLcInfo->rsvdDedicatedPRB),\
1872 NULLP,&(ueCb->srRcvd));
1874 /*PRB Alloc for Default LCs*/
1875 prbAllocUsingRRMPolicy(&(ueCb->ulLcPrbEst.defLcList), FALSE, mcsIdx, symbLen, \
1876 &(ueCb->ulLcPrbEst.sharedNumPrb), &(ueCb->ulLcPrbEst.dedLcInfo->rsvdDedicatedPRB),\
1877 NULLP,&(ueCb->srRcvd));
1880 /*[Step5]:Traverse each LCID in LcList to calculate the exact Scheduled Bytes
1881 * using allocated BO per LC and Update dlMsgAlloc(BO report for MAC*/
1882 if(ueCb->ulLcPrbEst.dedLcInfo != NULLP)
1883 updateGrantSizeForBoRpt(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), NULLP, ueCb->bsrInfo, totTBS);
1885 updateGrantSizeForBoRpt(&(ueCb->ulLcPrbEst.defLcList), NULLP, ueCb->bsrInfo, totTBS);
1887 /*Below case will hit if NO LC(s) are allocated due to resource crunch*/
1892 DU_LOG("\nERROR --> SCH : NO FREE PRB!!");
1896 /*Schedule the LC for next slot*/
1897 DU_LOG("\nDEBUG --> SCH : No LC has been scheduled");
1904 /*******************************************************************
1906 * @brief sch Process pending Sr or Bsr Req
1910 * Function : schProcessSrOrBsrReq
1913 * sch Process pending Sr or Bsr Req
1915 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1916 * @return ROK - success
1919 *******************************************************************/
1920 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId)
1922 bool k2Found = FALSE, ret = FALSE;
1923 uint8_t startSymb = 0, symbLen = 0;
1924 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
1925 uint16_t startPrb = 0;
1926 uint32_t totDataReq = 0; /* in bytes */
1928 SchPuschInfo *puschInfo;
1929 DciInfo *dciInfo = NULLP;
1930 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
1931 SlotTimingInfo dciTime, puschTime;
1935 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
1939 ueCb = &cell->ueCb[ueId-1];
1943 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : UE is NULL");
1946 /* Calculating time frame to send DCI for SR */
1947 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA);
1949 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1952 if(ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
1953 k2InfoTbl = &ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2InfoTbl;
1955 k2InfoTbl = &cell->cellCfg.schInitialUlBwp.k2InfoTbl;
1957 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
1959 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
1961 if(!ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.k2TblPrsnt)
1963 k2Val = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
1964 startSymb = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
1965 symbLen = cell->cellCfg.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
1969 k2Val = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
1970 startSymb = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
1971 symbLen = ueCb->ueCfg.spCellCfg.servCellCfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
1974 /* Calculating time frame to send PUSCH for SR */
1975 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val);
1977 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
1980 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
1991 ret = schCalculateUlTbs(ueCb, puschTime, symbLen, &startPrb, &totDataReq);
1992 if(totDataReq > 0 && ret == TRUE)
1994 SCH_ALLOC(dciInfo, sizeof(DciInfo));
1997 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
1999 if(ueCb->ulLcPrbEst.dedLcInfo != NULLP)
2000 updateBsrAndLcList(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), ueCb->bsrInfo, RFAILED);
2002 updateBsrAndLcList(&(ueCb->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2005 cell->schDlSlotInfo[dciTime.slot]->ulGrant = dciInfo;
2006 memset(dciInfo,0,sizeof(DciInfo));
2008 /* Update PUSCH allocation */
2009 if(schFillPuschAlloc(ueCb, puschTime, totDataReq, startSymb, symbLen, startPrb) == ROK)
2011 if(cell->schUlSlotInfo[puschTime.slot]->schPuschInfo)
2013 puschInfo = cell->schUlSlotInfo[puschTime.slot]->schPuschInfo;
2014 if(puschInfo != NULLP)
2016 /* Fill DCI for UL grant */
2017 schFillUlDci(ueCb, puschInfo, dciInfo);
2018 memcpy(&dciInfo->slotIndInfo, &dciTime, sizeof(SlotTimingInfo));
2019 ueCb->srRcvd = false;
2020 ueCb->bsrRcvd = false;
2021 cell->schUlSlotInfo[puschTime.slot]->puschUe = ueId;
2022 if(ueCb->ulLcPrbEst.dedLcInfo != NULLP)
2023 updateBsrAndLcList(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), ueCb->bsrInfo, ROK);
2025 updateBsrAndLcList(&(ueCb->ulLcPrbEst.defLcList), ueCb->bsrInfo, ROK);
2031 if(ueCb->ulLcPrbEst.dedLcInfo != NULLP)
2032 updateBsrAndLcList(&(ueCb->ulLcPrbEst.dedLcInfo->dedLcList), ueCb->bsrInfo, RFAILED);
2034 updateBsrAndLcList(&(ueCb->ulLcPrbEst.defLcList), ueCb->bsrInfo, RFAILED);
2041 /*******************************************************************
2043 * @brief sch Process pending Sr or Bsr Req
2047 * Function : updateBsrAndLcList
2050 * Updating the BSRInfo in UECB and Lclist
2052 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
2053 * @return ROK - success
2056 *******************************************************************/
2057 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
2059 CmLList *node = NULLP, *next = NULLP;
2060 LcInfo *lcNode = NULLP;
2064 DU_LOG("\nERROR --> SCH: LcList not present");
2081 lcNode = (LcInfo *)node->node;
2084 /*Only when Status is OK then allocation is marked as ZERO and reqBO
2085 * is updated in UE's DB. If Failure, then allocation is added to reqBO
2086 * and same is updated in Ue's DB inside BSR Info structure*/
2089 lcNode->allocBO = 0;
2092 lcNode->reqBO += lcNode->allocBO;
2093 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
2094 if(lcNode->reqBO == 0)
2096 handleLcLList(lcLL, lcNode->lcId, DELETE);
2102 /**********************************************************************
2104 **********************************************************************/