src/5gnrsch/sch_common.c

   1 /*******************************************************************************
   2 ################################################################################
   3 #   Copyright (c) [2017-2019] [Radisys]                                        #
   4 #                                                                              #
   5 #   Licensed under the Apache License, Version 2.0 (the "License");            #
   6 #   you may not use this file except in compliance with the License.           #
   7 #   You may obtain a copy of the License at                                    #
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  10 #                                                                              #
  11 #   Unless required by applicable law or agreed to in writing, software        #
  12 #   distributed under the License is distributed on an "AS IS" BASIS,          #
  13 #   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.   #
  14 #   See the License for the specific language governing permissions and        #
  15 #   limitations under the License.                                             #
  16 ################################################################################
  17  *******************************************************************************/
  18
  19 /************************************************************************
  20
  21 Name:     5G NR SCH layer
  22
  23 Type:     C source file
  24
  25 Desc:     C source code for Entry point fucntions
  26
  27 File:     sch_common.c
  28
  29  **********************************************************************/
  30
  31 /** @file sch_common.c
  32   @brief This module performs common scheduling
  33  */
  34 #include "stdbool.h"
  35 #include "envopt.h"        /* environment options */
  36 #include "envdep.h"        /* environment dependent */
  37 #include "envind.h"        /* environment independent */
  38 #include "gen.h"           /* general layer */
  39 #include "ssi.h"           /* system service interface */
  40 #include "cm_tkns.h"       /* Common Token Defines */
  41 #include "cm_llist.h"      /* Common Link List Defines */
  42 #include "cm_hash.h"       /* Common Hash List Defines */
  43 #include "cm_mblk.h"       /* common memory link list library */
  44 #include "cm_lte.h"        /* Common LTE Defines */
  45 #include "tfu.h"
  46 #include "lrg.h"
  47
  48 #include "gen.x"           /* general layer typedefs */
  49 #include "ssi.x"           /* system services typedefs */
  50 #include "cm5.x"           /* system services */
  51 #include "cm_tkns.x"       /* Common Token Definitions */
  52 #include "cm_llist.x"      /* Common Link List Definitions */
  53 #include "cm_lib.x"        /* Common Library Definitions */
  54 #include "cm_hash.x"       /* Common Hash List Definitions */
  55 #include "cm_mblk.x"       /* common memory link list library */
  56 #include "cm_lte.x"        /* Common LTE Defines */
  57 #include "tfu.x"
  58 #include "lrg.x"
  59 #include "du_log.h"
  60 #include "du_app_mac_inf.h"
  61 #include "mac_sch_interface.h"
  62 #include "sch.h"
  63 #include "sch_utils.h"
  64 #include "common_def.h"
  65
  66 extern SchCb schCb[SCH_MAX_INST];
  67 extern uint16_t prachCfgIdxTable[MAX_PRACH_CONFIG_IDX][8];
  68 extern uint16_t numRbForPrachTable[MAX_RACH_NUM_RB_IDX][5];
  69
  70 SchMacUlSchInfoFunc schMacUlSchInfoOpts[] =
  71 {
  72         packSchMacUlSchInfo,
  73         MacProcUlSchInfo,
  74         packSchMacUlSchInfo
  75 };
  76
  77 /**
  78  * @brief common resource allocation for SSB
  79  *
  80  * @details
  81  *
  82  *     Function : schBroadcastAlloc
  83  *
  84  *     This function handles common scheduling for DL
  85  *
  86  *  @param[in]  SchCellCb *cell, cell cb
  87  *  @param[in]  DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
  88  *  @return  void
  89  **/
  90 uint8_t schBroadcastAlloc(SchCellCb *cell, DlBrdcstAlloc *dlBrdcstAlloc,
  91         uint16_t slot)
  92 {
  93         /* schedule SSB */
  94         uint8_t ssbStartPrb, ssbStartSymb, idx;
  95         SchDlSlotInfo *schDlSlotInfo;
  96         SsbInfo ssbInfo;
  97
  98         schDlSlotInfo = cell->schDlSlotInfo[slot];
  99         if(dlBrdcstAlloc->ssbTrans)
 100         {
 101                 ssbStartPrb = cell->cellCfg.ssbSchCfg.ssbOffsetPointA;
 102       ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are
 103                 supporting only 1 ssb beam */
 104
 105                 /* Assign interface structure */
 106                 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
 107                 {
 108                         ssbInfo.ssbIdx              = idx;
 109                         ssbInfo.fdAlloc.startPrb    = ssbStartPrb;
 110                         ssbInfo.fdAlloc.numPrb      = SCH_SSB_NUM_PRB;
 111                         ssbInfo.tdAlloc.startSymb   = ssbStartSymb;
 112                         ssbInfo.tdAlloc.numSymb     = SCH_SSB_NUM_SYMB;
 113                         dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
 114                         schDlSlotInfo->ssbInfo[idx] = ssbInfo;
 115                 }
 116
 117                 schDlSlotInfo->ssbPres = true;
 118                 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
 119                 for(idx=ssbStartSymb; idx<ssbStartSymb+SCH_SSB_NUM_SYMB; idx++)
 120                 {
 121                         schDlSlotInfo->assignedPrb[idx] = ssbStartPrb + SCH_SSB_NUM_PRB + 1; /* +1 for kSsb */
 122                 }
 123         }
 124
 125         /* SIB1 allocation */
 126         if(dlBrdcstAlloc->sib1Trans)
 127         {
 128                 schDlSlotInfo->sib1Pres = true;
 129                 for(idx=0; idx<SCH_SYMBOL_PER_SLOT; idx++)
 130                 {
 131                         schDlSlotInfo->assignedPrb[idx] = ssbStartPrb + SCH_SSB_NUM_PRB + 1 + 10; /* 10 PRBs for sib1 */
 132                 }
 133            memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->cellCfg.sib1SchCfg.bwp, sizeof(BwpCfg));
 134            memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->cellCfg.sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
 135            memcpy(&dlBrdcstAlloc->sib1Alloc.sib1PdschCfg, &cell->cellCfg.sib1SchCfg.sib1PdschCfg, sizeof(PdschCfg));
 136         }
 137         return ROK;
 138 }
 139
 140 /*******************************************************************
 141  *
 142  * @brief Handles sending UL scheduler info to MAC
 143  *
 144  * @details
 145  *
 146  *    Function : sendUlSchInfoToMac
 147  *
 148  *    Functionality:
 149  *     Sends UL Sch info to MAC from SCH
 150  *
 151  * @params[in]
 152  * @return ROK     - success
 153  *         RFAILED - failure
 154  *
 155  * ****************************************************************/
 156 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
 157 {
 158         Pst pst;
 159
 160    memset(&pst, 0, sizeof(Pst));
 161    SCH_FILL_RSP_PST(pst, inst);
 162         pst.event = EVENT_UL_SCH_INFO;
 163
 164         return(*schMacUlSchInfoOpts[pst.selector])(&pst, ulSchedInfo);
 165 }
 166 /**
 167  * @brief resource allocation for PRACH
 168  *
 169  * @details
 170  *
 171  *     Function : schPrachResAlloc
 172  *
 173  *     This function handles PRACH allocation
 174  *
 175  *  @param[in]  SchCellCb *cell, cell cb
 176  *  @param[in]  UlSchedInfo *ulSchedInfo, UL scheduling info
 177  *  @return  void
 178  **/
 179 int schPrachResAlloc(SchCellCb *cell, UlSchedInfo *ulSchedInfo, SlotIndInfo prachOccasionTimingInfo)
 180 {
 181    uint8_t  puschScs;
 182    uint8_t  numPrachRb = 0;
 183         uint8_t  numRa = 0;
 184         uint8_t  freqStart = 0;
 185         uint8_t  prachCfgIdx = 0;
 186         uint8_t  prachFormat = 0;
 187         uint8_t  x = 0;
 188         uint8_t  y = 0;
 189         uint16_t prachSubframe = 0;
 190         uint8_t  prachStartSymbol = 0;
 191         uint8_t  prachOcas = 0;
 192         uint8_t  dataType = 0;
 193         uint8_t  idx = 0;
 194         SchUlSlotInfo *schUlSlotInfo = NULLP;
 195
 196    puschScs      = cell->cellCfg.schInitialUlBwp.bwp.scs;
 197         schUlSlotInfo = cell->schUlSlotInfo[prachOccasionTimingInfo.slot];
 198         prachCfgIdx   = cell->cellCfg.schRachCfg.prachCfgIdx;
 199
 200     /* derive the prachCfgIdx table paramters */
 201         x                = prachCfgIdxTable[prachCfgIdx][1];
 202         y                = prachCfgIdxTable[prachCfgIdx][2];
 203         prachSubframe    = prachCfgIdxTable[prachCfgIdx][3];
 204
 205         if((prachOccasionTimingInfo.sfn%x) != y)
 206         {
 207            /* prach occasion does not lie in this SFN */
 208                 DU_LOG("\nPRACH ocassion doesn't lie in this SFN");
 209            return RFAILED;
 210         }
 211         /* check for subFrame number */
 212         if ((1 << prachOccasionTimingInfo.slot) & prachSubframe)
 213         {
 214       /* prach ocassion present in this subframe */
 215
 216                 prachFormat      = prachCfgIdxTable[prachCfgIdx][0];
 217                 prachStartSymbol = prachCfgIdxTable[prachCfgIdx][4];
 218                 prachOcas        = prachCfgIdxTable[prachCfgIdx][6];
 219
 220                 /* freq domain resource determination for RACH*/
 221                 freqStart = cell->cellCfg.schRachCfg.msg1FreqStart;
 222                 /* numRa determined as 𝑛 belonging {0,1,.., M − 1},
 223                  * where M is given by msg1Fdm */
 224                 numRa = (cell->cellCfg.schRachCfg.msg1Fdm - 1);
 225                 for(idx=0; idx<MAX_RACH_NUM_RB_IDX; idx++)
 226                 {
 227                         if(numRbForPrachTable[idx][0] == cell->cellCfg.schRachCfg.rootSeqLen)
 228                         {
 229                                 if(numRbForPrachTable[idx][1] == cell->cellCfg.schRachCfg.prachSubcSpacing)
 230                                 {
 231                                         if(numRbForPrachTable[idx][2] == puschScs)
 232                                         {
 233                                                 break;
 234                                         }
 235                                 }
 236                         }
 237
 238                 }
 239
 240                 numPrachRb = numRbForPrachTable[idx][3];
 241                 dataType |= SCH_DATATYPE_PRACH;
 242                 /* Considering first slot in the frame for PRACH */
 243                 idx = 0;
 244                 schUlSlotInfo->assignedPrb[idx] = freqStart+numPrachRb;
 245         }
 246
 247         ulSchedInfo->dataType = dataType;
 248         /* prach info */
 249         ulSchedInfo->prachSchInfo.numPrachOcas   = prachOcas;
 250         ulSchedInfo->prachSchInfo.prachFormat    = prachFormat;
 251         ulSchedInfo->prachSchInfo.numRa          = numRa;
 252         ulSchedInfo->prachSchInfo.prachStartSymb = prachStartSymbol;
 253
 254         return ROK;
 255 }
 256
 257 /**
 258  * @brief resource allocation for UL
 259  *
 260  * @details
 261  *
 262  *     Function : schUlResAlloc
 263  *
 264  *     This function handles UL Resource allocation
 265  *
 266  *  @param[in]  SchCellCb *cell, cellCb
 267  *  @return  void
 268  **/
 269 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
 270 {
 271    int ret = ROK;
 272         UlSchedInfo ulSchedInfo;
 273    SchUlSlotInfo  *schUlSlotInfo;
 274    SlotIndInfo ulTimingInfo;
 275
 276    /* add PHY delta */
 277    ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA+SCHED_DELTA);
 278
 279         ulSchedInfo.cellId = cell->cellId;
 280         ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
 281    ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
 282
 283    /* Schedule resources for PRACH */
 284         schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
 285
 286         schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
 287
 288         if(schUlSlotInfo->schPuschInfo)
 289         {
 290       ulSchedInfo.crnti = cell->raCb[0].tcrnti;
 291                 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
 292                 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
 293                                 sizeof(SchPuschInfo));
 294                 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
 295                 schUlSlotInfo->schPuschInfo = NULL;
 296         }
 297
 298         //send msg to MAC
 299    ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
 300    if(ret != ROK)
 301    {
 302       DU_LOG("\nSending UL Sch info from SCH to MAC failed");
 303    }
 304
 305         memset(cell->schUlSlotInfo[ulTimingInfo.slot], 0, sizeof(SchUlSlotInfo));
 306
 307         return ret;
 308 }
 309
 310 /*******************************************************************
 311  *
 312  * @brief Fills pdcch and pdsch info for msg4
 313  *
 314  * @details
 315  *
 316  *    Function : schDlRsrcAllocMsg4
 317  *
 318  *    Functionality:
 319  *       Fills pdcch and pdsch info for msg4
 320  *
 321  * @params[in]
 322  * @return ROK     - success
 323  *         RFAILED - failure
 324  *
 325  * ****************************************************************/
 326 uint8_t schDlRsrcAllocMsg4(Msg4Alloc *msg4Alloc, SchCellCb *cell, uint16_t slot)
 327 {
 328    uint8_t coreset0Idx = 0;
 329    uint8_t numRbs = 0;
 330    uint8_t firstSymbol = 0;
 331    uint8_t numSymbols = 0;
 332    uint8_t offset = 0;
 333    uint8_t offsetPointA;
 334    uint8_t FreqDomainResource[6] = {0};
 335    uint16_t tbSize = 0;
 336         uint8_t numPdschSymbols = 12; /* considering pdsch region from 2 to 13 */
 337    uint8_t mcs = 4;  /* MCS fixed to 4 */
 338    SchBwpDlCfg *initialBwp;
 339
 340    PdcchCfg *pdcch = &msg4Alloc->msg4PdcchCfg;
 341    PdschCfg *pdsch = &msg4Alloc->msg4PdschCfg;
 342    BwpCfg *bwp = &msg4Alloc->bwp;
 343
 344    initialBwp   = &cell->cellCfg.schInitialDlBwp;
 345    offsetPointA = cell->cellCfg.ssbSchCfg.ssbOffsetPointA;
 346    coreset0Idx  = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
 347
 348    /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
 349    numRbs        = coresetIdxTable[coreset0Idx][1];
 350    numSymbols    = coresetIdxTable[coreset0Idx][2];
 351    offset        = coresetIdxTable[coreset0Idx][3];
 352
 353    /* calculate time domain parameters */
 354    uint16_t mask = 0x2000;
 355    for(firstSymbol=0; firstSymbol<14;firstSymbol++)
 356    {
 357       if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
 358          break;
 359       else
 360          mask = mask>>1;
 361    }
 362
 363    /* calculate the PRBs */
 364    schAllocFreqDomRscType0(((offsetPointA-offset)/6), (numRbs/6), FreqDomainResource);
 365
 366    /* fill BWP */
 367    bwp->freqAlloc.numPrb   = initialBwp->bwp.freqAlloc.numPrb;
 368    bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
 369    bwp->subcarrierSpacing  = initialBwp->bwp.scs;
 370    bwp->cyclicPrefix       = initialBwp->bwp.cyclicPrefix;
 371
 372    /* fill the PDCCH PDU */
 373    pdcch->coreset0Cfg.startSymbolIndex = firstSymbol;
 374    pdcch->coreset0Cfg.durationSymbols = numSymbols;
 375    memcpy(pdcch->coreset0Cfg.freqDomainResource,FreqDomainResource,6);
 376    pdcch->coreset0Cfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
 377    pdcch->coreset0Cfg.regBundleSize = 6;    /* spec-38.211 sec 7.3.2.2 */
 378    pdcch->coreset0Cfg.interleaverSize = 2;  /* spec-38.211 sec 7.3.2.2 */
 379    pdcch->coreset0Cfg.coreSetType = 0;
 380    pdcch->coreset0Cfg.coreSet0Size = numRbs;
 381    pdcch->coreset0Cfg.shiftIndex = cell->cellCfg.phyCellId;
 382    pdcch->coreset0Cfg.precoderGranularity = 0; /* sameAsRegBundle */
 383    pdcch->numDlDci = 1;
 384    pdcch->dci.rnti = cell->schDlSlotInfo[slot]->msg4Info->crnti;
 385    pdcch->dci.scramblingId = cell->cellCfg.phyCellId;
 386    pdcch->dci.scramblingRnti = 0;
 387    pdcch->dci.cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
 388    pdcch->dci.aggregLevel = 4;
 389    pdcch->dci.beamPdcchInfo.numPrgs = 1;
 390    pdcch->dci.beamPdcchInfo.prgSize = 1;
 391    pdcch->dci.beamPdcchInfo.digBfInterfaces = 0;
 392    pdcch->dci.beamPdcchInfo.prg[0].pmIdx = 0;
 393    pdcch->dci.beamPdcchInfo.prg[0].beamIdx[0] = 0;
 394    pdcch->dci.txPdcchPower.powerValue = 0;
 395    pdcch->dci.txPdcchPower.powerControlOffsetSS = 0;
 396
 397    /* fill the PDSCH PDU */
 398    uint8_t cwCount = 0;
 399    pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
 400    pdsch->rnti = cell->schDlSlotInfo[slot]->msg4Info->crnti;
 401    pdsch->pduIndex = 0;
 402    pdsch->numCodewords = 1;
 403    for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
 404    {
 405       pdsch->codeword[cwCount].targetCodeRate = 308;
 406       pdsch->codeword[cwCount].qamModOrder = 2;
 407       pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
 408       pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
 409       pdsch->codeword[cwCount].rvIndex = 0;
 410       /* 38.214: Table 5.1.3.2-1,  divided by 8 to get the value in bytes */
 411       /* TODO : Calculate tbSize based of DL CCCH msg size */
 412                 tbSize = schCalcTbSize(2664/8); /* send this value to the func in bytes when considering msg4 size */
 413       pdsch->codeword[cwCount].tbSize = tbSize;
 414    }
 415    pdsch->dataScramblingId = cell->cellCfg.phyCellId;
 416    pdsch->numLayers = 1;
 417    pdsch->transmissionScheme = 0;
 418    pdsch->refPoint = 0;
 419    pdsch->dmrs.dlDmrsSymbPos = 2;
 420    pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
 421    pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
 422    pdsch->dmrs.scid = 0;
 423    pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
 424    pdsch->dmrs.dmrsPorts = 0;
 425    pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
 426    /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
 427    pdsch->pdschFreqAlloc.freqAlloc.startPrb = offset + SCH_SSB_NUM_PRB;
 428    pdsch->pdschFreqAlloc.freqAlloc.numPrb = schCalcNumPrb(tbSize,mcs,numPdschSymbols);
 429    pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
 430    pdsch->pdschTimeAlloc.timeAlloc.startSymb = 2; /* spec-38.214, Table 5.1.2.1-1 */
 431    pdsch->pdschTimeAlloc.timeAlloc.numSymb = 12;
 432    pdsch->beamPdschInfo.numPrgs = 1;
 433    pdsch->beamPdschInfo.prgSize = 1;
 434    pdsch->beamPdschInfo.digBfInterfaces = 0;
 435    pdsch->beamPdschInfo.prg[0].pmIdx = 0;
 436    pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
 437    pdsch->txPdschPower.powerControlOffset = 0;
 438    pdsch->txPdschPower.powerControlOffsetSS = 0;
 439
 440    pdcch->dci.pdschCfg = pdsch;
 441    return ROK;
 442 }
 443
 444 /**********************************************************************
 445   End of file
 446  **********************************************************************/
 447