1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /************************************************************************
25 Desc: C source code for Entry point fucntions
29 **********************************************************************/
31 /** @file sch_common.c
32 @brief This module performs common scheduling
34 #include "common_def.h"
41 #include "du_app_mac_inf.h"
42 #include "mac_sch_interface.h"
45 #include "sch_utils.h"
48 * @brief common resource allocation for SSB
52 * Function : schBroadcastSsbAlloc
54 * This function handles common scheduling for SSB
56 * @param[in] SchCellCb *cell, cell cb
57 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
60 uint8_t schBroadcastSsbAlloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
63 uint8_t ssbStartSymb, idx;
65 SchDlSlotInfo *schDlSlotInfo;
70 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
74 if(dlBrdcstAlloc == NULL)
76 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
80 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
81 ssbStartPrb = cell->cellCfg.ssbSubcOffset; //+Kssb
82 ssbStartSymb = cell->ssbStartSymbArr[dlBrdcstAlloc->ssbIdxSupported-1]; /*since we are supporting only 1 ssb beam */
84 /* Assign interface structure */
85 for(idx=0; idx<dlBrdcstAlloc->ssbIdxSupported; idx++)
88 ssbInfo.fdAlloc.startPrb = ssbStartPrb;
89 ssbInfo.fdAlloc.numPrb = SCH_SSB_NUM_PRB;
90 ssbInfo.tdAlloc.startSymb = ssbStartSymb;
91 ssbInfo.tdAlloc.numSymb = SCH_SSB_NUM_SYMB;
92 dlBrdcstAlloc->ssbInfo[idx] = ssbInfo;
93 schDlSlotInfo->ssbInfo[idx] = ssbInfo;
96 if((allocatePrbDl(cell, slotTime, ssbStartSymb, SCH_SSB_NUM_SYMB, &ssbInfo.fdAlloc.startPrb, ssbInfo.fdAlloc.numPrb)) != ROK)
98 DU_LOG("\nERROR --> SCH: PRB allocation failed for SSB in SFN:SLOT [%d : %d]", slotTime.sfn, slotTime.slot);
103 schDlSlotInfo->ssbPres = true;
104 schDlSlotInfo->ssbIdxSupported = dlBrdcstAlloc->ssbIdxSupported;
109 * @brief common resource allocation for SIB1
113 * Function : schBroadcastSib1Alloc
115 * This function handles common scheduling for SIB1
117 * @param[in] SchCellCb *cell, cell cb
118 * @param[in] DlBrdcstAlloc *dlBrdcstAlloc, DL brdcst allocation
121 uint8_t schBroadcastSib1Alloc(SchCellCb *cell, SlotTimingInfo slotTime, DlBrdcstAlloc *dlBrdcstAlloc)
123 uint8_t dmrsStartSymbol, startSymbol, numSymbol ;
125 PdschFreqAlloc freqAlloc;
126 PdschTimeAlloc timeAlloc;
127 SchDlSlotInfo *schDlSlotInfo = NULLP;
131 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : Cell is NULL");
135 if(dlBrdcstAlloc == NULL)
137 DU_LOG("\nERROR --> SCH: schBroadcastSsbAlloc() : dlBrdcstAlloc is NULL");
141 dlBrdcstAlloc->crnti = SI_RNTI;
142 dmrs = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.dmrs;
143 freqAlloc = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschFreqAlloc;
144 timeAlloc = cell->sib1SchCfg.sib1PdcchCfg.dci[0].pdschCfg.pdschTimeAlloc;
145 schDlSlotInfo = cell->schDlSlotInfo[slotTime.slot];
147 /* Find total symbols used including DMRS */
148 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
149 * in that case only PDSCH symbols are marked as occupied */
150 dmrsStartSymbol = findDmrsStartSymbol(dmrs.dlDmrsSymbPos);
151 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
153 startSymbol = timeAlloc.startSymb;
154 numSymbol = timeAlloc.numSymb;
156 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
159 startSymbol = dmrsStartSymbol;
160 numSymbol = dmrs.nrOfDmrsSymbols + timeAlloc.numSymb;
164 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol, &freqAlloc.startPrb, freqAlloc.numPrb)) != ROK)
166 DU_LOG("\nERROR --> SCH: PRB allocation failed for SIB1 in SFN:Slot [%d : %d]", slotTime.sfn, slotTime.slot);
170 memcpy(&dlBrdcstAlloc->sib1Alloc.bwp, &cell->sib1SchCfg.bwp, sizeof(BwpCfg));
171 SCH_ALLOC(dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
172 if(dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg)
174 memcpy(dlBrdcstAlloc->sib1Alloc.sib1PdcchCfg, &cell->sib1SchCfg.sib1PdcchCfg, sizeof(PdcchCfg));
175 schDlSlotInfo->sib1Pres = true;
179 DU_LOG("\nERROR --> SCH : Memory allocation failed in %s", __func__);
185 /*******************************************************************
187 * @brief Handles sending UL scheduler info to MAC
191 * Function : sendUlSchInfoToMac
194 * Sends UL Sch info to MAC from SCH
197 * @return ROK - success
200 * ****************************************************************/
201 int sendUlSchInfoToMac(UlSchedInfo *ulSchedInfo, Inst inst)
205 memset(&pst, 0, sizeof(Pst));
206 FILL_PST_SCH_TO_MAC(pst, inst);
207 pst.event = EVENT_UL_SCH_INFO;
209 return(MacMessageRouter(&pst, (void *)ulSchedInfo));
213 * @brief Function to fill Pucch Format 0
217 * Function : fillPucchFormat0
219 * Function to fill Pucch format 0
221 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
225 void fillPucchFormat0(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
227 if(resrcInfo->SchPucchFormat.format0)
229 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
230 ulSchedPucch->pucchFormat = PUCCH_FORMAT_0;
231 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format0->initialCyclicShift;
232 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format0->numSymbols;
233 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format0->startSymbolIdx;
238 * @brief Function to fill Pucch Format 1
242 * Function : fillPucchFormat1
244 * Function to fill Pucch format 1
246 * @param[in] SchPucchInfo pointer, SchPucchResrcInfo pointer
250 void fillPucchFormat1(SchPucchInfo *ulSchedPucch, SchPucchResrcInfo *resrcInfo)
252 if(resrcInfo->SchPucchFormat.format1)
254 ulSchedPucch->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
255 ulSchedPucch->pucchFormat = PUCCH_FORMAT_1;
256 ulSchedPucch->initialCyclicShift = resrcInfo->SchPucchFormat.format1->initialCyclicShift;
257 ulSchedPucch->tdAlloc.numSymb = resrcInfo->SchPucchFormat.format1->numSymbols;
258 ulSchedPucch->tdAlloc.startSymb = resrcInfo->SchPucchFormat.format1->startSymbolIdx;
259 ulSchedPucch->timeDomOCC = resrcInfo->SchPucchFormat.format1->timeDomOCC;
264 * @brief Function to fill Pucch format for UL Sched Info
268 * Function : fillUlSchedPucchFormat
270 * Function to fill Pucch format for UL Sched Info
272 * @param[in] pucchFormat , SchPucchInfo pointer,
273 * @param[in] SchPucchFormatCfg pointer, SchPucchResrcInfo pointer
277 uint8_t fillUlSchedPucchFormat(uint8_t pucchFormat, SchPucchInfo *ulSchedPucch,\
278 SchPucchResrcInfo *resrcInfo, SchPucchFormatCfg *formatCfg)
287 fillPucchFormat0(ulSchedPucch, resrcInfo);
294 fillPucchFormat1(ulSchedPucch, resrcInfo);
298 ulSchedPucch->addDmrs = formatCfg->addDmrs;
299 ulSchedPucch->pi2BPSK = formatCfg->pi2BPSK;
302 }/* To Add support for more Pucch Format */
305 DU_LOG("\nERROR --> SCH : Invalid PUCCH format[%d] in fillUlSchedPucchFormatCfg()", pucchFormat);
313 * @brief Function to fill Pucch Dedicated Cfg for UL Sched Info
317 * Function : fillUlSchedPucchDedicatedCfg
319 * Function to fill Pucch Dedicated Cfg for UL Sched Info
321 * @param[in] pucchFormat to be filled
322 * @param[in] SchPucchFormatCfg pointer, SchPucchCfg pointer
326 uint8_t fillUlSchedPucchDedicatedCfg(SchCellCb *cell, SchPucchCfg *pucchDedCfg,\
327 SlotTimingInfo *slotInfo, SchPucchInfo *ulSchedPucch)
329 uint8_t ret, resrcSetIdx, resrcIdx, schedReqIdx, srPeriodicity = 0;
330 uint16_t srOffset = 0;
331 uint16_t numSlots = cell->numSlots;
332 bool isAllocated = false;
333 uint16_t pucchStartPrb;
335 if(pucchDedCfg->resrcSet && pucchDedCfg->resrc)
337 //Assuming one entry in the list
338 for(resrcSetIdx = 0; resrcSetIdx < pucchDedCfg->resrcSet->resrcSetToAddModListCount; resrcSetIdx++)
340 for(resrcIdx = 0; resrcIdx < pucchDedCfg->resrc->resrcToAddModListCount; resrcIdx++)
342 if(pucchDedCfg->resrcSet->resrcSetToAddModList[resrcSetIdx].resrcList[resrcSetIdx] ==\
343 pucchDedCfg->resrc->resrcToAddModList[resrcIdx].resrcId)
345 ulSchedPucch->intraFreqHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].intraFreqHop;
346 ulSchedPucch->secondPrbHop = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].secondPrbHop;
347 ulSchedPucch->fdAlloc.startPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
348 ulSchedPucch->pucchFormat = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].pucchFormat;
349 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch,\
350 &pucchDedCfg->resrc->resrcToAddModList[resrcIdx], NULLP);
354 pucchStartPrb = pucchDedCfg->resrc->resrcToAddModList[resrcIdx].startPrb;
355 ret = allocatePrbUl(cell, *slotInfo, ulSchedPucch->tdAlloc.startSymb, ulSchedPucch->tdAlloc.numSymb, &pucchStartPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
368 if(pucchDedCfg->format1)
370 ret = fillUlSchedPucchFormat(ulSchedPucch->pucchFormat, ulSchedPucch, NULLP, pucchDedCfg->format1);
380 /* setting SR and UCI flag */
381 if(pucchDedCfg->schedReq)
383 for(schedReqIdx = 0; schedReqIdx < pucchDedCfg->schedReq->schedAddModListCount; schedReqIdx++)
385 srPeriodicity = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].periodicity;
386 srOffset = pucchDedCfg->schedReq->schedAddModList[schedReqIdx].offset;
389 if(((numSlots * slotInfo->sfn + slotInfo->slot - srOffset) % srPeriodicity) == 0)
391 ulSchedPucch->srFlag = true;
398 * @brief Function to fill Pucch Resource Info
402 * Function : fillPucchResourceInfo
404 * Function to fill Pucch Resource Info
406 * @param[in] SchPucchInfo *schPucchInfo, Inst inst
407 * @return ROK/RFAILED
410 uint16_t fillPucchResourceInfo(uint8_t ueId, SchPucchInfo *schPucchInfo, Inst inst, SlotTimingInfo slotInfo)
412 uint8_t ret = ROK, ueIdx = 0, pucchIdx = 0;
413 SchCellCb *cell = schCb[inst].cells[inst];
414 SchPucchCfgCmn *pucchCfg = NULLP;
415 SchBwpParams *ulBwp = NULLP;
417 SchUeCb *ueCb = NULLP;
423 ueCb = &(cell->ueCb[ueIdx]);
424 if(ueCb->ueDrxInfoPres)
426 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
430 if(cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfgPres)
432 /* fill pucch dedicated cfg */
433 ret = fillUlSchedPucchDedicatedCfg(cell,\
434 &cell->ueCb[ueIdx].ueCfg.spCellCfg.servCellRecfg.initUlBwp.pucchCfg, &slotInfo, schPucchInfo);
437 memset(schPucchInfo, 0, sizeof(SchPucchInfo));
438 DU_LOG("\nERROR --> SCH : Filling PUCCH dedicated cfg failed at fillPucchResourceInfo()");
444 /* fill pucch common cfg */
445 /* derive pucchResourceSet from schCellCfg */
446 pucchCfg = &cell->cellCfg.ulCfgCommon.schInitialUlBwp.pucchCommon;
447 pucchIdx = pucchCfg->pucchResourceCommon;
448 ulBwp = &cell->cellCfg.ulCfgCommon.schInitialUlBwp.bwp;
449 startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
450 ret = allocatePrbUl(cell, slotInfo, pucchResourceSet[pucchIdx][1], pucchResourceSet[pucchIdx][2],\
451 &startPrb, PUCCH_NUM_PRB_FORMAT_0_1_4);
454 schPucchInfo->fdAlloc.startPrb = ulBwp->freqAlloc.startPrb + pucchResourceSet[pucchIdx][3];
455 schPucchInfo->fdAlloc.numPrb = PUCCH_NUM_PRB_FORMAT_0_1_4;
456 schPucchInfo->tdAlloc.startSymb = pucchResourceSet[pucchIdx][1];
457 schPucchInfo->tdAlloc.numSymb = pucchResourceSet[pucchIdx][2];
458 schPucchInfo->pucchFormat = pucchResourceSet[pucchIdx][0];
460 /* set SR and UCI flag to false */
461 schPucchInfo->srFlag = true;
468 * @brief resource allocation for UL
472 * Function : schUlResAlloc
474 * This function handles UL Resource allocation
476 * @param[in] SchCellCb *cell, cellCb
479 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst)
485 UlSchedInfo ulSchedInfo;
486 SchUlSlotInfo *schUlSlotInfo = NULLP;
487 SlotTimingInfo ulTimingInfo;
488 CmLList *node = NULLP;
489 TotalPrbUsage *ulTotalPrbUsage = NULLP;
491 memset(&ulSchedInfo, 0, sizeof(UlSchedInfo));
494 ADD_DELTA_TO_TIME(cell->slotInfo,ulTimingInfo,PHY_DELTA_UL+SCHED_DELTA, cell->numSlots);
496 ulSchedInfo.cellId = cell->cellId;
497 ulSchedInfo.slotIndInfo.cellId = ulSchedInfo.cellId;
498 ulSchedInfo.slotIndInfo.sfn = ulTimingInfo.sfn;
499 ulSchedInfo.slotIndInfo.slot = ulTimingInfo.slot;
501 /* Schedule resources for PRACH */
502 if(cell->firstSib1Transmitted)
503 schPrachResAlloc(cell, &ulSchedInfo, ulTimingInfo);
505 schUlSlotInfo = cell->schUlSlotInfo[ulTimingInfo.slot];
506 if(schUlSlotInfo->schPuschInfo)
508 GET_CRNTI(ulSchedInfo.crnti, schUlSlotInfo->puschUe);
509 /* Check the ue drx status if the UE is active for uplink scheduling or not */
511 ueCb = schGetUeCb(cell, ulSchedInfo.crnti);
512 if(ueCb->ueDrxInfoPres)
514 if(!ueCb->drxUeCb.drxUlUeActiveStatus)
518 ulSchedInfo.dataType |= SCH_DATATYPE_PUSCH;
519 memcpy(&ulSchedInfo.schPuschInfo, schUlSlotInfo->schPuschInfo,
520 sizeof(SchPuschInfo));
521 SCH_FREE(schUlSlotInfo->schPuschInfo, sizeof(SchPuschInfo));
522 schUlSlotInfo->schPuschInfo = NULL;
525 if(schUlSlotInfo->pucchPres)
527 GET_CRNTI(ulSchedInfo.crnti, schUlSlotInfo->pucchUe);
528 ret = fillPucchResourceInfo(schUlSlotInfo->pucchUe, &schUlSlotInfo->schPucchInfo, schInst, ulTimingInfo);
531 ulSchedInfo.dataType |= SCH_DATATYPE_UCI;
532 memcpy(&ulSchedInfo.schPucchInfo, &schUlSlotInfo->schPucchInfo,
533 sizeof(SchPucchInfo));
539 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
542 /* Send msg to MAC */
543 ret = sendUlSchInfoToMac(&ulSchedInfo, schInst);
546 DU_LOG("\nERROR --> SCH : Sending UL Sch info from SCH to MAC failed");
549 /* Update DL PRB Usage for all stats group which requested for DL Total PRB Usage */
550 node = cmLListFirst(&schCb[schInst].statistics.activeKpiList.ulTotPrbUseList);
553 ulTotalPrbUsage = (TotalPrbUsage *)node->node;
554 ulTotalPrbUsage->numPrbUsedForTx += schUlSlotInfo->prbAlloc.numPrbAlloc;
555 ulTotalPrbUsage->totalPrbAvailForTx += MAX_NUM_RB;
559 /* Re-initialize UL Slot */
560 schInitUlSlot(schUlSlotInfo);
564 /*******************************************************************
566 * @brief Fills pdcch and pdsch info for msg4
570 * Function : schDlRsrcAllocMsg4
573 * Fills pdcch and pdsch info for msg4
575 * @params[in] SchCellCb *cell, SlotTimingInfo msg4Time
576 * @params[in] uint8_t ueId, DlMsgSchInfo *dlMsgAlloc
577 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
578 * @params[in] bool isRetx, SchDlHqProcCb *hqP
579 * @return ROK - success
582 * ****************************************************************/
583 uint8_t schDlRsrcAllocMsg4(SchCellCb *cell, SlotTimingInfo msg4Time, uint8_t ueId, DlMsgSchInfo *dlMsgAlloc,\
584 uint8_t pdschStartSymbol, uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP)
586 uint8_t coreset0Idx = 0;
587 uint8_t firstSymbol = 0;
588 uint8_t numSymbols = 0;
589 uint8_t mcs = DEFAULT_MCS; /* MCS fixed to 4 */
590 uint8_t dmrsStartSymbol = 0, startSymbol = 0, numSymbol = 0;
593 SchBwpDlCfg *initialBwp = NULLP;
594 PdcchCfg *pdcch = NULLP;
595 PdschCfg *pdsch = NULLP;
597 DlMsgSchInfo *msg4Alloc = NULLP;
601 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : Cell is NULL");
605 if(dlMsgAlloc == NULL)
607 DU_LOG("\nERROR --> SCH: schDlRsrcAllocMsg4() : dlMsgAlloc is NULL");
611 msg4Alloc = dlMsgAlloc;
612 initialBwp = &cell->cellCfg.dlCfgCommon.schInitialDlBwp;
613 SCH_ALLOC(msg4Alloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
615 if(!msg4Alloc->dlMsgPdcchCfg)
617 DU_LOG("\nERROR --> SCH : Memory allocation failed in %s",__func__);
620 pdcch = msg4Alloc->dlMsgPdcchCfg;
621 bwp = &msg4Alloc->bwp;
622 coreset0Idx = initialBwp->pdcchCommon.commonSearchSpace.coresetId;
624 fillDlMsgInfo(msg4Alloc, cell->raCb[ueId-1].tcrnti, isRetx, hqP);
625 msg4Alloc->dlMsgPduLen = cell->raCb[ueId-1].dlMsgPduLen;
627 /* derive the sib1 coreset0 params from table 13-1 spec 38.213 */
628 numRbs = coresetIdxTable[coreset0Idx][1];
629 numSymbols = coresetIdxTable[coreset0Idx][2];
631 /* calculate time domain parameters */
632 uint16_t mask = 0x2000;
633 for(firstSymbol=0; firstSymbol<MAX_SYMB_PER_SLOT; firstSymbol++)
635 if(initialBwp->pdcchCommon.commonSearchSpace.monitoringSymbol & mask)
642 bwp->freqAlloc.numPrb = initialBwp->bwp.freqAlloc.numPrb;
643 bwp->freqAlloc.startPrb = initialBwp->bwp.freqAlloc.startPrb;
644 bwp->subcarrierSpacing = initialBwp->bwp.scs;
645 bwp->cyclicPrefix = initialBwp->bwp.cyclicPrefix;
647 /* fill the PDCCH PDU */
648 pdcch->coresetCfg.startSymbolIndex = firstSymbol;
649 pdcch->coresetCfg.durationSymbols = numSymbols;
650 memcpy(pdcch->coresetCfg.freqDomainResource, \
651 cell->cellCfg.dlCfgCommon.schInitialDlBwp.pdcchCommon.commonSearchSpace.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
653 pdcch->coresetCfg.cceRegMappingType = 1; /* coreset0 is always interleaved */
654 pdcch->coresetCfg.regBundleSize = 6; /* spec-38.211 sec 7.3.2.2 */
655 pdcch->coresetCfg.interleaverSize = 2; /* spec-38.211 sec 7.3.2.2 */
656 pdcch->coresetCfg.coreSetType = 0;
657 pdcch->coresetCfg.coreSetSize = numRbs;
658 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
659 pdcch->coresetCfg.precoderGranularity = 0; /* sameAsRegBundle */
661 pdcch->dci[0].rnti = cell->raCb[ueId-1].tcrnti;
662 pdcch->dci[0].scramblingId = cell->cellCfg.phyCellId;
663 pdcch->dci[0].scramblingRnti = 0;
664 pdcch->dci[0].cceIndex = 4; /* considering SIB1 is sent at cce 0-1-2-3 */
665 pdcch->dci[0].aggregLevel = 4;
666 pdcch->dci[0].beamPdcchInfo.numPrgs = 1;
667 pdcch->dci[0].beamPdcchInfo.prgSize = 1;
668 pdcch->dci[0].beamPdcchInfo.digBfInterfaces = 0;
669 pdcch->dci[0].beamPdcchInfo.prg[0].pmIdx = 0;
670 pdcch->dci[0].beamPdcchInfo.prg[0].beamIdx[0] = 0;
671 pdcch->dci[0].txPdcchPower.beta_pdcch_1_0 = 0;
672 pdcch->dci[0].txPdcchPower.powerControlOffsetSS = 0;
673 pdsch = &pdcch->dci[0].pdschCfg;
675 /* fill the PDSCH PDU */
677 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
678 pdsch->rnti = cell->raCb[ueId-1].tcrnti;
680 pdsch->numCodewords = 1;
681 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
683 pdsch->codeword[cwCount].targetCodeRate = 308;
684 pdsch->codeword[cwCount].qamModOrder = 2;
685 pdsch->codeword[cwCount].mcsIndex = mcs; /* mcs configured to 4 */
686 pdsch->codeword[cwCount].mcsTable = 0; /* notqam256 */
689 tbSize = schCalcTbSize(msg4Alloc->dlMsgPduLen + TX_PAYLOAD_HDR_LEN); /* MSG4 size + FAPI header size*/
690 hqP->tbInfo[cwCount].tbSzReq = tbSize;
691 pdsch->codeword[cwCount].rvIndex = 0;
695 pdsch->codeword[cwCount].rvIndex = (pdsch->codeword[cwCount].rvIndex +1) & 0x03;
696 tbSize = hqP->tbInfo[cwCount].tbSzReq;
698 pdsch->codeword[cwCount].tbSize = tbSize;
700 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
701 pdsch->numLayers = 1;
702 pdsch->transmissionScheme = 0;
704 pdsch->dmrs.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
705 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
706 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
707 pdsch->dmrs.scid = 0;
708 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
709 pdsch->dmrs.dmrsPorts = 0;
710 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
711 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
712 pdsch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
714 pdsch->pdschTimeAlloc.startSymb = pdschStartSymbol;
715 pdsch->pdschTimeAlloc.numSymb = pdschNumSymbols;
717 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
718 pdsch->pdschFreqAlloc.startPrb = MAX_NUM_RB;
719 pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, pdschNumSymbols);
720 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
722 /* Find total symbols occupied including DMRS */
723 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
724 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
725 * in that case only PDSCH symbols are marked as occupied */
726 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
728 startSymbol = pdsch->pdschTimeAlloc.startSymb;
729 numSymbol = pdsch->pdschTimeAlloc.numSymb;
731 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
734 startSymbol = dmrsStartSymbol;
735 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb;
738 /* Allocate the number of PRBs required for RAR PDSCH */
739 if((allocatePrbDl(cell, msg4Time, startSymbol, numSymbol,\
740 &pdsch->pdschFreqAlloc.startPrb, pdsch->pdschFreqAlloc.numPrb)) != ROK)
742 DU_LOG("\nERROR --> SCH : Resource allocation failed for MSG4");
743 SCH_FREE(msg4Alloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
747 pdsch->beamPdschInfo.numPrgs = 1;
748 pdsch->beamPdschInfo.prgSize = 1;
749 pdsch->beamPdschInfo.digBfInterfaces = 0;
750 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
751 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
752 pdsch->txPdschPower.powerControlOffset = 0;
753 pdsch->txPdschPower.powerControlOffsetSS = 0;
758 /*******************************************************************
760 * @brief Scheduling for Pucch Resource
764 * Function : schAllocPucchResource
767 * Scheduling for Pucch Resource
769 * @params[in] SchCellCb *cell, SlotTimingInfo pucchTime, crnti
770 * @params[in] SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP
771 * @return ROK - success
774 *******************************************************************/
776 uint16_t schAllocPucchResource(SchCellCb *cell, SlotTimingInfo pucchTime, uint16_t crnti,
777 SchUeCb *ueCb, bool isRetx, SchDlHqProcCb *hqP)
779 uint16_t pucchSlot = 0;
780 SchUlSlotInfo *schUlSlotInfo = NULLP;
782 pucchSlot = pucchTime.slot;
783 schUlSlotInfo = cell->schUlSlotInfo[pucchSlot];
784 memset(&schUlSlotInfo->schPucchInfo, 0, sizeof(SchPucchInfo));
786 schUlSlotInfo->pucchPres = true;
789 /* set HARQ flag to true */
790 schUlSlotInfo->schPucchInfo.harqInfo.harqBitLength = 1; /* 1 bit for HARQ */
791 ADD_DELTA_TO_TIME(pucchTime, pucchTime, 3, cell->numSlots); /* SLOT_DELAY=3 */
792 cmLListAdd2Tail(&(ueCb->hqDlmap[pucchTime.slot]->hqList), &hqP->ulSlotLnk);
797 /*******************************************************************
799 * @brief Fills pdcch and pdsch info for dedicated DL msg
803 * Function : schDlRsrcAllocDlMsg
806 * Fills pdcch and pdsch info for dl msg
808 * @params[in] SchCellCb *cell, SlotTimingInfo slotTime
809 * @params[in] uint16_t crnti, uint32_t tbSize
810 * @params[in] DlMsgSchInfo *dlMsgAlloc, uint16_t startPRB
811 * @params[in] uint8_t pdschStartSymbol, uint8_t pdschNumSymbols
812 * @params[in] bool isRetx, SchDlHqProcCb *hqP
813 * @return ROK - success
816 * ****************************************************************/
817 uint8_t schDlRsrcAllocDlMsg(SchCellCb *cell, SlotTimingInfo slotTime, uint16_t crnti,
818 uint32_t tbSize, DlMsgSchInfo *dlMsgAlloc, uint16_t startPRB, uint8_t pdschStartSymbol,
819 uint8_t pdschNumSymbols, bool isRetx, SchDlHqProcCb *hqP, SchPdcchAllocInfo pdcchAllocInfo)
821 uint8_t ueId=0, ssIdx = 0, cRSetIdx = 0;;
822 uint8_t cwCount = 0, rbgCount = 0, pdcchStartSymbol = 0;
823 PdcchCfg *pdcch = NULLP;
824 PdschCfg *pdsch = NULLP;
827 SchControlRsrcSet coreset1;
828 SchSearchSpace searchSpace;
829 SchPdschConfig pdschCfg;
830 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
832 SCH_ALLOC(dlMsgAlloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
833 if(!dlMsgAlloc->dlMsgPdcchCfg)
835 DU_LOG("\nERROR --> SCH : Memory allocation failed in schDlRsrcAllocDlMsg");
838 pdcch = dlMsgAlloc->dlMsgPdcchCfg;
839 bwp = &dlMsgAlloc->bwp;
841 GET_UE_ID(crnti, ueId);
842 ueCb = cell->ueCb[ueId-1];
844 for(cRSetIdx = 0; cRSetIdx < ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.numCRsetToAddMod; cRSetIdx++)
846 if(ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.cRSetToAddModList[cRSetIdx].cRSetId\
847 == pdcchAllocInfo.cRSetId)
849 coreset1 = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.cRSetToAddModList[cRSetIdx];
853 for(ssIdx = 0; ssIdx < ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.numSearchSpcToAddMod; ssIdx++)
855 if(ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.searchSpcToAddModList[ssIdx].searchSpaceId\
856 == pdcchAllocInfo.ssId)
858 searchSpace = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg.searchSpcToAddModList[ssIdx];
862 pdschCfg = ueCb.ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdschCfg;
865 bwp->freqAlloc.numPrb = MAX_NUM_RB;
866 bwp->freqAlloc.startPrb = 0;
867 bwp->subcarrierSpacing = cell->sib1SchCfg.bwp.subcarrierSpacing;
868 bwp->cyclicPrefix = cell->sib1SchCfg.bwp.cyclicPrefix;
870 /* fill the PDCCH PDU */
871 /*StartSymbol of PDCCH*/
872 pdcchStartSymbol = findSsStartSymbol(searchSpace.mSymbolsWithinSlot);
873 if(pdcchStartSymbol < MAX_SYMB_PER_SLOT)
874 pdcch->coresetCfg.startSymbolIndex = pdcchStartSymbol;
877 DU_LOG("\nERROR --> SCH : Invalid SymbolIndex in schDlRsrcAllocDlMsg");
880 pdcch->coresetCfg.durationSymbols = coreset1.duration;
881 memcpy(pdcch->coresetCfg.freqDomainResource, coreset1.freqDomainRsrc, FREQ_DOM_RSRC_SIZE);
882 pdcch->coresetCfg.cceRegMappingType = coreset1.cceRegMappingType; /* non-interleaved */
883 pdcch->coresetCfg.regBundleSize = 6; /* must be 6 for non-interleaved */
884 pdcch->coresetCfg.interleaverSize = 0; /* NA for non-interleaved */
885 pdcch->coresetCfg.coreSetType = 1; /* non PBCH coreset */
887 /*Size of coreset: Number of PRBs in a coreset*/
888 rbgCount = countRBGFrmCoresetFreqRsrc(coreset1.freqDomainRsrc);
891 pdcch->coresetCfg.coreSetSize = ((rbgCount) * NUM_PRBS_PER_RBG);
895 DU_LOG("\nERROR --> SCH : CORESETSize is zero in schDlRsrcAllocDlMsg");
899 pdcch->coresetCfg.shiftIndex = cell->cellCfg.phyCellId;
900 pdcch->coresetCfg.precoderGranularity = coreset1.precoderGranularity;
901 if(pdcch->numDlDci >= MAX_NUM_PDCCH)
903 DU_LOG("\nERROR --> SCH: MAX number of PDCCH allocted for this slot.");
906 pdcch->dci[pdcch->numDlDci].rnti = ueCb.crnti;
907 pdcch->dci[pdcch->numDlDci].scramblingId = cell->cellCfg.phyCellId;
908 pdcch->dci[pdcch->numDlDci].scramblingRnti = 0;
910 /*TODO below assumptions of CCE Index is wrong:
911 * Range 0 to 135 as per ORAN.WG8.AAD Table 9-35 CORESET configuration and
912 * it has to be calculated using the formula given in 3GPP TS 38.213, Sec 10.1 */
913 pdcch->dci[pdcch->numDlDci].cceIndex = pdcchAllocInfo.cceIndex;
914 pdcch->dci[pdcch->numDlDci].aggregLevel = pdcchAllocInfo.aggLvl;
915 pdcch->dci[pdcch->numDlDci].beamPdcchInfo.numPrgs = 1;
916 pdcch->dci[pdcch->numDlDci].beamPdcchInfo.prgSize = 1;
917 pdcch->dci[pdcch->numDlDci].beamPdcchInfo.digBfInterfaces = 0;
918 pdcch->dci[pdcch->numDlDci].beamPdcchInfo.prg[0].pmIdx = 0;
919 pdcch->dci[pdcch->numDlDci].beamPdcchInfo.prg[0].beamIdx[0] = 0;
920 pdcch->dci[pdcch->numDlDci].txPdcchPower.beta_pdcch_1_0 = 0;
921 pdcch->dci[pdcch->numDlDci].txPdcchPower.powerControlOffsetSS = 0;
923 pdsch = &pdcch->dci[pdcch->numDlDci].pdschCfg;
926 pdsch->pduBitmap = 0; /* PTRS and CBG params are excluded */
927 pdsch->rnti = ueCb.crnti;
929 pdsch->numCodewords = 1;
930 for(cwCount = 0; cwCount < pdsch->numCodewords; cwCount++)
932 pdsch->codeword[cwCount].targetCodeRate = 308;
933 pdsch->codeword[cwCount].qamModOrder = ueCb.ueCfg.dlModInfo.modOrder;
934 pdsch->codeword[cwCount].mcsIndex = ueCb.ueCfg.dlModInfo.mcsIndex;
935 pdsch->codeword[cwCount].mcsTable = ueCb.ueCfg.dlModInfo.mcsTable;
936 pdsch->codeword[cwCount].rvIndex = 0;
940 tbSize +=TX_PAYLOAD_HDR_LEN;
941 hqP->tbInfo[cwCount].tbSzReq = tbSize;
943 pdsch->codeword[cwCount].tbSize = tbSize;
945 pdsch->dataScramblingId = cell->cellCfg.phyCellId;
946 pdsch->numLayers = 1;
947 pdsch->transmissionScheme = 0;
949 pdsch->dmrs.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
950 pdsch->dmrs.dmrsConfigType = 0; /* type-1 */
951 pdsch->dmrs.dlDmrsScramblingId = cell->cellCfg.phyCellId;
952 pdsch->dmrs.scid = 0;
953 pdsch->dmrs.numDmrsCdmGrpsNoData = 1;
954 pdsch->dmrs.dmrsPorts = 0;
955 pdsch->dmrs.mappingType = DMRS_MAP_TYPE_A; /* Setting to Type-A */
956 pdsch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
957 pdsch->dmrs.dmrsAddPos = pdschCfg.dmrsDlCfgForPdschMapTypeA.addPos;
959 pdsch->pdschTimeAlloc.startSymb = pdschStartSymbol;
960 pdsch->pdschTimeAlloc.numSymb = pdschNumSymbols;
962 pdsch->pdschFreqAlloc.vrbPrbMapping = 0; /* non-interleaved */
963 pdsch->pdschFreqAlloc.resourceAllocType = 1; /* RAT type-1 RIV format */
964 pdsch->pdschFreqAlloc.startPrb = startPRB; /*Start PRB will be already known*/
965 pdsch->pdschFreqAlloc.numPrb = schCalcNumPrb(tbSize, ueCb.ueCfg.dlModInfo.mcsIndex, pdschNumSymbols);
967 /* Find total symbols occupied including DMRS */
968 dmrsStartSymbol = findDmrsStartSymbol(pdsch->dmrs.dlDmrsSymbPos);
969 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
970 * in that case only PDSCH symbols are marked as occupied */
971 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
973 startSymbol = pdsch->pdschTimeAlloc.startSymb;
974 numSymbol = pdsch->pdschTimeAlloc.numSymb;
976 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
979 startSymbol = dmrsStartSymbol;
980 numSymbol = pdsch->dmrs.nrOfDmrsSymbols + pdsch->pdschTimeAlloc.numSymb;
983 /* Allocate the number of PRBs required for DL PDSCH */
984 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
985 &pdsch->pdschFreqAlloc.startPrb, pdsch->pdschFreqAlloc.numPrb)) != ROK)
987 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
988 SCH_FREE(dlMsgAlloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
992 pdsch->beamPdschInfo.numPrgs = 1;
993 pdsch->beamPdschInfo.prgSize = 1;
994 pdsch->beamPdschInfo.digBfInterfaces = 0;
995 pdsch->beamPdschInfo.prg[0].pmIdx = 0;
996 pdsch->beamPdschInfo.prg[0].beamIdx[0] = 0;
997 pdsch->txPdschPower.powerControlOffset = 0;
998 pdsch->txPdschPower.powerControlOffsetSS = 0;
1003 /*******************************************************************
1005 * @brief Fills k0 and k1 information table for FDD
1009 * Function : BuildK0K1TableForFdd
1012 * Fills k0 and k1 information table for FDD
1014 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1015 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1016 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1017 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1018 * @return ROK - success
1021 * ****************************************************************/
1022 void BuildK0K1TableForFdd(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres,SchPdschCfgCmn pdschCmnCfg,\
1023 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1026 uint8_t k1TmpVal =0, cfgIdx=0;
1027 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, numTimeDomAlloc=0;
1029 /* TODO Commented these below lines for resolving warnings. Presently these variable are not
1030 * required but this will require for harq processing */
1031 // uint8_t k0TmpVal = 0;
1032 // SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1033 // SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1035 /* Initialization the structure and storing the total slot values. */
1036 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1037 k0K1InfoTbl->tblSize = cell->numSlots;
1039 /* Storing time domain resource allocation list based on common or dedicated configuration. */
1040 if(pdschCfgCmnPres == true)
1042 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1043 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1045 /*TODO uncomment this line during harq processing */
1046 //cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1051 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1052 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1054 /*TODO uncomment this line during harq processing */
1055 //dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1059 /* Checking all the slots for K0 and K1 values. */
1060 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1063 /* Storing the values of k0 based on time domain resource
1064 * allocation list. If the value is unavailable then fill default values,
1065 * As per 38.331 PDSCH-TimeDomainResourceAllocation field descriptions. */
1066 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1068 /* TODO These if 0 we will remove during harq processing */
1070 if(pdschCfgCmnPres == true)
1072 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1076 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1078 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1082 k0TmpVal = DEFAULT_K0_VALUE;
1086 /* Checking all the Ul Alloc values. If value is less than MIN_NUM_K1_IDX
1087 * then skip else continue storing the values. */
1089 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1091 k1TmpVal = UlAckTbl[k1Index];
1092 if(k1TmpVal <= MIN_NUM_K1_IDX)
1097 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1098 /* TODO Store K1 index where harq feedback will be received in harq table. */
1102 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1103 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1109 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1114 /*******************************************************************
1116 * @brief Fills k0 and k1 information table
1120 * Function : BuildK0K1Table
1123 * Fills K0 and k1 information table
1125 * @params[in] SchCellCb *cell,SchK0K1TimingInfoTbl *k0K1InfoTbl,bool
1126 * pdschCfgCmnPres,uint8_t numTimeDomAlloc, SchPdschCfgCmnTimeDomRsrcAlloc
1127 * cmnTimeDomRsrcAllocList[], SchPdschTimeDomRsrcAlloc
1128 * dedTimeDomRsrcAllocList[], uint8_t ulAckListCount, uint8_t *UlAckTbl
1129 * @return ROK - success
1132 * ****************************************************************/
1133 void BuildK0K1Table(SchCellCb *cell, SchK0K1TimingInfoTbl *k0K1InfoTbl, bool pdschCfgCmnPres, SchPdschCfgCmn pdschCmnCfg,\
1134 SchPdschConfig pdschDedCfg, uint8_t ulAckListCount, uint8_t *UlAckTbl)
1139 bool ulSlotPresent = false;
1140 uint8_t k0TmpVal = 0, k1TmpVal =0, tmpSlot=0, startSymbol=0, endSymbol=0, checkSymbol=0;
1141 uint8_t slotIdx=0, k0Index=0, k1Index=0, numK0=0, numK1=0, cfgIdx=0, numTimeDomAlloc =0, totalCfgSlot =0;
1142 SchPdschCfgCmnTimeDomRsrcAlloc cmnTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1143 SchPdschTimeDomRsrcAlloc dedTimeDomRsrcAllocList[MAX_NUM_DL_ALLOC];
1146 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1148 BuildK0K1TableForFdd(cell, k0K1InfoTbl, pdschCfgCmnPres, pdschCmnCfg, pdschDedCfg, ulAckListCount, UlAckTbl);
1154 /* Initialization the K0K1 structure, total num of slot and calculating the slot pattern length. */
1155 memset(k0K1InfoTbl, 0, sizeof(SchK0K1TimingInfoTbl));
1156 k0K1InfoTbl->tblSize = cell->numSlots;
1157 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod);
1159 /* Storing time domain resource allocation list based on common or
1160 * dedicated configuration availability. */
1161 if(pdschCfgCmnPres == true)
1163 numTimeDomAlloc = pdschCmnCfg.numTimeDomAlloc;
1164 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1166 cmnTimeDomRsrcAllocList[cfgIdx] = pdschCmnCfg.timeDomRsrcAllocList[cfgIdx];
1171 numTimeDomAlloc = pdschDedCfg.numTimeDomRsrcAlloc;
1172 for(cfgIdx = 0; cfgIdx<numTimeDomAlloc; cfgIdx++)
1174 dedTimeDomRsrcAllocList[cfgIdx] = pdschDedCfg.timeDomRsrcAllociList[cfgIdx];
1178 /* Checking all possible indexes for K0 and K1 values. */
1179 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1181 /* If current slot is UL or FLEXI then Skip because PDCCH is sent only in DL slots. */
1182 slotCfg = schGetSlotSymbFrmt(slotIdx%totalCfgSlot, cell->slotFrmtBitMap);
1183 if(slotCfg == UL_SLOT || slotCfg == FLEXI_SLOT)
1188 ulSlotPresent = false;
1189 /* Storing K0 , start symbol and length symbol for further processing.
1190 * If K0 value is not available then we can fill the default values
1191 * given in spec 38.331. */
1193 for(k0Index = 0; ((k0Index < numTimeDomAlloc) && (k0Index < MAX_NUM_K0_IDX)); k0Index++)
1195 if(pdschCfgCmnPres == true)
1197 k0TmpVal = cmnTimeDomRsrcAllocList[k0Index].k0;
1198 startSymbol = cmnTimeDomRsrcAllocList[k0Index].startSymbol;
1199 endSymbol = startSymbol + cmnTimeDomRsrcAllocList[k0Index].lengthSymbol;
1203 if(dedTimeDomRsrcAllocList[k0Index].k0 != NULLP)
1205 k0TmpVal = *(dedTimeDomRsrcAllocList[k0Index].k0);
1209 k0TmpVal = DEFAULT_K0_VALUE;
1211 startSymbol = dedTimeDomRsrcAllocList[k0Index].startSymbol;
1212 endSymbol = startSymbol + dedTimeDomRsrcAllocList[k0Index].symbolLength;
1215 /* If current slot + k0 is UL then skip the slot
1216 * else if it is DL slot then continue the next steps
1217 * else if it is a FLEXI slot then check symbols of slot, It should not
1218 * contain any UL slot. */
1219 tmpSlot = (slotIdx+k0TmpVal) % totalCfgSlot;
1220 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1221 if(slotCfg == UL_SLOT)
1225 if(slotCfg == FLEXI_SLOT)
1227 for(checkSymbol = startSymbol; checkSymbol<endSymbol; checkSymbol ++)
1229 slotCfg = cell->slotCfg[tmpSlot][checkSymbol];
1230 if(slotCfg == UL_SLOT)
1232 ulSlotPresent = true;
1236 if(ulSlotPresent == true)
1242 ulSlotPresent = false; //Re-initializing
1244 /* If current slot + k0 + k1 is a DL slot then skip the slot
1245 * else if it is UL slot then store the information
1246 * else if it is FLEXI slot then check the symbols, it must have
1247 * at least one UL symbol. */
1249 for(k1Index = 0; k1Index < ulAckListCount; k1Index++)
1251 k1TmpVal = UlAckTbl[k1Index];
1252 if(k1TmpVal > MIN_NUM_K1_IDX)
1254 tmpSlot = (slotIdx+k0TmpVal+k1TmpVal) % totalCfgSlot;
1255 slotCfg = schGetSlotSymbFrmt(tmpSlot, cell->slotFrmtBitMap);
1256 if(slotCfg == DL_SLOT)
1260 if(slotCfg == FLEXI_SLOT)
1262 for(checkSymbol = 0; checkSymbol< MAX_SYMB_PER_SLOT;checkSymbol++)
1264 if(cell->slotCfg[tmpSlot][checkSymbol] == UL_SYMBOL)
1266 ulSlotPresent = true;
1271 if(ulSlotPresent == true || slotCfg == UL_SLOT)
1273 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.k1Indexes[numK1++] = k1Index;
1274 /* TODO Store K1 index where harq feedback will be received
1280 /* Store all the values if all condition satisfies. */
1283 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k1TimingInfo.numK1 = numK1;
1284 k0K1InfoTbl->k0k1TimingInfo[slotIdx].k0Indexes[numK0].k0Index = k0Index;
1290 k0K1InfoTbl->k0k1TimingInfo[slotIdx].numK0 = numK0;
1297 /*******************************************************************
1299 * @brief Fills K2 information table for FDD
1303 * Function : BuildK2InfoTableForFdd
1306 * Fills K2 information table for FDD
1308 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1309 * uint16_t puschSymTblSize,SchK2TimingInfoTbl *k2InfoTbl
1310 * @return ROK - success
1313 * ****************************************************************/
1314 void BuildK2InfoTableForFdd(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1315 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1317 uint16_t slotIdx=0, k2Index=0, k2TmpIdx=0, msg3K2TmpIdx=0;
1319 /* Initialization the structure and storing the total slot values. */
1320 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1321 k2InfoTbl->tblSize = cell->numSlots;
1323 msg3K2InfoTbl->tblSize = cell->numSlots;
1325 /* Checking all possible indexes for K2. */
1326 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1328 /* Storing K2 values. */
1329 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1331 k2TmpIdx= k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1332 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[k2TmpIdx] = k2Index;
1333 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1335 /* Updating K2 values for MSG3 */
1338 msg3K2TmpIdx = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1339 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[msg3K2TmpIdx] = k2Index;
1340 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1346 /*******************************************************************
1348 * @brief Fills K2 information table
1352 * Function : BuildK2InfoTable
1355 * Fills K2 information table
1357 * @params[in] SchCellCb *cell,SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[],
1358 * uint16_t puschSymTblSize, SchK2TimingInfoTbl *k2InfoTbl
1359 * @return ROK - success
1362 * ****************************************************************/
1363 void BuildK2InfoTable(SchCellCb *cell, SchPuschTimeDomRsrcAlloc timeDomRsrcAllocList[], uint16_t puschSymTblSize,\
1364 SchK2TimingInfoTbl *msg3K2InfoTbl, SchK2TimingInfoTbl *k2InfoTbl)
1368 bool dlSymbolPresent = false;
1369 uint8_t slotIdx=0, k2Index=0, k2Val=0, k2TmpVal=0, msg3K2TmpVal=0, msg3Delta=0, numK2 =0, currentSymbol =0;
1370 uint8_t startSymbol =0, endSymbol =0, checkSymbol=0, totalCfgSlot=0, slotCfg=0;
1371 SlotConfig currentSlot;
1374 if(cell->cellCfg.dupMode == DUPLEX_MODE_FDD)
1376 BuildK2InfoTableForFdd(cell, timeDomRsrcAllocList, puschSymTblSize, msg3K2InfoTbl, k2InfoTbl);
1382 /* Initialization the structure and storing the total slot values. */
1383 memset(k2InfoTbl, 0, sizeof(SchK2TimingInfoTbl));
1384 k2InfoTbl->tblSize = cell->numSlots;
1386 msg3K2InfoTbl->tblSize = cell->numSlots;
1387 totalCfgSlot = calculateSlotPatternLength(cell->cellCfg.ssbScs, cell->cellCfg.tddCfg.tddPeriod);
1389 /* Checking all possible indexes for K2. */
1390 for(slotIdx = 0; slotIdx < cell->numSlots; slotIdx++)
1392 currentSlot = schGetSlotSymbFrmt(slotIdx % totalCfgSlot, cell->slotFrmtBitMap);
1394 /* If current slot is UL then skip because PDCCH is sent only in DL slots */
1395 if(currentSlot != UL_SLOT)
1397 for(k2Index = 0; ((k2Index < puschSymTblSize) && (k2Index < MAX_NUM_K2_IDX)); k2Index++)
1399 /* Storing k2, startSymbol, endSymbol information for further processing.
1400 * If k2 is absent then fill the default values given in spec 38.331
1401 * PUSCH-TimeDomainResourceAllocationList field descriptions */
1402 k2Val = timeDomRsrcAllocList[k2Index].k2;
1405 switch(cell->cellCfg.ssbScs)
1408 k2Val = DEFAULT_K2_VALUE_FOR_SCS15;
1411 k2Val = DEFAULT_K2_VALUE_FOR_SCS30;
1414 k2Val = DEFAULT_K2_VALUE_FOR_SCS60;
1417 k2Val = DEFAULT_K2_VALUE_FOR_SCS120;
1422 /* Current slot + k2 should be either UL or FLEXI slot.
1423 * If slot is FLEXI then check all the symbols of that slot,
1424 * it should not contain any DL or FLEXI slot */
1425 k2TmpVal = (slotIdx + k2Val) % totalCfgSlot;
1426 slotCfg = schGetSlotSymbFrmt(k2TmpVal, cell->slotFrmtBitMap);
1427 if(slotCfg != DL_SLOT)
1429 if(slotCfg == FLEXI_SLOT)
1431 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1432 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1433 dlSymbolPresent = false;
1434 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1436 currentSymbol = cell->slotCfg[k2TmpVal][checkSymbol];
1437 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1439 dlSymbolPresent = true;
1444 /* Store all the values if all condition satisfies. */
1445 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1447 numK2 = k2InfoTbl->k2TimingInfo[slotIdx].numK2;
1448 k2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1449 k2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1455 msg3Delta = puschDeltaTable[cell->numerology];
1457 /* Check for K2 for MSG3 */
1458 /* Current slot + k2 should be either UL or FLEXI slot.
1459 * If slot is FLEXI then check all the symbols of that slot,
1460 * it should not contain any DL or FLEXI slot */
1461 msg3K2TmpVal = (slotIdx + k2Val + msg3Delta) % totalCfgSlot;
1462 slotCfg = schGetSlotSymbFrmt(msg3K2TmpVal, cell->slotFrmtBitMap);
1463 if(slotCfg != DL_SLOT)
1465 if(slotCfg == FLEXI_SLOT)
1467 startSymbol = timeDomRsrcAllocList[k2Index].startSymbol;
1468 endSymbol = startSymbol+ timeDomRsrcAllocList[k2Index].symbolLength;
1469 dlSymbolPresent = false;
1470 for(checkSymbol= startSymbol; checkSymbol<endSymbol; checkSymbol++)
1472 currentSymbol = cell->slotCfg[msg3K2TmpVal][checkSymbol];
1473 if(currentSymbol == DL_SLOT || currentSymbol == FLEXI_SLOT)
1475 dlSymbolPresent = true;
1480 /* Store all the values if all condition satisfies. */
1481 if(dlSymbolPresent != true || slotCfg == UL_SLOT)
1483 numK2 = msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2;
1484 msg3K2InfoTbl->k2TimingInfo[slotIdx].k2Indexes[numK2] = k2Index;
1485 msg3K2InfoTbl->k2TimingInfo[slotIdx].numK2++;
1496 /*******************************************************************************************
1498 * @brief Allocate the PRB using RRM policy
1502 * Function : prbAllocUsingRRMPolicy
1505 * [Step1]: Traverse each Node in the LC list
1506 * [Step2]: Check whether the LC has ZERO requirement then clean this LC
1507 * [Step3]: Calcualte the maxPRB for this LC.
1508 * a. For Dedicated LC, maxPRB = sum of remainingReservedPRB and
1510 * b. For Default, just SharedPRB count
1511 * [Step4]: If the LC is the First one to be allocated for this UE then add
1512 * TX_PAYLODN_LEN to reqBO
1513 * [Step5]: Calculate the estimate PRB and estimate BO to be allocated
1514 * based on reqBO and maxPRB left.
1515 * [Step6]: Based on calculated PRB, Update Reserved PRB and Shared PRB counts
1516 * [Step7]: Deduce the reqBO based on allocBO and move the LC node to last.
1517 * [Step8]: Continue the next loop from List->head
1520 * [Exit1]: If all the LCs are allocated in list
1521 * [Exit2]: If PRBs are exhausted
1523 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1524 * I/P > IsDedicatedPRB (Flag to indicate that RESERVED PRB to use
1525 * I/P > mcsIdx and PDSCH symbols count
1526 * I/P & O/P > Shared PRB , reserved PRB Count
1527 * I/P & O/P > Total TBS size accumulated
1528 * I/P & O/P > isTxPayloadLenAdded[For DL] : Decision flag to add the TX_PAYLOAD_HDR_LEN
1529 * I/P & O/P > srRcvd Flag[For UL] : Decision flag to add UL_GRANT_SIZE
1533 * *******************************************************************************************/
1534 void prbAllocUsingRRMPolicy(CmLListCp *lcLL, bool isDedicatedPRB, uint16_t mcsIdx,uint8_t numSymbols,\
1535 uint16_t *sharedPRB, uint16_t *reservedPRB, bool *isTxPayloadLenAdded, bool *srRcvd)
1537 CmLList *node = NULLP;
1538 LcInfo *lcNode = NULLP;
1539 uint16_t remReservedPRB = 0, estPrb = 0, maxPRB = 0;
1543 DU_LOG("\nERROR --> SCH: LcList not present");
1548 /*Only for Dedicated LcList, Valid value will be assigned to remReservedPRB
1549 * For Other LcList, remReservedPRB = 0*/
1550 if(reservedPRB != NULLP && isDedicatedPRB == TRUE)
1552 remReservedPRB = *reservedPRB;
1559 /*For Debugging purpose*/
1562 lcNode = (LcInfo *)node->node;
1564 /* [Step2]: Below condition will hit in rare case as it has been taken care during the cleaning
1565 * process of LCID which was fully allocated. Check is just for safety purpose*/
1566 if(lcNode->reqBO == 0 && lcNode->allocBO == 0)
1568 DU_LOG("\nERROR --> SCH: LCID:%d has no requirement, clearing this node",\
1570 deleteNodeFromLList(lcLL, node);
1571 SCH_FREE(lcNode, sizeof(LcInfo));
1576 /*[Exit1]: All LCs are allocated(allocBO = 0 for fully unallocated LC)*/
1577 if(lcNode->allocBO != 0)
1579 DU_LOG("\nDEBUG --> SCH: All LC are allocated [SharedPRB:%d]",*sharedPRB);
1583 /*[Exit2]: If PRBs are exhausted*/
1586 /*Loop Exit: All resources exhausted*/
1587 if(remReservedPRB == 0 && *sharedPRB == 0)
1589 DU_LOG("\nDEBUG --> SCH: Dedicated resources exhausted for LC:%d",lcNode->lcId);
1595 /*Loop Exit: All resources exhausted*/
1598 DU_LOG("\nDEBUG --> SCH: Default resources exhausted for LC:%d",lcNode->lcId);
1604 maxPRB = remReservedPRB + *sharedPRB;
1607 if((isTxPayloadLenAdded != NULLP) && (*isTxPayloadLenAdded == FALSE))
1609 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes TX_PAYLOAD_HDR_LEN",\
1611 *isTxPayloadLenAdded = TRUE;
1612 lcNode->allocBO = calculateEstimateTBSize((lcNode->reqBO + TX_PAYLOAD_HDR_LEN),\
1613 mcsIdx, numSymbols, maxPRB, &estPrb);
1614 lcNode->allocBO -=TX_PAYLOAD_HDR_LEN;
1616 else if((srRcvd != NULLP) && (*srRcvd == TRUE))
1618 DU_LOG("\nDEBUG --> SCH: LC:%d is the First node to be allocated which includes UL_GRANT_SIZE",\
1621 lcNode->reqBO += UL_GRANT_SIZE;
1622 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO, mcsIdx, numSymbols, maxPRB, &estPrb);
1627 lcNode->allocBO = calculateEstimateTBSize(lcNode->reqBO,\
1628 mcsIdx, numSymbols, maxPRB, &estPrb);
1631 /*[Step6]:Re-adjust the reservedPRB pool count and *SharedPRB Count based on
1632 * estimated PRB allocated*/
1633 if((isDedicatedPRB == TRUE) && (estPrb <= remReservedPRB))
1635 remReservedPRB = remReservedPRB - estPrb;
1637 else /*LC requirement need PRB share from SharedPRB*/
1639 if(*sharedPRB <= (estPrb - remReservedPRB))
1641 DU_LOG("\nDEBUG --> SCH: SharedPRB is less");
1646 *sharedPRB = *sharedPRB - (estPrb - remReservedPRB);
1652 lcNode->reqBO -= lcNode->allocBO; /*Update the reqBO with remaining bytes unallocated*/
1653 lcNode->allocPRB = estPrb;
1654 cmLListAdd2Tail(lcLL, cmLListDelFrm(lcLL, node));
1656 /*[Step8]:Next loop: First LC to be picked from the list
1657 * because Allocated Nodes are moved to the last*/
1664 /*******************************************************************************************
1666 * @brief Check the LC List and fill the LC and GrantSize to be sent to MAC as
1671 * Function : updateGrantSizeForBoRpt
1674 * Check the LC List and fill the LC and GrantSize to be sent to MAC as
1675 * BO Report in dlMsgAlloc Pointer
1677 * @params[in] I/P > lcLinkList pointer (LcInfo list)
1678 * I/P & O/P > dlMsgAlloc[for DL](Pending LC to be added in this context)
1679 * I/P & O/P > BsrInfo (applicable for UL)
1680 * I/P & O/P > accumalatedBOSize
1683 * *******************************************************************************************/
1684 void updateGrantSizeForBoRpt(CmLListCp *lcLL, DlMsgSchInfo *dlMsgAlloc,\
1685 BsrInfo *bsrInfo, uint32_t *accumalatedBOSize)
1687 CmLList *node = NULLP, *next = NULLP;
1688 LcInfo *lcNode = NULLP;
1692 DU_LOG("\nERROR --> SCH: LcList not present");
1710 lcNode = (LcInfo *)node->node;
1713 DU_LOG("\nINFO --> SCH : LcID:%d, [reqBO, allocBO, allocPRB]:[%d,%d,%d]",\
1714 lcNode->lcId, lcNode->reqBO, lcNode->allocBO, lcNode->allocPRB);
1715 if(dlMsgAlloc != NULLP)
1718 /*Add this LC to dlMsgAlloc so that if this LC gets allocated, BO
1719 * report for allocation can be sent to MAC*/
1720 dlMsgAlloc->numOfTbs = 1;
1721 dlMsgAlloc->transportBlock[0].lcSchInfo[dlMsgAlloc->transportBlock[0].numLc].lcId = lcNode->lcId;
1722 dlMsgAlloc->transportBlock[0].lcSchInfo[dlMsgAlloc->transportBlock[0].numLc].schBytes = lcNode->allocBO;
1724 /*Calculate the Total Payload/BO size allocated*/
1725 *accumalatedBOSize += dlMsgAlloc->transportBlock[0].lcSchInfo[dlMsgAlloc->transportBlock[0].numLc].schBytes;
1727 DU_LOG("\nINFO --> SCH: Added in MAC BO report: LCID:%d,reqBO:%d,Idx:%d, TotalBO Size:%d",\
1728 lcNode->lcId,lcNode->reqBO, dlMsgAlloc->transportBlock[0].numLc, *accumalatedBOSize);
1730 dlMsgAlloc->transportBlock[0].numLc++;
1731 handleLcLList(lcLL, lcNode->lcId, DELETE);
1733 else if(bsrInfo != NULLP)
1735 *accumalatedBOSize += lcNode->allocBO;
1736 DU_LOG("\nINFO --> SCH: UL : LCID:%d,reqBO:%d, TotalBO Size:%d",\
1737 lcNode->lcId,lcNode->reqBO, *accumalatedBOSize);
1745 /*******************************************************************
1747 * @brief fill DL message information for MSG4 and Dedicated DL Msg
1751 * Function : fillDlMsgInfo
1754 * fill DL message information for MSG4 and Dedicated DL Msg
1756 * @params[in] DlMsgInfo *dlMsgInfo, uint16_t crnti
1757 * @params[in] bool isRetx, SchDlHqProcCb *hqP
1760 *******************************************************************/
1761 void fillDlMsgInfo(DlMsgSchInfo *dlMsgSchInfo, uint16_t crnti, bool isRetx, SchDlHqProcCb *hqP)
1763 hqP->tbInfo[0].isEnabled = TRUE;
1764 hqP->tbInfo[0].state = HQ_TB_WAITING;
1765 hqP->tbInfo[0].txCntr++;
1766 hqP->tbInfo[1].isEnabled = TRUE;
1767 hqP->tbInfo[1].state = HQ_TB_WAITING;
1768 hqP->tbInfo[1].txCntr++;
1769 dlMsgSchInfo->crnti = crnti;
1770 dlMsgSchInfo->transportBlock[0].ndi = hqP->tbInfo[0].ndi; /*How to handle two tb case?TBD*/
1771 dlMsgSchInfo->harqProcNum = hqP->procId;
1772 dlMsgSchInfo->dlAssignIdx = 0;
1773 dlMsgSchInfo->pucchTpc = 0;
1774 dlMsgSchInfo->pucchResInd = 0;
1775 dlMsgSchInfo->harqFeedbackInd = hqP->k1;
1776 dlMsgSchInfo->dciFormatId = 1;
1779 /*******************************************************************
1781 * @brief sch Process pending Msg4 Req
1785 * Function : schProcessMsg4Req
1788 * sch Process pending Msg4 Req
1790 * @params[in] SchCellCb *cell, cell cb struct pointer
1791 * @params[in] SlotTimingInfo currTime, current timing info
1792 * @params[in] uint8_t ueId, ue ID
1793 * @params[in] bool isRetxMsg4, indicator to MSG4 retransmission
1794 * @params[in] SchDlHqProcCb **msg4HqProc, address of MSG4 HARQ proc pointer
1795 * @return ROK - success
1798 *******************************************************************/
1800 uint8_t schProcessMsg4Req(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetxMsg4, SchDlHqProcCb **msg4HqProc)
1802 uint8_t pdschStartSymbol = 0, pdschNumSymbols = 0;
1803 SlotTimingInfo pdcchTime, pdschTime, pucchTime;
1804 DlMsgSchInfo *dciSlotAlloc = NULLP; /* Stores info for transmission of PDCCH for Msg4 */
1805 DlMsgSchInfo *msg4SlotAlloc = NULLP; /* Stores info for transmission of PDSCH for Msg4 */
1809 DU_LOG("\nERROR --> SCH: schProcessMsg4Req() : Cell is NULL");
1813 if (isRetxMsg4 == FALSE)
1815 if (RFAILED == schDlGetAvlHqProcess(cell, &cell->ueCb[ueId - 1], msg4HqProc))
1817 DU_LOG("\nERROR --> SCH: schProcessMsg4Req() : No process");
1822 if(findValidK0K1Value(cell, currTime, ueId, false, &pdschStartSymbol, &pdschNumSymbols, &pdcchTime, &pdschTime,\
1823 &pucchTime, isRetxMsg4, *msg4HqProc, NULLP) != true )
1825 DU_LOG("\nERROR --> SCH: schProcessMsg4Req() : k0 k1 not found");
1829 if(cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1831 SCH_ALLOC(dciSlotAlloc, sizeof(DlMsgSchInfo));
1832 if(dciSlotAlloc == NULLP)
1834 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc");
1837 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = dciSlotAlloc;
1838 memset(dciSlotAlloc, 0, sizeof(DlMsgSchInfo));
1841 dciSlotAlloc = cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1];
1843 /* Fill PDCCH and PDSCH scheduling information for Msg4 */
1844 if((schDlRsrcAllocMsg4(cell, pdschTime, ueId, dciSlotAlloc, pdschStartSymbol, pdschNumSymbols, isRetxMsg4, *msg4HqProc)) != ROK)
1846 DU_LOG("\nERROR --> SCH: Scheduling of Msg4 failed in slot [%d]", pdschTime.slot);
1847 if(!dciSlotAlloc->dlMsgPdschCfg)
1849 SCH_FREE(dciSlotAlloc, sizeof(DlMsgSchInfo));
1850 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1855 /* Check if both DCI and RAR are sent in the same slot.
1856 * If not, allocate memory RAR PDSCH slot to store RAR info
1858 if(pdcchTime.slot == pdschTime.slot)
1860 SCH_ALLOC(dciSlotAlloc->dlMsgPdschCfg, sizeof(PdschCfg));
1861 if(!dciSlotAlloc->dlMsgPdschCfg)
1863 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciSlotAlloc->dlMsgPdschCfg");
1864 SCH_FREE(dciSlotAlloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
1865 SCH_FREE(dciSlotAlloc, sizeof(DlMsgSchInfo));
1866 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1869 memcpy(dciSlotAlloc->dlMsgPdschCfg, &dciSlotAlloc->dlMsgPdcchCfg->dci[0].pdschCfg, sizeof(PdschCfg));
1873 /* Allocate memory to schedule rarSlot to send RAR, pointer will be checked at schProcessSlotInd() */
1874 if(cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] == NULL)
1876 SCH_ALLOC(msg4SlotAlloc, sizeof(DlMsgSchInfo));
1877 if(msg4SlotAlloc == NULLP)
1879 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc");
1880 SCH_FREE(dciSlotAlloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
1881 if(!dciSlotAlloc->dlMsgPdschCfg)
1883 SCH_FREE(dciSlotAlloc, sizeof(DlMsgSchInfo));
1884 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1888 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = msg4SlotAlloc;
1889 memset(msg4SlotAlloc, 0, sizeof(DlMsgSchInfo));
1892 msg4SlotAlloc = cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1];
1894 /* Copy all msg4 pdschcfg info */
1895 msg4SlotAlloc->crnti =dciSlotAlloc->crnti;
1896 msg4SlotAlloc->bwp = dciSlotAlloc->bwp;
1897 SCH_ALLOC(msg4SlotAlloc->dlMsgPdschCfg, sizeof(PdschCfg));
1898 if(msg4SlotAlloc->dlMsgPdschCfg)
1900 memcpy(msg4SlotAlloc->dlMsgPdschCfg, &dciSlotAlloc->dlMsgPdcchCfg->dci[0].pdschCfg, sizeof(PdschCfg));
1904 SCH_FREE(dciSlotAlloc->dlMsgPdcchCfg, sizeof(PdcchCfg));
1905 if(dciSlotAlloc->dlMsgPdschCfg == NULLP)
1907 SCH_FREE(dciSlotAlloc, sizeof(DlMsgSchInfo));
1908 cell->schDlSlotInfo[pdcchTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1911 SCH_FREE(msg4SlotAlloc, sizeof(DlMsgSchInfo));
1912 cell->schDlSlotInfo[pdschTime.slot]->dlMsgAlloc[ueId-1] = NULLP;
1913 DU_LOG("\nERROR --> SCH : Memory Allocation failed for msg4SlotAlloc->dlMsgPdschCfg");
1918 /* PUCCH resource */
1919 schAllocPucchResource(cell, pucchTime, cell->raCb[ueId-1].tcrnti, &cell->ueCb[ueId-1], isRetxMsg4, *msg4HqProc);
1921 cell->schDlSlotInfo[pdcchTime.slot]->pdcchUe = ueId;
1922 cell->schUlSlotInfo[pucchTime.slot]->pucchUe = ueId;
1923 cell->raCb[ueId-1].msg4recvd = FALSE;
1926 cell->ueCb[ueId-1].retxMsg4HqProc= NULLP;
1931 /*******************************************************************
1933 * @brief sch Process pending Sr or Bsr Req
1937 * Function : updateBsrAndLcList
1940 * Updating the BSRInfo in UECB and Lclist
1942 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
1943 * @return ROK - success
1946 *******************************************************************/
1947 void updateBsrAndLcList(CmLListCp *lcLL, BsrInfo *bsrInfo, uint8_t status)
1949 CmLList *node = NULLP, *next = NULLP;
1950 LcInfo *lcNode = NULLP;
1954 DU_LOG("\nERROR --> SCH: LcList not present");
1971 lcNode = (LcInfo *)node->node;
1974 /*Only when Status is OK then allocation is marked as ZERO and reqBO
1975 * is updated in UE's DB. If Failure, then allocation is added to reqBO
1976 * and same is updated in Ue's DB inside BSR Info structure*/
1979 lcNode->allocBO = 0;
1982 lcNode->reqBO += lcNode->allocBO;
1983 bsrInfo[lcNode->lcId].dataVol = lcNode->reqBO;
1984 if(lcNode->reqBO == 0)
1986 handleLcLList(lcLL, lcNode->lcId, DELETE);
1993 /*******************************************************************
1995 * @brief sch Process pending Sr or Bsr Req
1999 * Function : schProcessSrOrBsrReq
2002 * sch Process pending Sr or Bsr Req
2004 * @params[in] SchCellCb *cell, SlotTimingInfo currTime
2005 * @params[in] uint8_t ueId, Bool isRetx, SchUlHqProcCb **hqP
2006 * @return true - success
2009 *******************************************************************/
2010 bool schProcessSrOrBsrReq(SchCellCb *cell, SlotTimingInfo currTime, uint8_t ueId, bool isRetx, SchUlHqProcCb **hqP)
2012 bool k2Found = FALSE;
2013 uint8_t startSymb = 0, symbLen = 0;
2014 uint8_t k2TblIdx = 0, k2Index = 0, k2Val = 0;
2016 SchK2TimingInfoTbl *k2InfoTbl=NULLP;
2017 SlotTimingInfo dciTime, puschTime;
2021 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : Cell is NULL");
2025 ueCb = &cell->ueCb[ueId-1];
2029 DU_LOG("\nERROR --> SCH: schProcessSrOrBsrReq() : UE is NULL");
2033 if (isRetx == FALSE)
2035 if (schUlGetAvlHqProcess(cell, ueCb, hqP) != ROK)
2041 /* Calculating time frame to send DCI for SR */
2042 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
2044 if(schGetSlotSymbFrmt(dciTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2047 if(ueCb->k2TblPrsnt)
2048 k2InfoTbl = &ueCb->k2InfoTbl;
2050 k2InfoTbl = &cell->k2InfoTbl;
2052 for(k2TblIdx = 0; k2TblIdx < k2InfoTbl->k2TimingInfo[dciTime.slot].numK2; k2TblIdx++)
2054 k2Index = k2InfoTbl->k2TimingInfo[dciTime.slot].k2Indexes[k2TblIdx];
2056 if(!ueCb->k2TblPrsnt)
2058 k2Val = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
2059 startSymb = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol;
2060 symbLen = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength;
2064 k2Val = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].k2;
2065 startSymb = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].startSymbol;
2066 symbLen = ueCb->ueCfg.spCellCfg.servCellRecfg.initUlBwp.puschCfg.timeDomRsrcAllocList[k2Index].symbolLength;
2068 /* Check for number of Symbol of PUSCH should be same as original in case of transmisson*/
2069 /* Calculating time frame to send PUSCH for SR */
2070 ADD_DELTA_TO_TIME(dciTime, puschTime, k2Val, cell->numSlots);
2072 if(schGetSlotSymbFrmt(puschTime.slot, cell->slotFrmtBitMap) == DL_SLOT)
2075 if(cell->schUlSlotInfo[puschTime.slot]->puschUe != 0)
2082 ADD_DELTA_TO_TIME(puschTime, (*hqP)->puschTime, 0, cell->numSlots);
2090 if(cell->api->SchScheduleUlLc(dciTime, puschTime, startSymb, symbLen, isRetx, hqP) != ROK)
2095 DU_LOG("\nDEBUG --> SCH : schProcessSrOrBsrReq(): K2 value is not found");
2101 /********************************************************************************
2103 * @brief Increment the Slot by a input factor
2107 * Function : schIncrSlot
2110 * Increment the slot by a input factor till num of Slots configured in a
2111 * Radio Frame. If it exceeds, move to next sfn.
2113 * @params[in/out] SlotTimingInfo timingInfo
2114 * [in] uint8_t incr [Increment factor]
2115 * [in] numSlotsPerRF [Number of Slots configured per RF as per
2117 * @return ROK - success
2120 *******************************************************************/
2121 void schIncrSlot(SlotTimingInfo *timingInfo, uint8_t incr, uint16_t numSlotsPerRF)
2123 timingInfo->slot += incr;
2124 if(timingInfo->slot >= numSlotsPerRF)
2126 timingInfo->sfn += timingInfo->slot/numSlotsPerRF;
2127 timingInfo->slot %= numSlotsPerRF;
2128 if(timingInfo->sfn > MAX_SFN)
2130 timingInfo->sfn %= MAX_SFN;
2135 /*******************************************************************
2137 * @brief Fill PDSCH info in Page Alloc
2141 * Function : schFillPagePdschCfg
2143 * Functionality: Fill PDSCH info in Page Alloc
2145 * @params[in] SchCellCb *cell, PdschCfg *pagePdschCfg, SlotTimingInfo slotTime,
2146 * uint16_t tbsSize, uint8_t mcs, uint16_t startPrb
2148 * @return pointer to return Value(ROK, RFAILED)
2150 * ****************************************************************/
2151 uint8_t schFillPagePdschCfg(SchCellCb *cell, PageDlSch *pageDlSch, SlotTimingInfo slotTime, uint16_t tbSize, uint8_t mcs, uint16_t startPrb)
2153 uint8_t dmrsStartSymbol, startSymbol, numSymbol;
2155 /* fill the PDSCH PDU */
2157 pageDlSch->tbInfo.mcs = mcs;
2158 tbSize = tbSize + TX_PAYLOAD_HDR_LEN;
2159 pageDlSch->tbInfo.tbSize = tbSize;
2160 pageDlSch->dmrs.dmrsType = 0; /* type-1 */
2161 pageDlSch->dmrs.nrOfDmrsSymbols = NUM_DMRS_SYMBOLS;
2162 pageDlSch->dmrs.dmrsAddPos = DMRS_ADDITIONAL_POS;
2164 /* the RB numbering starts from coreset0, and PDSCH is always above SSB */
2165 pageDlSch->freqAlloc.startPrb = startPrb;
2166 pageDlSch->freqAlloc.numPrb = schCalcNumPrb(tbSize, mcs, NUM_PDSCH_SYMBOL);
2167 pageDlSch->vrbPrbMapping = 0; /* non-interleaved */
2168 /* This is Intel's requirement. PDSCH should start after PDSCH DRMS symbol */
2169 pageDlSch->timeAlloc.mappingType = DMRS_MAP_TYPE_A; /* Type-A */
2170 pageDlSch->timeAlloc.startSymb = 3; /* spec-38.214, Table 5.1.2.1-1 */
2171 pageDlSch->timeAlloc.numSymb = NUM_PDSCH_SYMBOL;
2173 /* Find total symbols occupied including DMRS */
2174 dmrsStartSymbol = findDmrsStartSymbol(4);
2175 /* If there are no DRMS symbols, findDmrsStartSymbol() returns MAX_SYMB_PER_SLOT,
2176 * in that case only PDSCH symbols are marked as occupied */
2177 if(dmrsStartSymbol == MAX_SYMB_PER_SLOT)
2179 startSymbol = pageDlSch->timeAlloc.startSymb;
2180 numSymbol = pageDlSch->timeAlloc.numSymb;
2182 /* If DMRS symbol is found, mark DMRS and PDSCH symbols as occupied */
2185 startSymbol = dmrsStartSymbol;
2186 numSymbol = pageDlSch->dmrs.nrOfDmrsSymbols + pageDlSch->timeAlloc.numSymb;
2189 /* Allocate the number of PRBs required for DL PDSCH */
2190 if((allocatePrbDl(cell, slotTime, startSymbol, numSymbol,\
2191 &pageDlSch->freqAlloc.startPrb, pageDlSch->freqAlloc.numPrb)) != ROK)
2193 DU_LOG("\nERROR --> SCH : allocatePrbDl() failed for DL MSG");
2200 * @brief Handles retransmission for MSG3
2204 * Function : schMsg3RetxSchedulingForUe
2206 * This function handles retransmission for MSG3
2208 * @param[in] SchRaCb *raCb, RA cb pointer
2213 uint8_t schMsg3RetxSchedulingForUe(SchRaCb *raCb)
2215 bool k2Found = false;
2216 uint16_t dciSlot = 0;
2217 SlotTimingInfo dciTime, msg3Time;
2218 SchCellCb *cell = NULLP;
2219 SlotTimingInfo currTime;
2220 DciInfo *dciInfo = NULLP;
2222 currTime = cell->slotInfo;
2224 /* Calculating time frame to send DCI for MSG3 Retx*/
2225 ADD_DELTA_TO_TIME(currTime, dciTime, PHY_DELTA_DL + SCHED_DELTA, cell->numSlots);
2227 /* Consider this slot for sending DCI, only if it is a DL slot */
2228 if(schGetSlotSymbFrmt(dciSlot, raCb->cell->slotFrmtBitMap) == DL_SLOT)
2231 /* If PDCCH is already scheduled on this slot, cannot schedule PDSCH for another UE here. */
2232 if(cell->schDlSlotInfo[dciSlot]->pdcchUe != 0)
2235 k2Found = schGetMsg3K2(cell, &raCb->msg3HqProc, dciTime.slot, &msg3Time, TRUE);
2241 SCH_ALLOC(dciInfo, sizeof(DciInfo));
2244 DU_LOG("\nERROR --> SCH : Memory Allocation failed for dciInfo alloc");
2247 cell->schDlSlotInfo[msg3Time.slot]->ulGrant = dciInfo;
2248 SCH_ALLOC(cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo, sizeof(SchPuschInfo));
2249 memset(dciInfo,0,sizeof(DciInfo));
2250 schFillUlDciForMsg3Retx(raCb, cell->schUlSlotInfo[msg3Time.slot]->schPuschInfo, dciInfo);
2252 raCb->retxMsg3HqProc = NULLP;
2257 * @brief Get K2 value for MSG3
2261 * Function : schGetMsg3K2
2263 * This function gets K2 for MSG3
2265 * @param[in] SchCellCb *cell, Cell cb struc pointer
2266 * @param[in] SchUlHqProcCb* msg3HqProc, msg3 harq proc pointer
2267 * @param[in] uint16_t dlTime, DL time of scheduling
2268 * @param[in] SlotTimingInfo *msg3Time, MSG3 timing info
2269 * @param[in] bool isRetx, indicates MSG3 retransmission
2274 bool schGetMsg3K2(SchCellCb *cell, SchUlHqProcCb* msg3HqProc, uint16_t dlTime, SlotTimingInfo *msg3Time, bool isRetx)
2276 bool k2Found = false;
2277 uint8_t k2TblIdx = 0;
2278 uint8_t k2Index = 0;
2281 uint8_t puschMu = 0;
2282 uint8_t msg3Delta = 0, msg3MinSchTime = 0;
2284 uint8_t totalCfgSlot = 0;
2286 SchK2TimingInfoTbl *msg3K2InfoTbl=NULLP;
2287 SlotTimingInfo currTime, msg3TempTime;
2288 currTime = cell->slotInfo;
2289 puschMu = cell->numerology;
2296 numK2 = cell->k2InfoTbl.k2TimingInfo[dlTime].numK2;
2297 msg3K2InfoTbl = &cell->msg3K2InfoTbl;
2303 numK2 = cell->msg3K2InfoTbl.k2TimingInfo[dlTime].numK2;
2304 msg3K2InfoTbl = &cell->k2InfoTbl;
2305 msg3MinSchTime = minMsg3SchTime[cell->numerology];
2306 msg3Delta = puschDeltaTable[puschMu];
2309 for(k2TblIdx = 0; k2TblIdx < numK2; k2TblIdx++)
2311 k2Index = msg3K2InfoTbl->k2TimingInfo[dlTime].k2Indexes[k2TblIdx];
2313 k2 = cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].k2;
2316 if ((msg3HqProc->strtSymbl != cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].startSymbol) ||
2317 (msg3HqProc->numSymbl != cell->cellCfg.ulCfgCommon.schInitialUlBwp.puschCommon.timeDomRsrcAllocList[k2Index].symbolLength))
2322 /* Delta is added to the slot allocation for msg3 based on 38.214 section 6.1.2.1 */
2323 k2 = k2 + msg3Delta;
2324 if(k2 >= msg3MinSchTime)
2326 ADD_DELTA_TO_TIME(currTime, msg3TempTime, k2, cell->numSlots);
2328 if(schGetSlotSymbFrmt(msg3TempTime.slot % totalCfgSlot, cell->slotFrmtBitMap) == DL_SLOT)
2331 /* If PUSCH is already scheduled on this slot, another PUSCH
2332 * pdu cannot be scheduled here */
2333 if(cell->schUlSlotInfo[msg3TempTime.slot]->puschUe != 0)
2339 if (k2Found == true)
2341 msg3Time->slot = msg3TempTime.slot;
2342 msg3Time->sfn = msg3TempTime.sfn;
2343 msg3Time->slot = msg3TempTime.slot;
2349 * * @brief : This Function fills the Coreset and SS info based on PDCCH Cfg received for a UE
2351 * Function : fillUeCoresetAndSsInfo
2353 * For a Coreset, capture the following details which will be used during pdcch allocation
2354 * [Step 1]: Count number of RBG and calculate TotalPRBs which can be used
2355 * [Step 2]: Get the reference pointer for Coreset and Its SearchSpace.
2356 * [Step 3]: A CCE will have 6 RBs in TOTAL. If duration increases, CCE will
2357 * occupy less number of PRBs(1RB x 1 OFDM Symbol). Eg. If duration = 2, then
2358 * instead of 6 PRBs, CCE will only occupy 3 PRBs and 2 OFDM symbols.
2359 * [Step 4]: Based on CoresetSize, fill AggLvl-CQI mapping by calculating the dciSize.
2360 * [Step 5]: Calculate Y value for this coreset and UE
2362 * @Params[in]: UeCb,
2363 * [return]: ROK, RFAILED : Memory allocation failure.
2365 uint8_t fillUeCoresetAndSsInfo(SchUeCb *ue)
2367 uint8_t cRSetIdx = 0,ssIdx = 0;
2368 uint16_t rbgCount = 0;
2369 SchPdcchConfig *pdcchCfg = NULLP;
2371 pdcchCfg = &ue->ueCfg.spCellCfg.servCellRecfg.initDlBwp.pdcchCfg;
2372 if(pdcchCfg == NULLP)
2374 DU_LOG("\nERROR --> SCH: PDCCH Cfg is not received thus skip filling of Coreset & SS info");
2377 for(cRSetIdx = 0; cRSetIdx < pdcchCfg->numCRsetToAddMod; cRSetIdx++ )
2379 /*[Step 1]: *//*Size of coreset: Number of PRBs in a coreset*/
2380 rbgCount = countRBGFrmCoresetFreqRsrc(pdcchCfg->cRSetToAddModList[cRSetIdx].freqDomainRsrc);
2383 ue->pdcchInfo[cRSetIdx].totalPrbs = ((rbgCount) * NUM_PRBS_PER_RBG);
2387 DU_LOG("\nERROR --> SCH : CORESETSize is zero in fillCoresetAndSsConfg");
2391 ue->pdcchInfo[cRSetIdx].cRSetRef = &pdcchCfg->cRSetToAddModList[cRSetIdx];
2392 for(ssIdx = 0; ssIdx < pdcchCfg->numSearchSpcToAddMod; ssIdx++)
2394 if(pdcchCfg->searchSpcToAddModList[ssIdx].cRSetId == pdcchCfg->cRSetToAddModList[cRSetIdx].cRSetId)
2396 ue->pdcchInfo[cRSetIdx].ssRef = &pdcchCfg->searchSpcToAddModList[ssIdx];
2402 /*nrOfPRBPerCce is Number of PRBs occupied by a CCE based on Duration*/
2403 ue->pdcchInfo[cRSetIdx].nrOfPRBPerCce = NUM_PRBS_PER_RBG/pdcchCfg->cRSetToAddModList[cRSetIdx].duration;
2404 ue->pdcchInfo[cRSetIdx].totalCceCount = rbgCount * pdcchCfg->cRSetToAddModList[cRSetIdx].duration;
2407 fillCqiAggLvlMapping(&ue->pdcchInfo[cRSetIdx]);
2410 if(RFAILED == schUpdValY(ue, &ue->pdcchInfo[cRSetIdx]))
2419 * @brief: Function will validate a slot for PDCCH allocation
2421 * Function: schPdcchSlotValidation
2423 * As per 3gpp Spec 38.331, SearchSpace parameter, Every SearchSpace will have
2424 * details of which slot and after how many slot the UE will monitor for PDCCH.
2425 * Thus, while PDCCH allocation we need to ensure the above validation passes.
2427 * @param [IN]: PDCCH time, SearchSpace Info, numSlots in Cell
2428 * [RETURN]: Flag depicting the slot validation
2430 bool schPdcchSlotValidation(SlotTimingInfo pdcchTime, SchSearchSpace *searchSpace, uint16_t numSlots)
2432 bool isSlotValid = false;
2433 uint16_t slotNum = 0, mSlotPeriodicityVal = 0;
2435 /*Converting the timing info in units of Slots*/
2436 slotNum = (pdcchTime.sfn * numSlots)+pdcchTime.slot;
2438 mSlotPeriodicityVal = \
2439 schConvertSlotPeriodicityEnumToValue(searchSpace->mSlotPeriodicityAndOffset.mSlotPeriodicity);
2441 if(!mSlotPeriodicityVal)
2443 DU_LOG("\nERROR --> SCH: Slot Periodicity is ZERO thus cant proceed with this SearchSpace");
2446 /*The Monitoring slot begins from offset thus skip the slots which are less
2447 * than offset value*/
2448 if((slotNum >= searchSpace->mSlotPeriodicityAndOffset.mSlotOffset))
2450 /*A pdcch Slot will start after Slotoffset and will get repeated after every
2452 if(((slotNum - searchSpace->mSlotPeriodicityAndOffset.mSlotOffset) % mSlotPeriodicityVal) == 0)
2454 DU_LOG("\nINFO --> SCH: SFN:%d/Slot:%d, is a Valid PDCCH slot",pdcchTime.sfn, pdcchTime.slot);
2459 DU_LOG("\nINFO --> SCH: SFN:%d/Slot:%d, is InValid PDCCH slot",pdcchTime.sfn, pdcchTime.slot);
2462 return (isSlotValid);
2466 * @brief: Function to check if PDCCH is available for a cceIndex
2468 * Function: schCheckPdcchAvail
2470 * This function checks if the PRBs available for a particular CCE during
2472 * [Step 1]: Calculate the rbgIndex from cceIndex which depends on Coreset symbol duration
2473 * i.e. a) If symbolDuration = 1; numPrbs in RBG (6) = numPrbPerCCE thus one on
2474 * one mapping between rbgIndex and cceIndex
2475 * b) if SymbolDuration =2; NumPrbs in RBG(6) = numPrbPerCCE * duration
2476 * as CCE needs 6 REG thus in 3 PRBs whole CCE can contain
2479 * [Step 2]: Again StartPRB for a rbgIndex may not be same for CCE Index which
2480 * depends on duration. If duration=2, then two CCE can be occupied
2481 * in one RBGIndex thus StarPrb for secondCCE will be
2482 * numPrbsPerCCE(3) away.
2484 * @params[in]: CellCb, SlotTime, cceIndex, PDcchInfo, aggLvl
2486 bool schCheckPdcchAvail(SchCellCb *cellCb, SlotTimingInfo slotTime, uint8_t cceIndex,\
2487 SchPdcchInfo *pdcchInfo, uint8_t aggLvl )
2489 uint8_t rbgIndex = 0, ret = 0, startSymbol = 0;
2490 uint16_t startPrb = MAX_NUM_RB, numPrb = 0;
2492 /*[Step 1]: rbgIndex to locate in FreqDomainResource parmaeter in
2494 rbgIndex = cceIndex / (pdcchInfo->cRSetRef->duration);
2496 /*Extract StartPRB for that RBGIndex*/
2497 startPrb = extractStartPrbForRBG(pdcchInfo->cRSetRef->freqDomainRsrc, rbgIndex);
2498 if(startPrb == MAX_NUM_RB)
2500 DU_LOG("\nERROR --> SCH: No RBG is allocated for PDCCH in this Coreset");
2503 /*[Step 2]: Adjust StartPrb based on CCEIndex and duration*/
2504 startPrb = startPrb + ((cceIndex % pdcchInfo->cRSetRef->duration) * (pdcchInfo->nrOfPRBPerCce));
2505 startSymbol = findSsStartSymbol(pdcchInfo->ssRef->mSymbolsWithinSlot);
2507 /*numPrb will also get adjusted with duration*/
2508 numPrb = (NUM_PRBS_PER_RBG * aggLvl) / pdcchInfo->cRSetRef->duration;
2509 DU_LOG("\nDEBUG --> SCH: RBG found for cceIndex:%d, AggLvl:%d and SymbolDuration%d with StartPrb:%d, numPrb:%d",\
2510 cceIndex, aggLvl, pdcchInfo->cRSetRef->duration, startPrb, numPrb);
2512 ret = allocatePrbDl(cellCb, slotTime, startSymbol,\
2513 pdcchInfo->cRSetRef->duration, &startPrb, numPrb);
2517 DU_LOG("\nERROR --> SCH: PRBs can't be allocated as they are unavailable");
2525 * @brief: Function to select particular UE based on validation of PDCCH allocation
2528 * This function will have multiple layers of validation for PDCCH allocation
2529 * based on CORESET and SearchSpace configuration and availability.
2531 * [Step 1]: Check if the slot is pdcch Slot or not based on SearchSpace's
2532 * monitoringSlotInfo.
2533 * [Step 2]: Check the CQI for this UE and decide upon which Agg Level has to
2534 * be used for this PDCCH transmission
2535 * [Step 3]: find the AggLevel for this CQI = base aggregation level
2536 * [Step 4]: NextLowerAggLvl will be the next lower aggLevel when PDCCH
2537 * allocation fails for base agg Level.
2538 * [Step 5]: For each candidate , calculate the CCE Index as per TS
2539 * 38.213v15, Sec 10.1 and also check PRBs falling in that CCEIndex is free.
2540 * [Step 6]: If Step 5 fails, move to next candidate and if Candidate gets
2541 * exhausted then fallback to nextAggLevel. Because as we decrease aggLevel,
2542 * numberOfCCEReq decreases so chances of PDCCH allocation increases even
2543 * though lowerAggLevel will not guarantee transmission of PDCCH as per CQI
2544 * reported.(CQI less, AggiLvlRequried is More)
2546 * @params[IN]: SchUeCb and PdcchTime
2547 * [RETURN]: isPDCCHAllocted flag(true = UE can be selected as a
2550 bool schDlCandidateSelection(SchUeCb *ueCb, SlotTimingInfo pdcchTime, SchPdcchAllocInfo *pdcchAllocInfo)
2552 uint8_t cRSetIdx = 0, cceIndex = 0;
2553 uint8_t cqi = 0, candIdx = 0;
2554 uint8_t baseAggLvl = 0, nextLowerAggLvl = 0, numCandidates = 0;
2555 SchPdcchInfo *pdcchInfo = NULLP;
2556 uint32_t a = 0, b = 0;
2558 for(cRSetIdx = 0; cRSetIdx < MAX_NUM_CRSET; cRSetIdx++)
2560 pdcchInfo = &ueCb->pdcchInfo[cRSetIdx];
2561 if(pdcchInfo->cRSetRef == NULLP)
2563 DU_LOG("\nINFO --> SCH: Coreset is not availabe at Index:%d",cRSetIdx);
2567 if(false == schPdcchSlotValidation(pdcchTime, pdcchInfo->ssRef, ueCb->cellCb->numSlots))
2569 DU_LOG("\nINFO --> SCH: This slot is not valid for PDCCH in this CORESET:%d.",pdcchInfo->cRSetRef->cRSetId);
2573 /*TODO: CQI is reported in DL_CQI_IND which has to be processed and
2574 * report has to be stored in ueCb.For now, HardCoding the value*/
2578 baseAggLvl = pdcchInfo->cqiIndxAggLvlMap[cqi];
2581 nextLowerAggLvl = baseAggLvl;
2583 /*Loop to traverse through each AggLvl from higher value of aggLevel to
2587 /*Configured num of candidates for each Agg Level in search space */
2588 numCandidates = extractNumOfCandForAggLvl(pdcchInfo->ssRef, nextLowerAggLvl);
2591 DU_LOG("\nINFO --> SCH: Num Of Candidates configured for this AggLvel:%d is ZERO",baseAggLvl);
2595 for(candIdx= 0; candIdx < numCandidates; candIdx++)
2597 /*Formula reference 3GPP TS 38.213v15, Sec 10.1, Variable 'a' and
2598 * 'b' is used for segmenting the formulat for readability purpose
2600 a = pdcchInfo->y[pdcchTime.slot] + \
2601 ceil((candIdx * pdcchInfo->totalCceCount)/(baseAggLvl * numCandidates));
2602 b = ceil(pdcchInfo->totalCceCount * baseAggLvl);
2603 cceIndex = baseAggLvl * (a % b);
2604 if(schCheckPdcchAvail(ueCb->cellCb, pdcchTime, cceIndex, pdcchInfo,nextLowerAggLvl) == true)
2606 DU_LOG("\nINFO --> SCH: PDCCH allocation is successful at cceIndex:%d",cceIndex);
2607 pdcchAllocInfo->cRSetId = pdcchInfo->cRSetRef->cRSetId;
2608 pdcchAllocInfo->aggLvl = nextLowerAggLvl;
2609 pdcchAllocInfo->cceIndex = cceIndex;
2610 pdcchAllocInfo->ssId = pdcchInfo->ssRef->searchSpaceId;
2614 nextLowerAggLvl = nextLowerAggLvl >> 1;
2615 }while(nextLowerAggLvl > 0 && nextLowerAggLvl <= 16);
2619 /**********************************************************************
2621 **********************************************************************/