1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 #define SCH_INST_START 1
21 #define SCH_MAX_CELLS 1
22 #define SCH_MAX_INST 1
23 #define SCH_NUM_SLOTS 10 /*forcing this to 10 */
24 #define SCH_MAX_SFN 1024
25 #define MAX_NUM_RB 106 /* value for numerology 0 15Khz */
26 #define SCH_MIB_TRANS 80
27 #define SCH_NUM_SC_PRB 12 /* number of SCs in a PRB */
28 #define SCH_SCS_15KHZ 0 /* numerology 0 and 15Khz */
29 #define SCH_SYMBOL_PER_SLOT 14
30 #define SCH_SSB_NUM_SYMB 4
31 #define SCH_SSB_NUM_PRB 20
32 #define SCH_MAX_SSB_BEAM 4 /* since we are supporting only SCS=15KHz */
33 #define SCH_MEM_REGION 4
40 #define PUSCH_START_RB 15
41 #define PUCCH_NUM_PRB_FORMAT_0 1 /* number of PRBs in freq domain, spec 38.213 - 9.2.1 */
42 #define SI_RNTI 0xFFFF
44 #define DMRS_MAP_TYPE_A 1
45 #define NUM_DMRS_SYMBOLS 12
46 #define DMRS_ADDITIONAL_POS 2
51 /* allocate and zero out a static buffer */
52 #define SCH_ALLOC(_datPtr, _size) \
55 _ret = SGetSBuf(SCH_MEM_REGION, SCH_POOL, \
56 (Data **)&_datPtr, _size); \
58 cmMemset((U8*)_datPtr, 0, _size); \
63 /* free a static buffer */
64 #define SCH_FREE(_datPtr, _size) \
66 SPutSBuf(SCH_MEM_REGION, SCH_POOL, \
67 (Data *)_datPtr, _size);
69 #define SCH_FILL_RSP_PST(_rspPst, _inst)\
71 _rspPst.srcProcId = SFndProcId(); \
72 _rspPst.dstProcId = SFndProcId();\
73 _rspPst.srcEnt = ENTRG;\
74 _rspPst.dstEnt = ENTRG;\
77 _rspPst.selector = ODU_SELECTOR_TC;\
79 extern uint8_t schProcessRachInd(RachIndInfo *rachInd, Inst schInst);
82 * Structure holding LTE MAC's General Configuration information.
84 typedef struct schGenCb
86 uint8_t tmrRes; /*!< Timer resolution */
87 uint8_t startCellId; /*!< Starting Cell Id */
89 bool forceCntrlSrbBoOnPCel; /*!< value 1 means force scheduling
90 of RLC control BO and SRB BO on
91 PCell. val 0 means don't force*/
92 bool isSCellActDeactAlgoEnable; /*!< TRUE will enable activation/deactivation algo at Schd */
98 * scheduler allocationsfor DL per cell.
100 typedef struct schDlSlotInfo
102 uint16_t totalPrb; /*!< Number of RBs in the cell */
103 uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */
104 bool ssbPres; /*!< Flag to determine if SSB is present in this slot */
105 uint8_t ssbIdxSupported; /*!< Max SSB index */
106 SsbInfo ssbInfo[MAX_SSB_IDX]; /*!< SSB info */
107 bool sib1Pres; /*!< Flag to determine if SIB1 is present in this slot */
108 RarInfo *rarInfo; /*!< RAR info */
109 Msg4Info *msg4Info; /*!< msg4 info */
112 typedef struct schRaCb
119 * scheduler allocationsfor UL per cell.
121 typedef struct schUlSlotInfo
123 uint16_t totalPrb; /*!< Number of RBs in the cell */
124 uint16_t assignedPrb[SCH_SYMBOL_PER_SLOT]; /*!< Num RBs and corresponding symbols allocated */
125 bool puschPres; /*!< PUSCH presence field */
126 SchPuschInfo *schPuschInfo; /*!< PUSCH info */
127 bool pucchPres; /*!< PUCCH presence field */
128 SchPucchInfo schPucchInfo; /*!< PUCCH info */
133 * Cell Control block per cell.
135 typedef struct schCellCb
137 uint16_t cellId; /*!< Cell ID */
138 Inst instIdx; /*!< Index of the scheduler instance */
139 Inst macInst; /*!< Index of the MAC instance */
140 uint8_t numSlots; /*!< Number of slots in current frame */
141 SlotIndInfo slotInfo; /*!< SFN, Slot info being processed*/
142 SchDlSlotInfo *schDlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in DL */
143 SchUlSlotInfo *schUlSlotInfo[SCH_NUM_SLOTS]; /*!< SCH resource allocations in UL */
144 SchCellCfg cellCfg; /*!< Cell ocnfiguration */
145 uint8_t ssbStartSymbArr[SCH_MAX_SSB_BEAM]; /*!<start symbol per SSB beam */
146 SchRaCb raCb[SCH_MAX_UE]; /*!< Rach Cb */
151 * Control block for sch
155 TskInit schInit; /*!< Task Init info */
156 SchGenCb genCfg; /*!< General Config info */
157 SchCellCb *cells[SCH_MAX_CELLS]; /* Array to store cellCb ptr */
160 /* Declaration for scheduler control blocks */
161 SchCb schCb[SCH_MAX_INST];
163 /* function declarations */
164 uint8_t schBroadcastAlloc(SchCellCb *cell, DlBrdcstAlloc *dlBrdcstAlloc,uint16_t slot);
165 uint8_t schProcessSlotInd(SlotIndInfo *slotInd, Inst inst);
166 uint8_t schUlResAlloc(SchCellCb *cell, Inst schInst);
167 uint8_t schDlRsrcAllocMsg4(Msg4Alloc *msg4Alloc, SchCellCb *cell, uint16_t slot);
168 uint16_t schCalcTbSize(uint16_t payLoadSize);
169 uint16_t schCalcNumPrb(uint16_t tbSize, uint16_t mcs, uint8_t numSymbols);
170 uint16_t schAllocPucchResource(SchCellCb *cell, uint16_t crnti, uint16_t slot);
171 /**********************************************************************
173 **********************************************************************/