1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
19 /**********************************************************************
25 Desc: Defines required by LTE MAC
29 **********************************************************************/
34 /* Number of Unserved UE's Facotr for BI value calculation */
36 #define RG_SCH_CMN_BI_NUMUE_FACTOR 1
37 #define RGSCH_MAX_RNTI_PER_RARNTI 10
38 /* The number of schedulers supported currently */
39 #ifdef RG_PHASE2_SCHED
40 #define RGSCH_NUM_SCHEDULERS 4
42 #define RGSCH_NUM_EMTC_SCHEDULERS 1
44 #define RGSCH_NUM_DLFS_SCHEDULERS 1
46 #define RGSCH_NUM_SCHEDULERS 1
48 #define RGSCH_NUM_EMTC_SCHEDULERS 0
50 #define RGSCH_NUM_DLFS_SCHEDULERS 0
52 /* Added support for SPS*/
55 #define RG_SCH_NUM_SPS_OCC_AFTR_EXP_REL 6 /* Number of empty SPS Occasions
56 after sending explicit release after
57 which SPS resources of the UE shall
59 #define RGSCH_SPS_CQI_SCALE_FACTOR 1
63 /* List of scheduler init functions to initialise rgSchSchdInits[] array with */
64 #ifdef RG_PHASE2_SCHED
65 #define RGSCH_ULSCHED_INITS {rgSCHSc1UlInit, rgSCHPfsUlInit, rgSCHRrUlInit, rgSCHMaxciUlInit}
66 #define RGSCH_DLSCHED_INITS {rgSCHSc1DlInit, rgSCHPfsDlInit, rgSCHRrDlInit, rgSCHMaxciDlInit}
68 #define RGSCH_EMTC_ULSCHED_INITS {rgSCHEmtcRrUlInit}
69 #define RGSCH_EMTC_DLSCHED_INITS {rgSCHEmtcRrDlInit}
72 #define RGSCH_DLFSSCHED_INITS {rgSCHDlfsInit}
75 #define RGSCH_ULSCHED_INITS {rgSCHSc1UlInit}
76 #define RGSCH_DLSCHED_INITS {rgSCHSc1DlInit}
77 #define RGSCH_DLFSSCHED_INITS {}
79 #define RGSCH_EMTC_ULSCHED_INITS {}
80 #define RGSCH_EMTC_DLSCHED_INITS {}
86 /* Common Scheduler Tunable Parameters */
87 #define RG_SCH_CMN_UE_IDLETIME_FCTR 3
88 #define RG_SCH_CMN_MAX_BITS_RATIO 16
89 #define RG_SCH_CMN_UL_COM_DENOM 16
90 #define RG_SCH_CMN_UL_NUM_CQI 16
91 #define RG_SCH_CMN_MAX_UE_PER_UL_SF 1 /* If more than 1 is required it can be controlled from configuration*/
92 /* Fix: MUE_PERTTI_DL*/
93 #define RG_SCH_CMN_MAX_UE_PER_DL_SF 4
94 /* mapping RG_MAX_NUM_UE_PER_TTI to RGU Interface define to use it in MAC code */
95 #ifdef XEON_SPECIFIC_CHANGES
96 #define RG_MAX_NUM_UE_PER_TTI 16
98 #define RG_MAX_NUM_UE_PER_TTI 8
100 /* Added configuration for maximum number of MSG3s */
101 #define RG_SCH_CMN_MAX_MSG3_PER_UL_SF 1 /* If more than 1 is required it can be controlled from configuration*/
102 #define RG_SCH_CMN_MAX_UL_BW_PER_UE 100
103 #define RG_SCH_CMN_MAX_DL_RETX_BW 100
104 #define RG_SCH_CMN_MAX_DL_BW_PERUE 100
105 #define RG_SCH_CMN_DEF_BCCHPCCH_CODERATE 512
106 #define RG_SCH_CMN_MAX_DL_AMBR 0xFFFFFFFF
107 #define RG_SCH_CMN_MAX_UL_UEBR 0xFFFFFFFF
108 #define RG_SCH_CMN_DED_MAX_HDRSIZE 3
109 #define RG_SCH_CMN_MAX_DED_SDU 5
112 #define RG_SCH_CMN_CMNDL_DELTA 1
113 #endif /* MAC_SCH_STATS */
115 /* ccpu00126002 introduced buffer to track cqi allocation and RI allocation
116 for a particular UE. As the allocation is stored in UeCb, if the
117 occasion between cqi and ri are short cqi is overwritten. To avoid that
118 this buffer is introduced.*/
119 #define MAX_CQI_RI_RPT_BUFF (TFU_DELTA * 2)
121 /* GBR priorities occupy a set of contiguous priorities */
122 /* starting always at 1. */
123 /* RG_SCH_CMN_MAX_PRIO is the total number of priority queues */
124 /* defined in the scheduler. This variable can have affect */
125 /* on the performance of the scheduler and should be chosen */
126 /* based on the same. */
127 #define RG_SCH_CMN_MAX_PRIO 8
130 /* UL Scheduler1 tunable params */
131 #define RG_SC1_BSR_BS 4
132 #define RG_SC1_SR_BS RG_SC1_BSR_BS
133 #define RG_SC1_UL_RATIO 14 /* UL_RATIO/COM_DENOM of bs for LCGs other than */
134 /* highest priority LCG used */
136 /* Priority 0 is used as a FIFO service where the priority */
137 /* of UEs within the priority Q is based purely on time at */
138 /* which the service is reported to the scheduler. This */
139 /* priority queue is suitable for DCCH services. */
142 /* This is the maximum known QCIs to the scheduler. */
143 /* RG_SC1_QCI_TO_PRIO maps QCIs to respective priorities and */
144 /* there by behavior of the service */
146 /* This table is used to translate a CQI to an applicable */
147 /* aggregation level to be used for a UE when allocating */
149 /* This table is used to translate a CQI to an applicable */
150 /* coding rate for dedicated PDSCH allocation. The number */
151 /* in the table represents the number of bits to allocated */
155 //uint32_t wrSmDfltNumCells;
156 #define RGSCH_MAX_UE_PER_DL_SF 32
157 #define RGSCH_MAX_RARNTI_PER_DL_SF 4
158 #define SCH_INST_START 1
159 #define RGSCH_MAX_INST 2
161 #define RG_MAX_INST 4
162 #define RG_INST_START 0
163 /* Twice of difference in power levels between successive uplink
165 #define RG_SCH_UL_CQI_DB_STEP_2 2
167 #define RG_SCH_CMN_MAX_NUM_TPC_PUCCH_RNTI 100
168 #define RG_SCH_CMN_MAX_NUM_TPC_PUSCH_RNTI 100
170 /* [ccpu00138532]-DEL-Removed the Guard timer macro. Moved
171 it into CellCb and value is configured based the maxMsg4Tx */
173 /* moving rgSchCmnUlCqiTbl values here to enable customer to
174 * fine tune these values
176 /* Adding modulation order & efficiency hash defines for
177 * UL. This can be tuned by customer. These values are used
178 * in rgSchCmnUlCqiTbl in rg_sch_cmn.c
182 #define RGSCH_CMN_QM_CQI_1 RGSCH_QM_BPSK
183 #define RGSCH_CMN_UL_EFF_CQI_1 156
186 #define RGSCH_CMN_QM_CQI_2 RGSCH_QM_BPSK
187 #define RGSCH_CMN_UL_EFF_CQI_2 240
190 #define RGSCH_CMN_QM_CQI_3 RGSCH_QM_BPSK
191 #define RGSCH_CMN_UL_EFF_CQI_3 386
194 #define RGSCH_CMN_QM_CQI_4 RGSCH_QM_BPSK
195 #define RGSCH_CMN_UL_EFF_CQI_4 616
198 #define RGSCH_CMN_QM_CQI_5 RGSCH_QM_BPSK
199 #define RGSCH_CMN_UL_EFF_CQI_5 898
202 #define RGSCH_CMN_QM_CQI_6 RGSCH_QM_BPSK
203 #define RGSCH_CMN_UL_EFF_CQI_6 1204
206 #define RGSCH_CMN_QM_CQI_7 RGSCH_QM_QPSK
207 #define RGSCH_CMN_UL_EFF_CQI_7 1512
210 #define RGSCH_CMN_QM_CQI_8 RGSCH_QM_QPSK
211 #define RGSCH_CMN_UL_EFF_CQI_8 1960
214 #define RGSCH_CMN_QM_CQI_9 RGSCH_QM_QPSK
215 #define RGSCH_CMN_UL_EFF_CQI_9 2464
218 #define RGSCH_CMN_QM_CQI_10 RGSCH_QM_64QAM
219 #define RGSCH_CMN_UL_EFF_CQI_10 3402
222 #define RGSCH_CMN_QM_CQI_11 RGSCH_QM_64QAM
223 #define RGSCH_CMN_UL_EFF_CQI_11 3996
226 #define RGSCH_CMN_QM_CQI_12 RGSCH_QM_64QAM
227 #define RGSCH_CMN_UL_EFF_CQI_12 4102
230 #define RGSCH_CMN_QM_CQI_13 RGSCH_QM_64QAM
231 #define RGSCH_CMN_UL_EFF_CQI_13 4342
234 #define RGSCH_CMN_QM_CQI_14 RGSCH_QM_64QAM
235 #define RGSCH_CMN_UL_EFF_CQI_14 5238
238 #define RGSCH_CMN_QM_CQI_15 RGSCH_QM_64QAM
239 #define RGSCH_CMN_UL_EFF_CQI_15 5728
241 /* Freeing up the HARQ proc blocked for
242 * indefinite time in case of Retx */
243 #define RG_SCH_MAX_RETX_ALLOC_FAIL 10
245 /* Window Size within which buffering paging and Broadcast BO is done */
246 #define RGSCH_PCCHBCCH_WIN 5120
247 #define RGSCH_MAX_SUBFRM 10240
248 #define RGSCH_MAX_SUBFRM_5G 51200
249 #define RGSCH_UL_SYM_DMRS_SRS 2
250 #define RGSCH_UL_16QAM_MAX_ITBS 20
252 /* Itbs Adjustment for DwPts scheduling. Only
253 * Spl Sf cfg 7 is currently supported. The adjustment
254 * is based on test results */
255 #define RG_SCH_DWPTS_ITBS_ADJ {0,0,0,0,0,0,0,-1,0}
259 /* The below MACROs are used by the BLER based LA algorithm to
260 * maintain the iTbs delta based on the HARQ feedback. For the first
261 * HARQ Ack received, the delta itbs value is incremented by the STEP_UP value.
262 * For the first HARQ Nack received, the delta iTbs value is decreased by
263 * the STEP_DOWN value
266 #define DL_LA_STEPDOWN 30
267 #define DL_LA_STEPUP 3
271 #define UL_LA_STEPDOWN 30
272 #define UL_LA_STEPUP 3
275 #define RGSCH_CFI_TTI_MON_INTRVL 1000 /* In TTI, Max value 10240 */
276 #define RGSCH_CFI_STEP_UP_TTI_PRCNTG 10 /* Percentage of CCE failures */
277 #define RGSCH_CFI_STEP_DOWN_TTI_PERCNTG 90 /* Percentage of TTI in which CCE usage is less than the
279 #define RGSCH_CFI_CCE_PERCNTG 90 /* Percentage of total CCE used/total CCE available
280 in the next lower CFI */
282 /* Following tunable Macros are applied in APerCQI
283 * trigger determination */
284 #define RG_APER_CQI_ACK_WGT 25 /*Weight Associated with each HARQ ACK*/
285 #define RG_APER_CQI_NACK_WGT 125 /*Weight Associated with each HARQ ACK*/
286 #define RG_APER_CQI_THRESHOLD_WGT 1000 /*Threshold against which the accumulated
287 aCqiTrigWt is compared to */
289 #define RG_SCH_ITBS_STEP_DOWN_PCQI_RI_HQ 1 /* iTbs will be reduced by this value
290 for UL with PCQIi/RI/HQ */
291 #define RG_SCH_ITBS_STEP_DOWN_ACQI 1 /* iTbs will be reduced by this value
293 #define RG_SCH_PCQI_RI_HQ_EFF_TGT 930 /* Target efficeincy for
294 UL with PCQI/RI/HQ */
295 #define RG_SCH_ACQI_EFF_TGT 530 /* Target efficeincy for UL with ACQI */
298 /* Following #defines are used in calculating the cqi to TBS mapping
299 * In 36.213 table 7.1.7.1-1 defines mapping b/w Itbs and mcs and table
300 * 7.2.3-1 defines mapping b/w CQI to mcs and code rate.
301 * The values of these tables are chosen such that average of tbs value for
302 * different nprbs with code rate nearest to the code rate defined in table
303 * 7.2.3-1 for particular CQI value.We should also take care of the fact that
304 * mapping defined in table 7.1.7.1-1 is not overruled.*/
305 /* ADD fix for CFI0*/
306 #define RG_SCH_CMN_CQI_TO_PDSCH_EFF_CFI0 \
307 {207, 271, 333, 431, 648, 899, 1161, 1482, 1889, 2103,\
308 2905, 3412, 3956, 4474, 4655, 5397}
310 /* The below tables are defined to fix the BLER issue
312 #define RG_SCH_CMN_CQI_TO_PDSCH_EFF_CFI1 \
313 {226, 226, 226, 364, 471, 708, 983, 1411, 1833, 2299, 2612,\
314 3177, 3731, 4326, 4893, 5090}
316 #define RG_SCH_CMN_CQI_TO_PDSCH_EFF_CFI2 \
317 {248, 248, 248, 326, 519, 780, 1084, 1399, 1786, 2278, 2714, 3194,\
318 3810, 4442, 5069, 5398}
320 #define RG_SCH_CMN_CQI_TO_PDSCH_EFF_CFI3 \
321 {276, 276, 276, 276, 446, 708, 1052, 1382, 1734, 2254, 2827,\
322 3212, 3908, 4590, 4953, 5653}
326 #define RG_SCH_EMTC_CMN_CQI_TO_PDSCH_EFF_CFI0 \
327 {104, 136, 271, 333, 431, 648, 899, 1161, 1973, 2111, 2240}
329 #define RG_SCH_EMTC_CMN_CQI_TO_PDSCH_EFF_CFI1 \
330 {115, 115, 226, 226, 364, 471, 708, 983, 2143, 2293, 2433}
332 #define RG_SCH_EMTC_CMN_CQI_TO_PDSCH_EFF_CFI2 \
333 {125, 125, 248, 248, 326, 519, 780, 1084, 2345, 2509, 2663}
335 #define RG_SCH_EMTC_CMN_CQI_TO_PDSCH_EFF_CFI3 \
336 {139, 139, 276, 276, 276, 446, 708, 1052, 2590, 2771, 2941}
338 #define RG_SCH_EMTC_CMN_2LYR_CQI_TO_PDSCH_EFF_CFI0 \
339 {95, 114, 226, 309, 366, 412, 539, 662, 859, 1052, 1293}
341 #define RG_SCH_EMTC_CMN_2LYR_CQI_TO_PDSCH_EFF_CFI1 \
342 {99, 117, 232, 306, 322, 408, 450, 588, 723, 938, 1150}
344 #define RG_SCH_EMTC_CMN_2LYR_CQI_TO_PDSCH_EFF_CFI2 \
345 {84, 104, 207, 233, 307, 343, 408, 422, 495, 586, 648}
347 #define RG_SCH_EMTC_CMN_2LYR_CQI_TO_PDSCH_EFF_CFI3 \
348 {89, 100, 200, 221, 287, 323, 386, 433, 497, 522, 676}
350 #define RGSCH_MPDCCH_PDSCH_DL_DELTA 2
354 /* Number of information bits per 1024 Phy bits for PDCCH */
355 /* This is a customer tunable */
356 #define RG_SCH_CMN_CQI_TO_PDCCH_EFF \
357 { 400, 100, 150, 200, 250, 280, 340, 365,\
358 380, 400, 500, 600, 700, 800, 900, 1000}
360 #define RG_SCH_CMN_2LYR_CQI_TO_PDSCH_EFF_CFI0 \
361 {188, 226, 309, 366, 412, 539, 662, 859, 1052, \
362 1293, 1535, 2585, 2957, 3340, 4775, 5300}
364 #define RG_SCH_CMN_2LYR_CQI_TO_PDSCH_EFF_CFI1 \
365 {197, 232, 306, 322, 408, 450, 588, 723, 938,\
366 1150, 1413, 1679, 2826, 3233, 5222, 5796}
368 #define RG_SCH_CMN_2LYR_CQI_TO_PDSCH_EFF_CFI2 \
369 {166, 207, 233, 307, 343, 408, 422, 495, 586,\
370 648, 797, 1035, 1268, 1558, 3117, 3567}
372 #define RG_SCH_CMN_2LYR_CQI_TO_PDSCH_EFF_CFI3 \
373 {177, 200, 221, 287, 323, 386, 433, 497, 522, 676,\
374 722, 888, 1153, 1413, 1737, 3476}
376 #define RG_SCH_LAA_ITBS_THRESHOLD 20 /* Threshold iTBS for considering for scheduling
378 #define RG_SCH_DEFAULT_HQP_SHIFT_TIME 8 /* The Timer for the Harq Proc to be shifted to
379 PCell if SCell Transmissionfail */
381 #endif /* __RGENVH__ */
384 /**********************************************************************
386 **********************************************************************/