1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
23 #define MAX_CRI_SIZE 6
24 #define MAX_MAC_DL_PDU 10
25 #define MAX_NUM_HARQ_PROC 16
26 #define MAX_SLOT_SUPPORTED 10 /* numerology 0 15Khz */
27 #define MAX_ZERO_CORR_CFG_IDX 16 /* max zero correlation config index */
29 #define DEFAULT_CELLS 1
30 #define SI_RNTI 0xFFFF
33 #define PERIODIC_BSR_TMR_1MS 1
34 #define PERIODIC_BSR_TMR_5MS 5
35 #define PERIODIC_BSR_TMR_10MS 10
36 #define PERIODIC_BSR_TMR_16MS 16
37 #define PERIODIC_BSR_TMR_20MS 20
38 #define PERIODIC_BSR_TMR_32MS 32
39 #define PERIODIC_BSR_TMR_40MS 40
40 #define PERIODIC_BSR_TMR_60MS 60
41 #define PERIODIC_BSR_TMR_80MS 80
42 #define PERIODIC_BSR_TMR_128MS 128
43 #define PERIODIC_BSR_TMR_160MS 160
44 #define PERIODIC_BSR_TMR_320MS 320
45 #define PERIODIC_BSR_TMR_640MS 640
46 #define PERIODIC_BSR_TMR_1280MS 1280
47 #define PERIODIC_BSR_TMR_2560MS 2560
49 #define RETX_BSR_TMR_10MS 10
50 #define RETX_BSR_TMR_20MS 20
51 #define RETX_BSR_TMR_40MS 40
52 #define RETX_BSR_TMR_80MS 80
53 #define RETX_BSR_TMR_160MS 160
54 #define RETX_BSR_TMR_320MS 320
55 #define RETX_BSR_TMR_640MS 640
56 #define RETX_BSR_TMR_1280MS 1280
57 #define RETX_BSR_TMR_2560MS 2560
58 #define RETX_BSR_TMR_5120MS 5120
59 #define RETX_BSR_TMR_10240MS 10240
61 #define SR_DELAY_TMR_20MS 20
62 #define SR_DELAY_TMR_40MS 40
63 #define SR_DELAY_TMR_64MS 64
64 #define SR_DELAY_TMR_128MS 128
65 #define SR_DELAY_TMR_512MS 512
66 #define SR_DELAY_TMR_1024MS 1024
67 #define SR_DELAY_TMR_2560MS 2560
69 #define MAC_LCID_CCCH 0
70 #define MAC_LCID_MIN 1
71 #define MAC_LCID_MAX 32
72 #define MAC_LCID_RESERVED_MIN 33
73 #define MAC_LCID_RESERVED_MAX 51
74 #define MAC_LCID_CCCH_48BIT 52
75 #define MAC_LCID_BIT_RATE_QUERY 53
76 #define MAC_LCID_MULT_PHR_FOUR_OCT 54
77 #define MAC_LCID_CFG_GRANT_CFM 55
78 #define MAC_LCID_MULT_PHR_ONE_OCT 56
79 #define MAC_LCID_SINGLE_PHR 57
80 #define MAC_LCID_CRNTI 58
81 #define MAC_LCID_SHORT_TRUNC_BSR 59
82 #define MAC_LCID_LONG_TRUNC_BSR 60
83 #define MAC_LCID_SHORT_BSR 61
84 #define MAC_LCID_LONG_BSR 62
85 #define MAC_LCID_CRI 62
86 #define MAC_LCID_PADDING 63
88 typedef struct macCellCb MacCellCb;
102 typedef struct macDlSlot
107 typedef struct macUlSlot
112 typedef struct macCbInfo
116 uint8_t msg3Pdu[6]; /* used as CRI value during muxing */
117 uint8_t *msg4Pdu; /* storing DL-CCCH Ind Pdu */
118 uint16_t msg4PduLen; /* storing DL-CCCH Ind Pdu Len */
119 uint8_t *msg4TxPdu; /* muxed Pdu used for re-transmission */
120 uint16_t msg4TbSize; /* size required for msg4TxPdu */
126 uint8_t macCeValue[6];
129 typedef struct macCeInfo
132 MacCe macCe[MAX_MAC_CE];
135 typedef struct macDlInfo
142 typedef struct macDlData
145 MacDlInfo pduInfo[MAX_MAC_DL_PDU];
148 /* HARQ Process Info */
149 typedef struct dlHarqProcCb
151 uint8_t procId; /* HARQ Process Id */
155 typedef struct dlHarqEnt
157 uint8_t maxReTx; /* MAX HARQ retransmission */
158 uint8_t numHarqProcs; /* Number of HARQ procs */
159 DlHarqProcCb harqProcCb[MAX_NUM_HARQ_PROC];
162 /* Uplink deidcated logical channel info */
163 typedef struct ulLcCb
165 uint8_t lcId; /* Logical Channel Id */
166 uint8_t lcGrpId; /* Logical Channel group */
167 LcState lcActive; /* Is LC active ? */
170 /* Downlink dedicated logical channel info */
171 typedef struct dlLcCb
173 uint8_t lcId; /* Logical channel Id */
174 LcState lcState; /* Is LC active ? */
177 /* BSR Information */
178 typedef struct macBsrTmrCfg
180 uint16_t periodicTimer;
182 uint16_t srDelayTimer;
185 /* UE specific UL info */
186 typedef struct ueUlCb
188 uint8_t maxReTx; /* MAX HARQ retransmission */
189 uint8_t numUlLc; /* Number of uplink logical channels */
190 UlLcCb lcCb[MAX_NUM_LOGICAL_CHANNELS]; /* Uplink dedicated logocal channels */
193 /* UE specific DL Info */
194 typedef struct ueDlCb
196 DlHarqEnt dlHarqEnt; /* DL HARQ entity */
197 uint8_t numDlLc; /* Number of downlink logical channels */
198 DlLcCb lcCb[MAX_NUM_LOGICAL_CHANNELS]; /* Downlink dedicated logical channels */
202 typedef struct macUeCb
204 uint16_t ueIdx; /* UE Idx assigned by DU APP */
205 uint16_t crnti; /* UE CRNTI */
206 MacCellCb *cellCb; /* Pointer to cellCb to whihc this UE belongs */
207 UeState state; /* Is UE active ? */
208 MacRaCbInfo *raCb; /* RA info */
209 MacBsrTmrCfg bsrTmrCfg; /* BSR Timer Info */
210 UeUlCb ulInfo; /* UE specific UL info */
211 UeDlCb dlInfo; /* UE specific DL info */
217 MacRaCbInfo macRaCb[MAX_NUM_UE];
218 MacDlSlot dlSlot[MAX_SLOT_SUPPORTED];
219 MacUlSlot ulSlot[MAX_SLOT_SUPPORTED];
221 MacUeCb ueCb[MAX_NUM_UE];
222 MacCellCfg macCellCfg;
223 SlotIndInfo currTime;
230 MacCellCb *macCell[MAX_NUM_CELL];
233 /* global variable */
235 void fillRarPdu(RarInfo *rarInfo);
236 void createMacRaCb(uint16_t cellId, uint16_t crnti);
237 void fillMsg4DlData(uint16_t cellId, MacDlData *dlData, uint8_t *msg4Pdu);
238 void fillMacCe(MacCeInfo *macCeData, uint8_t *msg3Pdu);
239 void macMuxPdu(MacDlData *dlData, MacCeInfo *macCeData, uint8_t *msg4TxPdu, uint16_t tbSize);
240 uint8_t unpackRxData(uint16_t cellId, SlotIndInfo slotInfo, RxDataIndPdu *rxDataIndPdu);
241 void fillMg4Pdu(Msg4Alloc *msg4Alloc);
242 void buildAndSendMuxPdu(SlotIndInfo currTimingInfo);
243 uint8_t macProcUlCcchInd(uint16_t cellId, uint16_t crnti, uint16_t rrcContSize, uint8_t *rrcContainer);
244 uint8_t macProcShortBsr(uint16_t cellId, uint16_t crnti, uint8_t lcgId, uint32_t bufferSize);
245 uint8_t macProcUlData(uint16_t cellId, uint16_t rnti, SlotIndInfo slotInfo, \
246 uint8_t lcId, uint16_t pduLen, uint8_t *pdu);
248 /**********************************************************************
250 **********************************************************************/