1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
30 #include "nr5g_fapi_internal.h"
31 #include "fapi_vendor_extension.h"
36 #include "lwr_mac_fsm.h"
37 #include "lwr_mac_phy.h"
38 #include "lwr_mac_utils.h"
39 #include "mac_utils.h"
40 #include "nfapi_interface.h"
42 #define MIB_SFN_BITMASK 0xFC
43 #define PDCCH_PDU_TYPE 0
44 #define PDSCH_PDU_TYPE 1
45 #define SSB_PDU_TYPE 3
46 #define PRACH_PDU_TYPE 0
47 #define PUSCH_PDU_TYPE 1
48 #define PUCCH_PDU_TYPE 2
50 #define SET_MSG_LEN(x, size) x += size
52 /* Global variables */
55 extern uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
56 void fapiMacConfigRsp(uint16_t cellId);
57 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq);
58 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti);
59 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq);
60 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem, fapi_stop_req_vendor_msg_t *vendorMsg);
62 void lwrMacLayerInit(Region region, Pool pool)
68 memset(&lwrMacCb, 0, sizeof(LwrMacCb));
69 lwrMacCb.region = region;
71 lwrMacCb.clCfgDone = TRUE;
73 lwrMacCb.phyState = PHY_STATE_IDLE;
76 /* Initializing WLS free mem list */
77 lwrMacCb.phySlotIndCntr = 1;
78 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
80 cmLListInit(&wlsBlockToFreeList[idx]);
85 /*******************************************************************
87 * @brief Handles Invalid Request Event
91 * Function : lwr_mac_procInvalidEvt
94 * - Displays the PHY state when the invalid event occurs
97 * @return ROK - success
100 * ****************************************************************/
101 uint8_t lwr_mac_procInvalidEvt(void *msg)
103 #ifdef CALL_FLOW_DEBUG_LOG
104 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : INVALID_EVENT\n");
106 DU_LOG("\nERROR --> LWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
111 /*******************************************************************
113 * @brief Fills FAPI message header
117 * Function : fillMsgHeader
120 * -Fills FAPI message header
122 * @params[in] Pointer to header
128 * ****************************************************************/
129 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint32_t msgLen)
131 memset(hdr, 0, sizeof(fapi_msg_t));
132 hdr->msg_id = msgType;
133 hdr->length = msgLen;
136 /*******************************************************************
138 * @brief Fills FAPI Config Request message header
142 * Function : fillTlvs
145 * -Fills FAPI Config Request message header
147 * @params[in] Pointer to TLV
154 * ****************************************************************/
155 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
156 uint32_t value, uint32_t *msgLen)
159 tlv->tl.length = length;
161 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
163 /*******************************************************************
165 * @brief fills the cyclic prefix by comparing the bitmask
169 * Function : fillCyclicPrefix
172 * -checks the value with the bitmask and
173 * fills the cellPtr's cyclic prefix.
175 * @params[in] Pointer to ClCellParam
176 * Value to be compared
179 ********************************************************************/
180 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
182 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
184 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
186 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
188 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
192 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
196 /*******************************************************************
198 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
202 * Function : fillSubcarrierSpaceDl
205 * -checks the value with the bitmask and
206 * fills the cellPtr's subcarrier spacing in DL
208 * @params[in] Pointer to ClCellParam
209 * Value to be compared
212 * ****************************************************************/
214 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
216 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
218 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
220 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
222 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
224 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
226 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
228 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
230 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
234 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
238 /*******************************************************************
240 * @brief fills the downlink bandwidth by comparing the bitmask
244 * Function : fillBandwidthDl
247 * -checks the value with the bitmask and
248 * -fills the cellPtr's DL Bandwidth
250 * @params[in] Pointer to ClCellParam
251 * Value to be compared
254 * ****************************************************************/
256 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
258 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
260 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
262 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
264 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
266 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
268 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
270 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
272 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
274 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
276 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
278 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
280 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
282 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
284 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
286 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
288 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
290 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
292 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
294 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
296 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
298 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
300 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
302 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
304 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
306 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
308 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
312 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
316 /*******************************************************************
318 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
322 * Function : fillSubcarrierSpaceUl
325 * -checks the value with the bitmask and
326 * -fills cellPtr's subcarrier spacing in UL
328 * @params[in] Pointer to ClCellParam
329 * Value to be compared
332 * ****************************************************************/
334 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
336 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
338 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
340 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
342 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
344 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
346 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
348 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
350 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
354 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
358 /*******************************************************************
360 * @brief fills the uplink bandwidth by comparing the bitmask
364 * Function : fillBandwidthUl
367 * -checks the value with the bitmask and
368 * fills the cellPtr's UL Bandwidth
372 * @params[in] Pointer to ClCellParam
373 * Value to be compared
377 * ****************************************************************/
379 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
381 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
383 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
385 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
387 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
389 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
391 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
393 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
395 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
397 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
399 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
401 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
403 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
405 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
407 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
409 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
411 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
413 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
415 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
417 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
419 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
421 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
423 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
425 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
427 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
429 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
431 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
435 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
438 /*******************************************************************
440 * @brief fills the CCE maping by comparing the bitmask
444 * Function : fillCCEmaping
447 * -checks the value with the bitmask and
448 * fills the cellPtr's CCE Mapping Type
451 * @params[in] Pointer to ClCellParam
452 * Value to be compared
455 * ****************************************************************/
457 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
459 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
461 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
463 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
465 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
469 (*cellPtr)->cceMappingType = INVALID_VALUE;
473 /*******************************************************************
475 * @brief fills the PUCCH format by comparing the bitmask
479 * Function : fillPucchFormat
482 * -checks the value with the bitmask and
483 * fills the cellPtr's pucch format
486 * @params[in] Pointer to ClCellParam
487 * Value to be compared
490 * ****************************************************************/
492 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
494 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
496 (*cellPtr)->pucchFormats = FORMAT_0;
498 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
500 (*cellPtr)->pucchFormats = FORMAT_1;
502 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
504 (*cellPtr)->pucchFormats = FORMAT_2;
506 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
508 (*cellPtr)->pucchFormats = FORMAT_3;
510 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
512 (*cellPtr)->pucchFormats = FORMAT_4;
516 (*cellPtr)->pucchFormats = INVALID_VALUE;
520 /*******************************************************************
522 * @brief fills the PDSCH Mapping Type by comparing the bitmask
526 * Function : fillPdschMappingType
529 * -checks the value with the bitmask and
530 * fills the cellPtr's PDSCH MappingType
532 * @params[in] Pointer to ClCellParam
533 * Value to be compared
536 * ****************************************************************/
538 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
540 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
542 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
544 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
546 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
550 (*cellPtr)->pdschMappingType = INVALID_VALUE;
554 /*******************************************************************
556 * @brief fills the PDSCH Allocation Type by comparing the bitmask
560 * Function : fillPdschAllocationType
563 * -checks the value with the bitmask and
564 * fills the cellPtr's PDSCH AllocationType
566 * @params[in] Pointer to ClCellParam
567 * Value to be compared
570 * ****************************************************************/
572 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
574 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
576 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
578 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
580 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
584 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
588 /*******************************************************************
590 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
594 * Function : fillPrbMappingType
597 * -checks the value with the bitmask and
598 * fills the cellPtr's PRB Mapping Type
600 * @params[in] Pointer to ClCellParam
601 * Value to be compared
604 ******************************************************************/
605 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
607 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
609 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
611 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
613 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
617 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
621 /*******************************************************************
623 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
627 * Function : fillPdschDmrsConfigType
630 * -checks the value with the bitmask and
631 * fills the cellPtr's DmrsConfig Type
633 * @params[in] Pointer to ClCellParam
634 * Value to be compared
637 ******************************************************************/
639 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
641 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
643 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
645 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
647 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
651 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
655 /*******************************************************************
657 * @brief fills the PDSCH DmrsLength by comparing the bitmask
661 * Function : fillPdschDmrsLength
664 * -checks the value with the bitmask and
665 * fills the cellPtr's PdschDmrsLength
667 * @params[in] Pointer to ClCellParam
668 * Value to be compared
671 ******************************************************************/
672 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
674 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
676 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
678 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
680 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
684 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
688 /*******************************************************************
690 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
694 * Function : fillPdschDmrsAddPos
697 * -checks the value with the bitmask and
698 * fills the cellPtr's Pdsch DmrsAddPos
700 * @params[in] Pointer to ClCellParam
701 * Value to be compared
704 ******************************************************************/
706 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
708 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
710 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
712 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
714 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
716 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
718 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
720 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
722 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
726 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
730 /*******************************************************************
732 * @brief fills the Modulation Order in DL by comparing the bitmask
736 * Function : fillModulationOrderDl
739 * -checks the value with the bitmask and
740 * fills the cellPtr's ModulationOrder in DL.
742 * @params[in] Pointer to ClCellParam
743 * Value to be compared
746 ******************************************************************/
747 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
751 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
755 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
759 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
763 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
767 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
771 /*******************************************************************
773 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
777 * Function : fillPuschDmrsConfigType
780 * -checks the value with the bitmask and
781 * fills the cellPtr's PUSCH DmrsConfigType
783 * @params[in] Pointer to ClCellParam
784 * Value to be compared
787 ******************************************************************/
789 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
791 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
793 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
795 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
797 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
801 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
805 /*******************************************************************
807 * @brief fills the PUSCH DmrsLength by comparing the bitmask
811 * Function : fillPuschDmrsLength
814 * -checks the value with the bitmask and
815 * fills the cellPtr's PUSCH DmrsLength
817 * @params[in] Pointer to ClCellParam
818 * Value to be compared
821 ******************************************************************/
823 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
825 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
827 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
829 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
831 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
835 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
839 /*******************************************************************
841 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
845 * Function : fillPuschDmrsAddPos
848 * -checks the value with the bitmask and
849 * fills the cellPtr's PUSCH DmrsAddPos
851 * @params[in] Pointer to ClCellParam
852 * Value to be compared
855 ******************************************************************/
857 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
859 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
861 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
863 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
865 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
867 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
869 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
871 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
873 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
877 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
881 /*******************************************************************
883 * @brief fills the PUSCH Mapping Type by comparing the bitmask
887 * Function : fillPuschMappingType
890 * -checks the value with the bitmask and
891 * fills the cellPtr's PUSCH MappingType
893 * @params[in] Pointer to ClCellParam
894 * Value to be compared
897 ******************************************************************/
899 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
901 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
903 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
905 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
907 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
911 (*cellPtr)->puschMappingType = INVALID_VALUE;
915 /*******************************************************************
917 * @brief fills the PUSCH Allocation Type by comparing the bitmask
921 * Function : fillPuschAllocationType
924 * -checks the value with the bitmask and
925 * fills the cellPtr's PUSCH AllocationType
927 * @params[in] Pointer to ClCellParam
928 * Value to be compared
931 ******************************************************************/
933 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
935 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
937 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
939 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
941 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
945 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
949 /*******************************************************************
951 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
955 * Function : fillPuschPrbMappingType
958 * -checks the value with the bitmask and
959 * fills the cellPtr's PUSCH PRB MApping Type
961 * @params[in] Pointer to ClCellParam
962 * Value to be compared
965 ******************************************************************/
967 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
969 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
971 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
973 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
975 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
979 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
983 /*******************************************************************
985 * @brief fills the Modulation Order in Ul by comparing the bitmask
989 * Function : fillModulationOrderUl
992 * -checks the value with the bitmask and
993 * fills the cellPtr's Modualtsion Order in UL.
995 * @params[in] Pointer to ClCellParam
996 * Value to be compared
999 ******************************************************************/
1001 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
1005 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
1009 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
1013 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1017 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1021 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1025 /*******************************************************************
1027 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1031 * Function : fillPuschAggregationFactor
1034 * -checks the value with the bitmask and
1035 * fills the cellPtr's PUSCH Aggregation Factor
1037 * @params[in] Pointer to ClCellParam
1038 * Value to be compared
1041 ******************************************************************/
1043 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1045 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1047 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1049 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1051 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1053 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1055 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1057 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1059 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1063 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1067 /*******************************************************************
1069 * @brief fills the PRACH Long Format by comparing the bitmask
1073 * Function : fillPrachLongFormat
1076 * -checks the value with the bitmask and
1077 * fills the cellPtr's PRACH Long Format
1079 * @params[in] Pointer to ClCellParam
1080 * Value to be compared
1083 ******************************************************************/
1085 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1087 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1089 (*cellPtr)->prachLongFormats = FORMAT_0;
1091 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1093 (*cellPtr)->prachLongFormats = FORMAT_1;
1095 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1097 (*cellPtr)->prachLongFormats = FORMAT_2;
1099 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1101 (*cellPtr)->prachLongFormats = FORMAT_3;
1105 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1109 /*******************************************************************
1111 * @brief fills the PRACH Short Format by comparing the bitmask
1115 * Function : fillPrachShortFormat
1118 * -checks the value with the bitmask and
1119 * fills the cellPtr's PRACH ShortFormat
1121 * @params[in] Pointer to ClCellParam
1122 * Value to be compared
1125 ******************************************************************/
1127 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1129 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1131 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1133 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1135 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1137 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1139 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1141 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1143 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1145 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1147 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1149 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1151 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1153 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1155 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1157 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1159 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1161 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1163 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1167 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1171 /*******************************************************************
1173 * @brief fills the Fd Occasions Type by comparing the bitmask
1177 * Function : fillFdOccasions
1180 * -checks the value with the bitmask and
1181 * fills the cellPtr's Fd Occasions
1183 * @params[in] Pointer to ClCellParam
1184 * Value to be compared
1187 ******************************************************************/
1189 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1193 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1197 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1201 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1205 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1209 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1213 /*******************************************************************
1215 * @brief fills the RSSI Measurement by comparing the bitmask
1219 * Function : fillRssiMeas
1222 * -checks the value with the bitmask and
1223 * fills the cellPtr's RSSI Measurement report
1225 * @params[in] Pointer to ClCellParam
1226 * Value to be compared
1229 ******************************************************************/
1231 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1233 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1235 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1237 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1239 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1243 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1247 /*******************************************************************
1249 * @brief Returns the TLVs value
1253 * Function : getParamValue
1256 * -return TLVs value
1259 * @return ROK - temp
1262 * ****************************************************************/
1264 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1267 posPtr = &tlv->tl.tag;
1268 posPtr += sizeof(tlv->tl.tag);
1269 posPtr += sizeof(tlv->tl.length);
1270 /*TO DO: malloc to SSI memory */
1271 if(type == FAPI_UINT_8)
1273 return(*(uint8_t *)posPtr);
1275 else if(type == FAPI_UINT_16)
1277 return(*(uint16_t *)posPtr);
1279 else if(type == FAPI_UINT_32)
1281 return(*(uint32_t *)posPtr);
1285 DU_LOG("\nERROR --> LWR_MAC: Value Extraction failed" );
1291 /*******************************************************************
1293 * @brief Modifes the received mibPdu to uint32 bit
1294 * and stores it in MacCellCfg
1298 * Function : setMibPdu
1303 * @params[in] Pointer to mibPdu
1304 * pointer to modified value
1305 ******************************************************************/
1306 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1308 *mibPdu |= (((uint8_t)(sfn << 2)) & MIB_SFN_BITMASK);
1309 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1310 DU_LOG("\nDEBUG --> LWR_MAC: MIB PDU %x", *val);
1313 /*******************************************************************
1315 * @brief Sends FAPI Param req to PHY
1319 * Function : lwr_mac_procParamReqEvt
1322 * -Sends FAPI Param req to PHY
1325 * @return ROK - success
1328 * ****************************************************************/
1330 uint8_t lwr_mac_procParamReqEvt(void *msg)
1333 #ifdef CALL_FLOW_DEBUG_LOG
1334 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : PARAM_REQ\n");
1337 /* startGuardTimer(); */
1338 fapi_param_req_t *paramReq = NULL;
1339 fapi_msg_header_t *msgHeader;
1340 p_fapi_api_queue_elem_t paramReqElem;
1341 p_fapi_api_queue_elem_t headerElem;
1343 LWR_MAC_ALLOC(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1344 if(paramReq != NULL)
1346 FILL_FAPI_LIST_ELEM(paramReqElem, NULLP, FAPI_PARAM_REQUEST, 1, \
1347 sizeof(fapi_tx_data_req_t));
1348 paramReq = (fapi_param_req_t *)(paramReqElem +1);
1349 memset(paramReq, 0, sizeof(fapi_param_req_t));
1350 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, sizeof(fapi_param_req_t));
1352 /* Fill message header */
1353 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1356 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for param req header");
1357 LWR_MAC_FREE(paramReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_param_req_t)));
1360 FILL_FAPI_LIST_ELEM(headerElem, paramReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1361 sizeof(fapi_msg_header_t));
1362 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1363 msgHeader->num_msg = 1;
1364 msgHeader->handle = 0;
1366 DU_LOG("\nDEBUG --> LWR_MAC: Sending Param Request to Phy");
1367 LwrMacSendToL1(headerElem);
1371 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for Param Request");
1378 /*******************************************************************
1380 * @brief Sends FAPI Param Response to MAC via PHY
1384 * Function : lwr_mac_procParamRspEvt
1387 * -Sends FAPI Param rsp to MAC via PHY
1390 * @return ROK - success
1393 * ****************************************************************/
1395 uint8_t lwr_mac_procParamRspEvt(void *msg)
1398 /* stopGuardTimer(); */
1400 uint32_t encodedVal;
1401 fapi_param_resp_t *paramRsp;
1402 ClCellParam *cellParam = NULLP;
1404 paramRsp = (fapi_param_resp_t *)msg;
1405 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1407 if(paramRsp != NULLP)
1409 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1410 if(cellParam != NULLP)
1412 DU_LOG("\nDEBUG --> LWR_MAC: Filling TLVS into MAC API");
1413 if(paramRsp->error_code == MSG_OK)
1415 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1417 switch(paramRsp->tlvs[index].tl.tag)
1419 case FAPI_RELEASE_CAPABILITY_TAG:
1420 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1421 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1423 cellParam->releaseCapability = RELEASE_15;
1427 case FAPI_PHY_STATE_TAG:
1428 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1429 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1431 DU_LOG("\nERROR --> PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1436 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1437 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1438 if(encodedVal != RFAILED && encodedVal != 0)
1440 cellParam->skipBlankDlConfig = SUPPORTED;
1444 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1448 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1449 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1450 if(encodedVal != RFAILED && encodedVal != 0)
1452 cellParam->skipBlankUlConfig = SUPPORTED;
1456 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1460 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1461 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1464 case FAPI_CYCLIC_PREFIX_TAG:
1465 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1466 if(encodedVal != RFAILED)
1468 fillCyclicPrefix(encodedVal, &cellParam);
1472 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1473 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1474 if(encodedVal != RFAILED)
1476 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1480 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1481 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1482 if(encodedVal != RFAILED)
1484 fillBandwidthDl(encodedVal, &cellParam);
1488 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1489 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1490 if(encodedVal != RFAILED)
1492 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1496 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1497 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1498 if(encodedVal != RFAILED)
1500 fillBandwidthUl(encodedVal, &cellParam);
1504 case FAPI_CCE_MAPPING_TYPE_TAG:
1505 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1506 if(encodedVal != RFAILED)
1508 fillCCEmaping(encodedVal, &cellParam);
1512 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1513 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1514 if(encodedVal != RFAILED && encodedVal != 0)
1516 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1520 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1524 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1525 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1526 if(encodedVal != RFAILED && encodedVal != 0)
1528 cellParam->precoderGranularityCoreset = SUPPORTED;
1532 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1536 case FAPI_PDCCH_MU_MIMO_TAG:
1537 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1538 if(encodedVal != RFAILED && encodedVal != 0)
1540 cellParam->pdcchMuMimo = SUPPORTED;
1544 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1548 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1549 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1550 if(encodedVal != RFAILED && encodedVal != 0)
1552 cellParam->pdcchPrecoderCycling = SUPPORTED;
1556 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1560 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1561 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1564 case FAPI_PUCCH_FORMATS_TAG:
1565 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1566 if(encodedVal != RFAILED)
1568 fillPucchFormat(encodedVal, &cellParam);
1572 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1573 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1576 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1577 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1578 if(encodedVal != RFAILED)
1580 fillPdschMappingType(encodedVal, &cellParam);
1584 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1585 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1586 if(encodedVal != RFAILED)
1588 fillPdschAllocationType(encodedVal, &cellParam);
1592 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1593 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1594 if(encodedVal != RFAILED)
1596 fillPrbMappingType(encodedVal, &cellParam);
1600 case FAPI_PDSCH_CBG_TAG:
1601 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1602 if(encodedVal != RFAILED && encodedVal != 0)
1604 cellParam->pdschCbg = SUPPORTED;
1608 cellParam->pdschCbg = NOT_SUPPORTED;
1612 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1613 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1614 if(encodedVal != RFAILED)
1616 fillPdschDmrsConfigType(encodedVal, &cellParam);
1620 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1621 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1622 if(encodedVal != RFAILED)
1624 fillPdschDmrsLength(encodedVal, &cellParam);
1628 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1629 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1630 if(encodedVal != RFAILED)
1632 fillPdschDmrsAddPos(encodedVal, &cellParam);
1636 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1637 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1640 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1641 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1642 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1644 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1648 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1649 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1650 if(encodedVal != RFAILED)
1652 fillModulationOrderDl(encodedVal, &cellParam);
1656 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1657 cellParam->maxMuMimoUsersDl = \
1658 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1661 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1662 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1663 if(encodedVal != RFAILED && encodedVal != 0)
1665 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1669 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1673 case FAPI_PREMPTIONSUPPORT_TAG:
1674 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1675 if(encodedVal != RFAILED && encodedVal != 0)
1677 cellParam->premptionSupport = SUPPORTED;
1681 cellParam->premptionSupport = NOT_SUPPORTED;
1685 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1686 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1687 if(encodedVal != RFAILED && encodedVal != 0)
1689 cellParam->pdschNonSlotSupport = SUPPORTED;
1693 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1697 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1698 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1699 if(encodedVal != RFAILED && encodedVal != 0)
1701 cellParam->uciMuxUlschInPusch = SUPPORTED;
1705 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1709 case FAPI_UCI_ONLY_PUSCH_TAG:
1710 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1711 if(encodedVal != RFAILED && encodedVal != 0)
1713 cellParam->uciOnlyPusch = SUPPORTED;
1717 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1721 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1722 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1723 if(encodedVal != RFAILED && encodedVal != 0)
1725 cellParam->puschFrequencyHopping = SUPPORTED;
1729 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1733 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1734 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1735 if(encodedVal != RFAILED)
1737 fillPuschDmrsConfig(encodedVal, &cellParam);
1741 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1742 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1743 if(encodedVal != RFAILED)
1745 fillPuschDmrsLength(encodedVal, &cellParam);
1749 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1750 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1751 if(encodedVal != RFAILED)
1753 fillPuschDmrsAddPos(encodedVal, &cellParam);
1757 case FAPI_PUSCH_CBG_TAG:
1758 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1759 if(encodedVal != RFAILED && encodedVal != 0)
1761 cellParam->puschCbg = SUPPORTED;
1765 cellParam->puschCbg = NOT_SUPPORTED;
1769 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1770 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1771 if(encodedVal != RFAILED)
1773 fillPuschMappingType(encodedVal, &cellParam);
1777 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1778 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1779 if(encodedVal != RFAILED)
1781 fillPuschAllocationType(encodedVal, &cellParam);
1785 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1786 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1787 if(encodedVal != RFAILED)
1789 fillPuschPrbMappingType(encodedVal, &cellParam);
1793 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1794 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1795 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1797 cellParam->puschMaxPtrsPorts = encodedVal;
1801 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1802 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1805 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1806 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1809 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1810 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1811 if(encodedVal != RFAILED)
1813 fillModulationOrderUl(encodedVal, &cellParam);
1817 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1818 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1821 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1822 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1823 if(encodedVal != RFAILED && encodedVal != 0)
1825 cellParam->dftsOfdmSupport = SUPPORTED;
1829 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1833 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1834 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1835 if(encodedVal != RFAILED)
1837 fillPuschAggregationFactor(encodedVal, &cellParam);
1841 case FAPI_PRACH_LONG_FORMATS_TAG:
1842 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1843 if(encodedVal != RFAILED)
1845 fillPrachLongFormat(encodedVal, &cellParam);
1849 case FAPI_PRACH_SHORT_FORMATS_TAG:
1850 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1851 if(encodedVal != RFAILED)
1853 fillPrachShortFormat(encodedVal, &cellParam);
1857 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1858 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1859 if(encodedVal != RFAILED && encodedVal != 0)
1861 cellParam->prachRestrictedSets = SUPPORTED;
1865 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1869 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1870 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1871 if(encodedVal != RFAILED)
1873 fillFdOccasions(encodedVal, &cellParam);
1877 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1878 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1879 if(encodedVal != RFAILED)
1881 fillRssiMeas(encodedVal, &cellParam);
1885 //DU_LOG("\nERROR --> Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1889 MAC_FREE(cellParam, sizeof(ClCellParam));
1890 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1895 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", paramRsp->error_code);
1901 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for cell param");
1907 DU_LOG("\nERROR --> LWR_MAC: Param Response received from PHY is NULL");
1915 #ifdef INTEL_TIMER_MODE
1916 uint8_t lwr_mac_procIqSamplesReqEvt(void *msg)
1918 void * wlsHdlr = NULLP;
1919 fapi_msg_header_t *msgHeader;
1920 fapi_vendor_ext_iq_samples_req_t *iqSampleReq;
1921 p_fapi_api_queue_elem_t headerElem;
1922 p_fapi_api_queue_elem_t iqSampleElem;
1923 char filename[100] = "/root/intel/FlexRAN/testcase/ul/mu0_20mhz/2/uliq00_prach_tst2.bin";
1925 uint8_t buffer[] ={0,0,0,0,0,2,11,0,212,93,40,0,20,137,38,0,20,0,20,0,0,8,0,8,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,2,2,2,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,1,0,0,0,0,0,0,1,0,2,0,0,0,0,0,0,0,1,0};
1927 size_t bufferSize = sizeof(buffer) / sizeof(buffer[0]);
1929 /* Fill IQ sample req */
1930 mtGetWlsHdl(&wlsHdlr);
1931 //iqSampleElem = (p_fapi_api_queue_elem_t)WLS_Alloc(wlsHdlr, \
1932 (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1933 LWR_MAC_ALLOC(iqSampleElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_ext_iq_samples_req_t)));
1936 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for IQ sample req");
1939 FILL_FAPI_LIST_ELEM(iqSampleElem, NULLP, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, 1, \
1940 sizeof(fapi_vendor_ext_iq_samples_req_t));
1942 iqSampleReq = (fapi_vendor_ext_iq_samples_req_t *)(iqSampleElem + 1);
1943 memset(iqSampleReq, 0, sizeof(fapi_vendor_ext_iq_samples_req_t));
1944 fillMsgHeader(&iqSampleReq->header, FAPI_VENDOR_EXT_UL_IQ_SAMPLES, \
1945 sizeof(fapi_vendor_ext_iq_samples_req_t));
1947 iqSampleReq->iq_samples_info.carrNum = 0;
1948 iqSampleReq->iq_samples_info.numSubframes = 40;
1949 iqSampleReq->iq_samples_info.nIsRadioMode = 0;
1950 iqSampleReq->iq_samples_info.timerModeFreqDomain = 0;
1951 iqSampleReq->iq_samples_info.phaseCompensationEnable = 0;
1952 iqSampleReq->iq_samples_info.startFrameNum = 0;
1953 iqSampleReq->iq_samples_info.startSlotNum = 0;
1954 iqSampleReq->iq_samples_info.startSymNum = 0;
1955 strncpy(iqSampleReq->iq_samples_info.filename_in_ul_iq[0], filename, 100);
1956 memcpy(iqSampleReq->iq_samples_info.buffer, buffer, bufferSize);
1958 /* TODO : Fill remaining parameters */
1960 /* Fill message header */
1961 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
1964 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for FAPI header in lwr_mac_procIqSamplesReqEvt");
1967 FILL_FAPI_LIST_ELEM(headerElem, iqSampleElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
1968 sizeof(fapi_msg_header_t));
1969 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
1970 msgHeader->num_msg = 1;
1971 msgHeader->handle = 0;
1973 DU_LOG("\nINFO --> LWR_MAC: Sending IQ Sample request to Phy");
1974 LwrMacSendToL1(headerElem);
1979 /*******************************************************************
1981 * @brief Sends FAPI Config req to PHY
1985 * Function : lwr_mac_procConfigReqEvt
1988 * -Sends FAPI Config Req to PHY
1991 * @return ROK - success
1994 * ****************************************************************/
1996 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1999 #ifdef CALL_FLOW_DEBUG_LOG
2000 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : CONFIG_REQ\n");
2003 uint8_t slotIdx = 0;
2004 uint8_t symbolIdx =0;
2007 uint16_t *cellId =NULLP;
2008 uint16_t cellIdx =0;
2009 uint32_t msgLen = 0;
2011 uint32_t dlFreq = 0, ulFreq = 0;
2012 MacCellCfg macCfgParams;
2013 fapi_vendor_msg_t *vendorMsg;
2014 fapi_config_req_t *configReq;
2015 fapi_msg_header_t *msgHeader;
2016 p_fapi_api_queue_elem_t headerElem;
2017 p_fapi_api_queue_elem_t vendorMsgQElem;
2018 p_fapi_api_queue_elem_t cfgReqQElem;
2020 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2023 cellId = (uint16_t *)msg;
2024 GET_CELL_IDX(*cellId, cellIdx);
2025 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
2027 /* Fill Cell Configuration in lwrMacCb */
2028 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
2029 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
2030 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.cellCfg.phyCellId;
2033 /* Allocte And fill Vendor msg */
2034 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2037 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2040 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2041 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
2042 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2043 vendorMsg->config_req_vendor.hopping_id = 0;
2044 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
2045 vendorMsg->config_req_vendor.group_hop_flag = 0;
2046 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
2047 vendorMsg->config_req_vendor.urllc_capable = 0;
2048 vendorMsg->config_req_vendor.urllc_mini_slot_mask =0;
2049 vendorMsg->config_req_vendor.nr_of_dl_ports =1;
2050 vendorMsg->config_req_vendor.nr_of_ul_ports =1;
2051 vendorMsg->config_req_vendor.prach_nr_of_rx_ru =1;
2052 vendorMsg->config_req_vendor.ssb_subc_spacing =1;
2053 vendorMsg->config_req_vendor.use_vendor_EpreXSSB = USE_VENDOR_EPREXSSB;
2054 vendorMsg->start_req_vendor.sfn = 0;
2055 vendorMsg->start_req_vendor.slot = 0;
2056 vendorMsg->start_req_vendor.mode = 4;
2058 vendorMsg->start_req_vendor.count = 0;
2059 vendorMsg->start_req_vendor.period = 1;
2061 /* Fill FAPI config req */
2062 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2065 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for config req");
2066 LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2069 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
2070 sizeof(fapi_config_req_t));
2072 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
2073 memset(configReq, 0, sizeof(fapi_config_req_t));
2074 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
2076 configReq->number_of_tlvs = 25;
2078 configReq->number_of_tlvs = 25 + 1 + MAX_TDD_PERIODICITY_SLOTS * MAX_SYMB_PER_SLOT;
2081 msgLen = sizeof(configReq->number_of_tlvs);
2083 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
2084 sizeof(uint32_t), macCfgParams.carrCfg.dlBw, &msgLen);
2085 dlFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnDL);
2086 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
2087 sizeof(uint32_t), dlFreq, &msgLen);
2088 /* Due to bug in Intel FT code, commenting TLVs that are are not
2089 * needed to avoid error. Must be uncommented when FT bug is fixed */
2090 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
2091 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
2092 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
2093 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
2094 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
2095 sizeof(uint16_t), macCfgParams.carrCfg.numTxAnt, &msgLen);
2096 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
2097 sizeof(uint32_t), macCfgParams.carrCfg.ulBw, &msgLen);
2098 ulFreq = convertArfcnToFreqKhz(macCfgParams.carrCfg.arfcnUL);
2099 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
2100 sizeof(uint32_t), ulFreq, &msgLen);
2101 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
2102 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
2103 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
2104 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
2105 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
2106 sizeof(uint16_t), macCfgParams.carrCfg.numRxAnt, &msgLen);
2107 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
2108 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
2110 /* fill cell config */
2111 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
2112 sizeof(uint8_t), macCfgParams.cellCfg.phyCellId, &msgLen);
2113 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
2114 sizeof(uint8_t), macCfgParams.cellCfg.dupType, &msgLen);
2116 /* fill SSB configuration */
2117 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
2118 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
2119 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
2120 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
2121 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
2122 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
2124 /* fill PRACH configuration */
2125 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2126 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2127 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2128 sizeof(uint8_t), convertScsValToScsEnum(macCfgParams.prachCfg.prachSubcSpacing), &msgLen);
2129 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2130 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2131 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2132 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2133 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2134 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2135 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2136 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2137 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2138 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2139 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2140 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2141 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2142 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2143 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2144 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2145 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2147 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2148 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2149 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2154 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2157 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2158 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2159 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2160 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2162 /* fill SSB table */
2163 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2164 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2165 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2166 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2167 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2168 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2169 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2170 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2172 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2173 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2174 sizeof(uint32_t), mib, &msgLen);
2176 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2177 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2178 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2179 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2180 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2181 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2182 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2183 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2186 /* fill TDD table */
2187 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2188 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2190 for(slotIdx =0 ;slotIdx < MAX_TDD_PERIODICITY_SLOTS; slotIdx++)
2192 for(symbolIdx = 0; symbolIdx < MAX_SYMB_PER_SLOT; symbolIdx++)
2194 /*Fill Full-DL Slots as well as DL symbols ini 1st Flexi Slo*/
2195 if(slotIdx < macCfgParams.tddCfg.nrOfDlSlots || \
2196 (slotIdx == macCfgParams.tddCfg.nrOfDlSlots && symbolIdx < macCfgParams.tddCfg.nrOfDlSymbols))
2198 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2199 sizeof(uint8_t), DL_SYMBOL, &msgLen);
2202 /*Fill Full-FLEXI SLOT and as well as Flexi Symbols in 1 slot preceding FULL-UL slot*/
2203 else if(slotIdx < (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) || \
2204 (slotIdx == (MAX_TDD_PERIODICITY_SLOTS - macCfgParams.tddCfg.nrOfUlSlots -1) && \
2205 symbolIdx < (MAX_SYMB_PER_SLOT - macCfgParams.tddCfg.nrOfUlSymbols)))
2207 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2208 sizeof(uint8_t), FLEXI_SYMBOL, &msgLen);
2210 /*Fill Partial UL symbols and Full-UL slot*/
2213 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2214 sizeof(uint8_t), UL_SYMBOL, &msgLen);
2220 /* fill measurement config */
2221 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2222 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2224 /* fill DMRS Type A Pos */
2225 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2226 sizeof(uint8_t), macCfgParams.ssbCfg.dmrsTypeAPos, &msgLen);
2228 /* Fill message header */
2229 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2232 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2233 LWR_MAC_FREE(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
2234 LWR_MAC_FREE(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2237 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2238 sizeof(fapi_msg_header_t));
2239 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2240 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2241 msgHeader->handle = 0;
2243 DU_LOG("\nDEBUG --> LWR_MAC: Sending Config Request to Phy");
2244 LwrMacSendToL1(headerElem);
2248 } /* lwr_mac_handleConfigReqEvt */
2250 /*******************************************************************
2252 * @brief Processes config response from phy
2256 * Function : lwr_mac_procConfigRspEvt
2259 * Processes config response from phy
2261 * @params[in] FAPI message pointer
2262 * @return ROK - success
2265 * ****************************************************************/
2267 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2270 fapi_config_resp_t *configRsp;
2271 configRsp = (fapi_config_resp_t *)msg;
2273 DU_LOG("\nINFO --> LWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2276 if(configRsp != NULL)
2278 if(configRsp->error_code == MSG_OK)
2280 DU_LOG("\nDEBUG --> LWR_MAC: PHY has moved to Configured state \n");
2281 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2282 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2284 * Store config response into an intermediate struture and send to MAC
2285 * Support LC and LWLC for sending config rsp to MAC
2287 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2291 DU_LOG("\nERROR --> LWR_MAC: Invalid error code %d", configRsp->error_code);
2297 DU_LOG("\nERROR --> LWR_MAC: Config Response received from PHY is NULL");
2303 } /* lwr_mac_procConfigRspEvt */
2305 /*******************************************************************
2307 * @brief Build and send start request to phy
2311 * Function : lwr_mac_procStartReqEvt
2314 * Build and send start request to phy
2316 * @params[in] FAPI message pointer
2317 * @return ROK - success
2320 * ****************************************************************/
2321 uint8_t lwr_mac_procStartReqEvt(void *msg)
2324 #ifdef CALL_FLOW_DEBUG_LOG
2325 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : START_REQ\n");
2327 fapi_msg_header_t *msgHeader;
2328 fapi_start_req_t *startReq;
2329 fapi_vendor_msg_t *vendorMsg;
2330 p_fapi_api_queue_elem_t headerElem;
2331 p_fapi_api_queue_elem_t startReqElem;
2332 p_fapi_api_queue_elem_t vendorMsgElem;
2334 /* Allocte And fill Vendor msg */
2335 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2338 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in start req");
2341 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2342 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2343 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2344 vendorMsg->start_req_vendor.sfn = 0;
2345 vendorMsg->start_req_vendor.slot = 0;
2346 vendorMsg->start_req_vendor.mode = 4; /* for Radio mode */
2348 vendorMsg->start_req_vendor.count = 0;
2349 vendorMsg->start_req_vendor.period = 1;
2352 /* Fill FAPI config req */
2353 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2356 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for start req");
2357 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2360 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2361 sizeof(fapi_start_req_t));
2363 startReq = (fapi_start_req_t *)(startReqElem + 1);
2364 memset(startReq, 0, sizeof(fapi_start_req_t));
2365 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2367 /* Fill message header */
2368 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2371 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
2372 LWR_MAC_FREE(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2373 LWR_MAC_FREE(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2376 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2377 sizeof(fapi_msg_header_t));
2378 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2379 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2380 msgHeader->handle = 0;
2383 DU_LOG("\nDEBUG --> LWR_MAC: Sending Start Request to Phy");
2384 LwrMacSendToL1(headerElem);
2387 } /* lwr_mac_procStartReqEvt */
2389 /*******************************************************************
2391 * @brief Sends FAPI Stop Req to PHY
2395 * Function : lwr_mac_procStopReqEvt
2398 * -Sends FAPI Stop Req to PHY
2401 * @return ROK - success
2404 ********************************************************************/
2406 uint8_t lwr_mac_procStopReqEvt(SlotTimingInfo slotInfo, p_fapi_api_queue_elem_t prevElem, fapi_stop_req_vendor_msg_t *vendorMsg)
2409 #ifdef CALL_FLOW_DEBUG_LOG
2410 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : STOP_REQ\n");
2413 fapi_stop_req_t *stopReq;
2414 p_fapi_api_queue_elem_t stopReqElem;
2416 vendorMsg->sfn = slotInfo.sfn;
2417 vendorMsg->slot = slotInfo.slot;
2419 /* Fill FAPI stop req */
2420 LWR_MAC_ALLOC(stopReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_stop_req_t)));
2423 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for stop req");
2426 FILL_FAPI_LIST_ELEM(stopReqElem, NULLP, FAPI_STOP_REQUEST, 1, sizeof(fapi_stop_req_t));
2427 stopReq = (fapi_stop_req_t *)(stopReqElem + 1);
2428 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2429 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, sizeof(fapi_stop_req_t));
2432 DU_LOG("\nINFO --> LWR_MAC: Sending Stop Request to Phy");
2433 prevElem->p_next = stopReqElem;
2440 /*******************************************************************
2442 * @brief fills SSB PDU required for DL TTI info in MAC
2446 * Function : fillSsbPdu
2449 * -Fills the SSB PDU info
2452 * @params[in] Pointer to FAPI DL TTI Req
2453 * Pointer to RgCellCb
2454 * Pointer to msgLen of DL TTI Info
2457 ******************************************************************/
2459 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2460 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2462 uint32_t mibPayload = 0;
2463 if(dlTtiReqPdu != NULL)
2465 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2466 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
2467 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2468 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2469 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;;
2470 /* ssbOfPdufstA to be filled in ssbCfg */
2471 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;;
2472 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2473 /* Bit manipulation for SFN */
2474 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2475 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2476 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2477 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2478 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2479 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2480 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2481 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2482 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2488 /*******************************************************************
2490 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2494 * Function : fillSib1DlDciPdu
2497 * -Fills the Dl DCI PDU
2499 * @params[in] Pointer to fapi_dl_dci_t
2500 * Pointer to PdcchCfg
2503 ******************************************************************/
2505 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2507 if(dlDciPtr != NULLP)
2513 uint16_t coreset0Size=0;
2516 uint32_t freqDomResAssign=0;
2517 uint32_t timeDomResAssign=0;
2518 uint8_t VRB2PRBMap=0;
2519 uint32_t modNCodScheme=0;
2520 uint8_t redundancyVer=0;
2521 uint32_t sysInfoInd=0;
2522 uint32_t reserved=0;
2524 /* Size(in bits) of each field in DCI format 0_1
2525 * as mentioned in spec 38.214 */
2526 uint8_t freqDomResAssignSize = 0;
2527 uint8_t timeDomResAssignSize = 4;
2528 uint8_t VRB2PRBMapSize = 1;
2529 uint8_t modNCodSchemeSize = 5;
2530 uint8_t redundancyVerSize = 2;
2531 uint8_t sysInfoIndSize = 1;
2532 uint8_t reservedSize = 15;
2534 dlDciPtr[0].rnti = sib1PdcchInfo->dci[0].rnti;
2535 dlDciPtr[0].scramblingId = sib1PdcchInfo->dci[0].scramblingId;
2536 dlDciPtr[0].scramblingRnti = sib1PdcchInfo->dci[0].scramblingRnti;
2537 dlDciPtr[0].cceIndex = sib1PdcchInfo->dci[0].cceIndex;
2538 dlDciPtr[0].aggregationLevel = sib1PdcchInfo->dci[0].aggregLevel;
2539 dlDciPtr[0].pc_and_bform.numPrgs = sib1PdcchInfo->dci[0].beamPdcchInfo.numPrgs;
2540 dlDciPtr[0].pc_and_bform.prgSize = sib1PdcchInfo->dci[0].beamPdcchInfo.prgSize;
2541 dlDciPtr[0].pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
2542 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
2543 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
2544 dlDciPtr[0].beta_pdcch_1_0 = sib1PdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
2545 dlDciPtr[0].powerControlOffsetSS = sib1PdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
2547 /* Calculating freq domain resource allocation field value and size
2548 * coreset0Size = Size of coreset 0
2549 * RBStart = Starting Virtual Rsource block
2550 * RBLen = length of contiguously allocted RBs
2551 * Spec 38.214 Sec 5.1.2.2.2
2553 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2554 rbStart = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.startPrb;
2555 rbLen = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.numPrb;
2557 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2559 if((rbLen - 1) <= floor(coreset0Size / 2))
2560 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2562 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2563 + (coreset0Size - 1 - rbStart);
2565 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2568 /* Fetching DCI field values */
2569 timeDomResAssign = sib1PdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex -1;
2570 VRB2PRBMap = sib1PdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2571 modNCodScheme = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
2572 redundancyVer = sib1PdcchInfo->dci[0].pdschCfg.codeword[0].rvIndex;
2573 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2576 /* Reversing bits in each DCI field */
2577 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2578 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2579 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2580 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2581 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2582 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2584 /* Calulating total number of bytes in buffer */
2585 dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2586 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2587 + sysInfoIndSize + reservedSize;
2589 numBytes = dlDciPtr[0].payloadSizeBits / 8;
2590 if(dlDciPtr[0].payloadSizeBits % 8)
2593 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2595 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2599 /* Initialize buffer */
2600 for(bytePos = 0; bytePos < numBytes; bytePos++)
2601 dlDciPtr[0].payload[bytePos] = 0;
2603 bytePos = numBytes - 1;
2606 /* Packing DCI format fields */
2607 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2608 freqDomResAssign, freqDomResAssignSize);
2609 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2610 timeDomResAssign, timeDomResAssignSize);
2611 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2612 VRB2PRBMap, VRB2PRBMapSize);
2613 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2614 modNCodScheme, modNCodSchemeSize);
2615 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2616 redundancyVer, redundancyVerSize);
2617 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2618 sysInfoInd, sysInfoIndSize);
2619 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2620 reserved, reservedSize);
2623 } /* fillSib1DlDciPdu */
2626 /*******************************************************************
2628 * @brief fills Dl DCI PDU for Paging required for DL TTI info in MAC
2632 * Function : fillPageDlDciPdu
2635 * -Fills the Dl DCI PDU for Paging
2637 * @params[in] Pointer to fapi_dl_dci_t
2638 * Pointer to dlPageAlloc
2641 ******************************************************************/
2643 void fillPageDlDciPdu(fapi_dl_dci_t *dlDciPtr, DlPageAlloc *dlPageAlloc, MacCellCfg *macCellCfg)
2645 if(dlDciPtr != NULLP)
2651 uint16_t coreset0Size = 0;
2652 uint16_t rbStart = 0;
2654 uint8_t shortMsgInd = 0;
2655 uint8_t shortMsg = 0;
2656 uint32_t freqDomResAssign = 0;
2657 uint32_t timeDomResAssign = 0;
2658 uint8_t VRB2PRBMap = 0;
2659 uint32_t modNCodScheme = 0;
2660 uint8_t tbScaling = 0;
2661 uint32_t reserved = 0;
2663 /* Size(in bits) of each field in DCI format 1_0
2664 * as mentioned in spec 38.214 */
2665 uint8_t shortMsgIndSize = 2;
2666 uint8_t shortMsgSize = 8;
2667 uint8_t freqDomResAssignSize = 0;
2668 uint8_t timeDomResAssignSize = 4;
2669 uint8_t VRB2PRBMapSize = 1;
2670 uint8_t modNCodSchemeSize = 5;
2671 uint8_t tbScalingSize = 2;
2672 uint8_t reservedSize = 6;
2674 dlDciPtr[0].rnti = P_RNTI;
2675 dlDciPtr[0].scramblingId = macCellCfg->cellCfg.phyCellId;
2676 dlDciPtr[0].scramblingRnti = 0;
2677 dlDciPtr[0].cceIndex = dlPageAlloc->pageDlDci.cceIndex;
2678 dlDciPtr[0].aggregationLevel = dlPageAlloc->pageDlDci.aggregLevel;
2679 dlDciPtr[0].pc_and_bform.numPrgs = 1;
2680 dlDciPtr[0].pc_and_bform.prgSize = 1;
2681 dlDciPtr[0].pc_and_bform.digBfInterfaces = 0;
2682 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = 0;
2683 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = 0;
2684 dlDciPtr[0].beta_pdcch_1_0 = 0;
2685 dlDciPtr[0].powerControlOffsetSS = 0;
2687 /* Calculating freq domain resource allocation field value and size
2688 * coreset0Size = Size of coreset 0
2689 * RBStart = Starting Virtual Rsource block
2690 * RBLen = length of contiguously allocted RBs
2691 * Spec 38.214 Sec 5.1.2.2.2
2693 coreset0Size = dlPageAlloc->pageDlDci.coreSetSize;
2694 rbStart = dlPageAlloc->pageDlSch.freqAlloc.startPrb;
2695 rbLen = dlPageAlloc->pageDlSch.freqAlloc.numPrb;
2697 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2699 if((rbLen - 1) <= floor(coreset0Size / 2))
2700 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2702 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2703 + (coreset0Size - 1 - rbStart);
2705 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2708 /*Fetching DCI field values */
2710 /*Refer:38.212 - Table 7.3.1.2.1-1: Short Message indicator >*/
2711 if(dlPageAlloc->shortMsgInd != TRUE)
2713 /*When Short Msg is absent*/
2719 /*Short Msg is Present*/
2720 if(dlPageAlloc->pageDlSch.dlPagePduLen == 0 || dlPageAlloc->pageDlSch.dlPagePdu == NULLP)
2722 /*When Paging Msg is absent*/
2727 /*Both Short and Paging is present*/
2730 shortMsg = dlPageAlloc->shortMsg;
2733 timeDomResAssign = 0;
2734 VRB2PRBMap = dlPageAlloc->pageDlSch.vrbPrbMapping;
2735 modNCodScheme = dlPageAlloc->pageDlSch.tbInfo.mcs;
2739 /* Reversing bits in each DCI field */
2740 shortMsgInd = reverseBits(shortMsgInd, shortMsgIndSize);
2741 shortMsg = reverseBits(shortMsg, shortMsgSize);
2742 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2743 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2744 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2745 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2746 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2747 tbScaling = reverseBits(tbScaling, tbScalingSize);
2749 /* Calulating total number of bytes in buffer */
2750 dlDciPtr[0].payloadSizeBits = shortMsgIndSize + shortMsgSize + freqDomResAssignSize\
2751 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2752 + tbScaling + reservedSize;
2754 numBytes = dlDciPtr[0].payloadSizeBits / 8;
2755 if(dlDciPtr[0].payloadSizeBits % 8)
2760 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2762 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2766 /* Initialize buffer */
2767 for(bytePos = 0; bytePos < numBytes; bytePos++)
2769 dlDciPtr[0].payload[bytePos] = 0;
2772 bytePos = numBytes - 1;
2775 /* Packing DCI format fields */
2776 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2777 shortMsgInd, shortMsgIndSize);
2778 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2779 shortMsg, shortMsgSize);
2780 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2781 freqDomResAssign, freqDomResAssignSize);
2782 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2783 timeDomResAssign, timeDomResAssignSize);
2784 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2785 VRB2PRBMap, VRB2PRBMapSize);
2786 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2787 modNCodScheme, modNCodSchemeSize);
2788 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2789 tbScaling, tbScalingSize);
2790 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2791 reserved, reservedSize);
2793 } /* fillPageDlDciPdu */
2795 /*******************************************************************
2797 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2801 * Function : fillRarDlDciPdu
2804 * -Fills the Dl DCI PDU
2806 * @params[in] Pointer to fapi_dl_dci_t
2807 * Pointer to PdcchCfg
2810 ******************************************************************/
2812 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2814 if(dlDciPtr != NULLP)
2816 uint8_t numBytes =0;
2820 uint16_t coreset0Size =0;
2821 uint16_t rbStart =0;
2823 uint32_t freqDomResAssign =0;
2824 uint8_t timeDomResAssign =0;
2825 uint8_t VRB2PRBMap =0;
2826 uint8_t modNCodScheme =0;
2827 uint8_t tbScaling =0;
2828 uint32_t reserved =0;
2830 /* Size(in bits) of each field in DCI format 1_0 */
2831 uint8_t freqDomResAssignSize = 0;
2832 uint8_t timeDomResAssignSize = 4;
2833 uint8_t VRB2PRBMapSize = 1;
2834 uint8_t modNCodSchemeSize = 5;
2835 uint8_t tbScalingSize = 2;
2836 uint8_t reservedSize = 16;
2838 dlDciPtr[0].rnti = rarPdcchInfo->dci[0].rnti;
2839 dlDciPtr[0].scramblingId = rarPdcchInfo->dci[0].scramblingId;
2840 dlDciPtr[0].scramblingRnti = rarPdcchInfo->dci[0].scramblingRnti;
2841 dlDciPtr[0].cceIndex = rarPdcchInfo->dci[0].cceIndex;
2842 dlDciPtr[0].aggregationLevel = rarPdcchInfo->dci[0].aggregLevel;
2843 dlDciPtr[0].pc_and_bform.numPrgs = rarPdcchInfo->dci[0].beamPdcchInfo.numPrgs;
2844 dlDciPtr[0].pc_and_bform.prgSize = rarPdcchInfo->dci[0].beamPdcchInfo.prgSize;
2845 dlDciPtr[0].pc_and_bform.digBfInterfaces = rarPdcchInfo->dci[0].beamPdcchInfo.digBfInterfaces;
2846 dlDciPtr[0].pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].pmIdx;
2847 dlDciPtr[0].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci[0].beamPdcchInfo.prg[0].beamIdx[0];
2848 dlDciPtr[0].beta_pdcch_1_0 = rarPdcchInfo->dci[0].txPdcchPower.beta_pdcch_1_0;
2849 dlDciPtr[0].powerControlOffsetSS = rarPdcchInfo->dci[0].txPdcchPower.powerControlOffsetSS;
2851 /* Calculating freq domain resource allocation field value and size
2852 * coreset0Size = Size of coreset 0
2853 * RBStart = Starting Virtual Rsource block
2854 * RBLen = length of contiguously allocted RBs
2855 * Spec 38.214 Sec 5.1.2.2.2
2858 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2859 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2860 rbStart = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.startPrb;
2861 rbLen = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.numPrb;
2863 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2865 if((rbLen - 1) <= floor(coreset0Size / 2))
2866 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2868 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2869 + (coreset0Size - 1 - rbStart);
2871 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2874 /* Fetching DCI field values */
2875 timeDomResAssign = rarPdcchInfo->dci[0].pdschCfg.pdschTimeAlloc.rowIndex;
2876 VRB2PRBMap = rarPdcchInfo->dci[0].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
2877 modNCodScheme = rarPdcchInfo->dci[0].pdschCfg.codeword[0].mcsIndex;
2878 tbScaling = 0; /* configured to 0 scaling */
2881 /* Reversing bits in each DCI field */
2882 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2883 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2884 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2885 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2886 tbScaling = reverseBits(tbScaling, tbScalingSize);
2888 /* Calulating total number of bytes in buffer */
2889 dlDciPtr[0].payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2890 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2892 numBytes = dlDciPtr[0].payloadSizeBits / 8;
2893 if(dlDciPtr[0].payloadSizeBits % 8)
2896 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2898 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
2902 /* Initialize buffer */
2903 for(bytePos = 0; bytePos < numBytes; bytePos++)
2904 dlDciPtr[0].payload[bytePos] = 0;
2906 bytePos = numBytes - 1;
2909 /* Packing DCI format fields */
2910 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2911 freqDomResAssign, freqDomResAssignSize);
2912 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2913 timeDomResAssign, timeDomResAssignSize);
2914 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2915 VRB2PRBMap, VRB2PRBMapSize);
2916 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2917 modNCodScheme, modNCodSchemeSize);
2918 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2919 tbScaling, tbScalingSize);
2920 fillDlDciPayload(dlDciPtr[0].payload, &bytePos, &bitPos,\
2921 reserved, reservedSize);
2923 } /* fillRarDlDciPdu */
2925 /*******************************************************************
2927 * @brief fills DL DCI PDU required for DL TTI info in MAC
2931 * Function : fillDlMsgDlDciPdu
2934 * -Fills the Dl DCI PDU
2936 * @params[in] Pointer to fapi_dl_dci_t
2937 * Pointer to PdcchCfg
2940 ******************************************************************/
2941 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2942 DlMsgSchInfo *dlMsgSchInfo)
2944 uint8_t dciIndex = 0;
2945 if(dlDciPtr != NULLP)
2951 uint16_t coresetSize = 0;
2952 uint16_t rbStart = 0;
2954 uint8_t dciFormatId;
2955 uint32_t freqDomResAssign;
2956 uint8_t timeDomResAssign;
2958 uint8_t modNCodScheme;
2960 uint8_t redundancyVer = 0;
2961 uint8_t harqProcessNum = 0;
2962 uint8_t dlAssignmentIdx = 0;
2963 uint8_t pucchTpc = 0;
2964 uint8_t pucchResoInd = 0;
2965 uint8_t harqFeedbackInd = 0;
2967 /* Size(in bits) of each field in DCI format 1_0 */
2968 uint8_t dciFormatIdSize = 1;
2969 uint8_t freqDomResAssignSize = 0;
2970 uint8_t timeDomResAssignSize = 4;
2971 uint8_t VRB2PRBMapSize = 1;
2972 uint8_t modNCodSchemeSize = 5;
2973 uint8_t ndiSize = 1;
2974 uint8_t redundancyVerSize = 2;
2975 uint8_t harqProcessNumSize = 4;
2976 uint8_t dlAssignmentIdxSize = 2;
2977 uint8_t pucchTpcSize = 2;
2978 uint8_t pucchResoIndSize = 3;
2979 uint8_t harqFeedbackIndSize = 3;
2981 for(dciIndex = 0; dciIndex < pdcchInfo->numDlDci; dciIndex++)
2983 dlDciPtr[dciIndex].rnti = pdcchInfo->dci[dciIndex].rnti;
2984 dlDciPtr[dciIndex].scramblingId = pdcchInfo->dci[dciIndex].scramblingId;
2985 dlDciPtr[dciIndex].scramblingRnti = pdcchInfo->dci[dciIndex].scramblingRnti;
2986 dlDciPtr[dciIndex].cceIndex = pdcchInfo->dci[dciIndex].cceIndex;
2987 dlDciPtr[dciIndex].aggregationLevel = pdcchInfo->dci[dciIndex].aggregLevel;
2988 dlDciPtr[dciIndex].pc_and_bform.numPrgs = pdcchInfo->dci[dciIndex].beamPdcchInfo.numPrgs;
2989 dlDciPtr[dciIndex].pc_and_bform.prgSize = pdcchInfo->dci[dciIndex].beamPdcchInfo.prgSize;
2990 dlDciPtr[dciIndex].pc_and_bform.digBfInterfaces = pdcchInfo->dci[dciIndex].beamPdcchInfo.digBfInterfaces;
2991 dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].pmIdx;
2992 dlDciPtr[dciIndex].pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci[dciIndex].beamPdcchInfo.prg[0].beamIdx[0];
2993 dlDciPtr[dciIndex].beta_pdcch_1_0 = pdcchInfo->dci[dciIndex].txPdcchPower.beta_pdcch_1_0;
2994 dlDciPtr[dciIndex].powerControlOffsetSS = pdcchInfo->dci[dciIndex].txPdcchPower.powerControlOffsetSS;
2996 /* Calculating freq domain resource allocation field value and size
2997 * coreset0Size = Size of coreset 0
2998 * RBStart = Starting Virtual Rsource block
2999 * RBLen = length of contiguously allocted RBs
3000 * Spec 38.214 Sec 5.1.2.2.2
3002 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
3003 rbStart = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.startPrb;
3004 rbLen = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.numPrb;
3006 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
3008 if((rbLen - 1) <= floor(coresetSize / 2))
3009 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
3011 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
3012 + (coresetSize - 1 - rbStart);
3014 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
3017 /* Fetching DCI field values */
3018 dciFormatId = dlMsgSchInfo->dciFormatId; /* Always set to 1 for DL */
3019 timeDomResAssign = pdcchInfo->dci[dciIndex].pdschCfg.pdschTimeAlloc.rowIndex -1;
3020 VRB2PRBMap = pdcchInfo->dci[dciIndex].pdschCfg.pdschFreqAlloc.vrbPrbMapping;
3021 modNCodScheme = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].mcsIndex;
3022 ndi = dlMsgSchInfo->transportBlock[0].ndi;
3023 redundancyVer = pdcchInfo->dci[dciIndex].pdschCfg.codeword[0].rvIndex;
3024 harqProcessNum = dlMsgSchInfo->harqProcNum;
3025 dlAssignmentIdx = dlMsgSchInfo->dlAssignIdx;
3026 pucchTpc = dlMsgSchInfo->pucchTpc;
3027 pucchResoInd = dlMsgSchInfo->pucchResInd;
3028 harqFeedbackInd = dlMsgSchInfo->harqFeedbackInd;
3030 /* Reversing bits in each DCI field */
3031 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
3032 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3033 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3034 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
3035 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3036 ndi = reverseBits(ndi, ndiSize);
3037 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
3038 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
3039 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
3040 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
3041 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
3042 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
3045 /* Calulating total number of bytes in buffer */
3046 dlDciPtr[dciIndex].payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3047 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
3048 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
3049 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
3051 numBytes = dlDciPtr[dciIndex].payloadSizeBits / 8;
3052 if(dlDciPtr[dciIndex].payloadSizeBits % 8)
3055 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3057 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
3061 /* Initialize buffer */
3062 for(bytePos = 0; bytePos < numBytes; bytePos++)
3063 dlDciPtr[dciIndex].payload[bytePos] = 0;
3065 bytePos = numBytes - 1;
3068 /* Packing DCI format fields */
3069 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3070 dciFormatId, dciFormatIdSize);
3071 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3072 freqDomResAssign, freqDomResAssignSize);
3073 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3074 timeDomResAssign, timeDomResAssignSize);
3075 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3076 VRB2PRBMap, VRB2PRBMapSize);
3077 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3078 modNCodScheme, modNCodSchemeSize);
3079 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3081 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3082 redundancyVer, redundancyVerSize);
3083 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3084 redundancyVer, redundancyVerSize);
3085 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3086 harqProcessNum, harqProcessNumSize);
3087 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3088 dlAssignmentIdx, dlAssignmentIdxSize);
3089 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3090 pucchTpc, pucchTpcSize);
3091 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3092 pucchResoInd, pucchResoIndSize);
3093 fillDlDciPayload(dlDciPtr[dciIndex].payload, &bytePos, &bitPos,\
3094 harqFeedbackInd, harqFeedbackIndSize);
3099 /*******************************************************************
3101 * @brief fills Dl PDCCH Info from DL PageAlloc
3105 * Function : fillPdcchInfoFrmPageAlloc
3108 * -Fills the PdcchInfo
3110 * @params[in] Pointer to DlPageAlloc
3111 * Pointer to PdcchCfg
3114 ******************************************************************/
3115 void fillPagePdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc, MacCellCfg *macCellCfg)
3117 if(dlTtiReqPdu != NULLP)
3119 BwpCfg *bwp = NULLP;
3121 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3122 bwp = &pageAlloc->bwp;
3123 fillPageDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pageAlloc, macCellCfg);
3125 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3127 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3128 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3129 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3130 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3132 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pageAlloc->pageDlDci.ssStartSymbolIndex;
3133 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pageAlloc->pageDlDci.durationSymbols;
3134 convertFreqDomRsrcMapToIAPIFormat(pageAlloc->pageDlDci.freqDomainResource, \
3135 dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
3136 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pageAlloc->pageDlDci.cceRegMappingType;
3137 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pageAlloc->pageDlDci.cceReg.interleaved.regBundleSize;
3138 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pageAlloc->pageDlDci.cceReg.interleaved.interleaverSize;
3139 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pageAlloc->pageDlDci.cceReg.interleaved.shiftIndex;
3140 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pageAlloc->pageDlDci.precoderGranularity;
3141 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = 1;
3142 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = CORESET_TYPE0;
3144 /* Calculating PDU length. Considering only one dl dci pdu for now */
3145 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3147 /* Filling Vendor message PDU */
3148 dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3149 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3150 dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3151 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
3152 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
3156 /*******************************************************************
3158 * @brief fills PDCCH PDU required for DL TTI info in MAC
3162 * Function : fillPdcchPdu
3165 * -Fills the Pdcch PDU info
3168 * @params[in] Pointer to FAPI DL TTI Req
3169 * Pointer to PdcchCfg
3172 ******************************************************************/
3173 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, MacDlSlot *dlSlot, int8_t dlMsgSchInfoIdx, \
3174 RntiType rntiType, uint8_t coreSetType, uint8_t ueIdx)
3176 uint8_t dciIndex = 0;
3178 if(dlTtiReqPdu != NULLP)
3180 PdcchCfg *pdcchInfo = NULLP;
3181 BwpCfg *bwp = NULLP;
3183 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
3184 if(rntiType == SI_RNTI_TYPE)
3186 pdcchInfo = dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg;
3187 bwp = &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp;
3188 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3190 else if(rntiType == RA_RNTI_TYPE)
3192 pdcchInfo = dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg;
3193 bwp = &dlSlot->dlInfo.rarAlloc[ueIdx]->bwp;
3194 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
3196 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
3198 pdcchInfo = dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg;
3199 bwp = &dlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp;
3200 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
3201 dlSlot->dlInfo.dlMsgAlloc[ueIdx]);
3205 DU_LOG("\nERROR --> LWR_MAC: Failed filling PDCCH Pdu");
3209 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
3210 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
3211 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
3212 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
3213 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
3215 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
3216 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
3217 convertFreqDomRsrcMapToIAPIFormat(pdcchInfo->coresetCfg.freqDomainResource,\
3218 dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource);
3219 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
3220 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
3221 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
3222 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
3223 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
3224 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
3225 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
3227 /* Calculating PDU length. Considering only one dl dci pdu for now */
3228 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3230 /* Filling Vendor message PDU */
3231 dlTtiVendorPdu->pdu_type = FAPI_PDCCH_PDU_TYPE;
3232 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdcch_pdu_t);
3233 dlTtiVendorPdu->pdu.pdcch_pdu.num_dl_dci = dlTtiReqPdu->pdu.pdcch_pdu.numDlDci;
3234 for(dciIndex = 0; dciIndex < dlTtiReqPdu->pdu.pdcch_pdu.numDlDci; dciIndex++)
3236 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_pdcch_to_ssb = 0;
3237 dlTtiVendorPdu->pdu.pdcch_pdu.dl_dci[dciIndex].epre_ratio_of_dmrs_to_ssb = 0;
3244 /*******************************************************************
3246 * @brief fills PDSCH PDU from PageAlloc required for DL TTI info in MAC
3250 * Function : fillPagePdschPdu
3253 * -Fills the Pdsch PDU info
3256 * @params[in] Pointer to FAPI DL TTI Req
3257 * Pointer to PdschCfg
3258 * Pointer to msgLen of DL TTI Info
3261 ******************************************************************/
3262 void fillPagePdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, DlPageAlloc *pageAlloc,
3263 uint16_t pduIndex, MacCellCfg *macCellCfg)
3267 if(dlTtiReqPdu != NULLP)
3269 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3270 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3271 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = 0; /* PTRS and CBG params are excluded */
3272 dlTtiReqPdu->pdu.pdsch_pdu.rnti = P_RNTI;
3273 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3274 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = pageAlloc->bwp.freqAlloc.numPrb;
3275 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = pageAlloc->bwp.freqAlloc.startPrb;
3276 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = pageAlloc->bwp.subcarrierSpacing;
3277 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = pageAlloc->bwp.cyclicPrefix;
3278 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = 1;
3279 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3281 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = 308;
3282 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = 2;
3283 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pageAlloc->pageDlSch.tbInfo.mcs;
3284 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = 0;
3285 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = 0;
3286 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pageAlloc->pageDlSch.tbInfo.tbSize;
3288 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = macCellCfg->cellCfg.phyCellId;
3289 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = 1;
3290 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = 0;
3291 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = 0;
3292 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = DL_DMRS_SYMBOL_POS;
3293 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pageAlloc->pageDlSch.dmrs.dmrsType;
3294 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = macCellCfg->cellCfg.phyCellId;
3295 dlTtiReqPdu->pdu.pdsch_pdu.scid = 0;
3296 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = 1;
3297 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = 0x0001;
3298 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = 1;
3299 /* since we are using type-1, hence rbBitmap excluded */
3300 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pageAlloc->pageDlSch.freqAlloc.startPrb;
3301 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pageAlloc->pageDlSch.freqAlloc.numPrb;
3302 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pageAlloc->pageDlSch.vrbPrbMapping;
3303 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pageAlloc->pageDlSch.timeAlloc.startSymb;
3304 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pageAlloc->pageDlSch.timeAlloc.numSymb;
3305 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = 1;
3306 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = 0;
3307 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
3308 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
3309 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0].beamIdx[0].beamidx = 0;
3310 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = 0;
3311 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = 0;
3312 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pageAlloc->pageDlSch.timeAlloc.mappingType;
3313 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pageAlloc->pageDlSch.dmrs.nrOfDmrsSymbols;
3314 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pageAlloc->pageDlSch.dmrs.dmrsAddPos;
3316 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3318 /* DL TTI Request vendor message */
3319 dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3320 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3321 dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3322 for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3324 dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3329 /*******************************************************************
3331 * @brief fills PDSCH PDU required for DL TTI info in MAC
3335 * Function : fillPdschPdu
3338 * -Fills the Pdsch PDU info
3341 * @params[in] Pointer to FAPI DL TTI Req
3342 * Pointer to PdschCfg
3343 * Pointer to msgLen of DL TTI Info
3346 ******************************************************************/
3348 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, fapi_vendor_dl_tti_req_pdu_t *dlTtiVendorPdu, PdschCfg *pdschInfo,
3349 BwpCfg bwp, uint16_t pduIndex)
3353 if(dlTtiReqPdu != NULLP)
3355 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
3356 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
3357 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
3358 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
3359 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
3360 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
3361 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
3362 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
3363 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
3364 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
3365 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
3367 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
3368 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
3369 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
3370 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
3371 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
3372 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
3374 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
3375 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
3376 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
3377 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
3378 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
3379 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
3380 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
3381 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
3382 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
3383 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
3384 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
3385 /* since we are using type-1, hence rbBitmap excluded */
3386 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.startPrb;
3387 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.numPrb;
3388 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
3389 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.startSymb;
3390 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.numSymb;
3391 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
3392 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
3393 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
3394 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3395 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
3396 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
3397 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
3398 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
3399 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
3400 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
3401 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
3402 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
3404 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
3406 /* DL TTI Request vendor message */
3407 dlTtiVendorPdu->pdu_type = FAPI_PDSCH_PDU_TYPE;
3408 dlTtiVendorPdu->pdu_size = sizeof(fapi_vendor_dl_pdsch_pdu_t);
3409 dlTtiVendorPdu->pdu.pdsch_pdu.nr_of_antenna_ports = 1;
3410 for(int i =0; i< FAPI_VENDOR_MAX_TXRU_NUM; i++)
3412 dlTtiVendorPdu->pdu.pdsch_pdu.tx_ru_idx[i] =0;
3417 /***********************************************************************
3419 * @brief calculates the total size to be allocated for DL TTI Req
3423 * Function : calcDlTtiReqPduCount
3426 * -calculates the total pdu count to be allocated for DL TTI Req
3428 * @params[in] MacDlSlot *dlSlot
3431 * ********************************************************************/
3432 uint8_t calcDlTtiReqPduCount(MacDlSlot *dlSlot)
3435 uint8_t idx = 0, ueIdx=0;
3437 if(dlSlot->dlInfo.isBroadcastPres)
3439 if(dlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3441 for(idx = 0; idx < dlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3443 /* SSB PDU is filled */
3447 if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3449 /* PDCCH and PDSCH PDU is filled */
3454 if(dlSlot->pageAllocInfo)
3456 /* PDCCH and PDSCH PDU is filled */
3460 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3462 if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3464 /* PDCCH and PDSCH PDU is filled */
3465 if(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg && dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3471 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3473 /* PDCCH and PDSCH PDU is filled */
3474 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg)
3476 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3483 /***********************************************************************
3485 * @brief calculates the total size to be allocated for DL TTI Req
3489 * Function : calcTxDataReqPduCount
3492 * -calculates the total pdu count to be allocated for DL TTI Req
3494 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
3497 * ********************************************************************/
3498 uint8_t calcTxDataReqPduCount(MacDlSlot *dlSlot)
3500 uint8_t count = 0, ueIdx=0;
3502 if(dlSlot->dlInfo.isBroadcastPres && dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3506 if(dlSlot->pageAllocInfo)
3511 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3513 if((dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP) && (dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
3516 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3518 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3525 /***********************************************************************
3527 * @brief fills the SIB1 TX-DATA request message
3531 * Function : fillSib1TxDataReq
3534 * - fills the SIB1 TX-DATA request message
3536 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3537 * @params[in] macCellCfg consist of SIB1 pdu
3538 * @params[in] uint32_t *msgLen
3539 * @params[in] uint16_t pduIndex
3542 * ********************************************************************/
3543 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, MacCellCfg *macCellCfg,
3546 uint32_t payloadSize = 0;
3547 uint8_t *sib1Payload = NULLP;
3548 fapi_api_queue_elem_t *payloadElem = NULLP;
3549 #ifdef INTEL_WLS_MEM
3550 void * wlsHdlr = NULLP;
3553 pduDesc[pduIndex].pdu_index = pduIndex;
3554 pduDesc[pduIndex].num_tlvs = 1;
3557 payloadSize = pdschCfg->codeword[0].tbSize;
3558 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3559 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3560 LWR_MAC_ALLOC(sib1Payload, payloadSize);
3561 if(sib1Payload == NULLP)
3565 payloadElem = (fapi_api_queue_elem_t *)sib1Payload;
3566 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3567 macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3568 memcpy(sib1Payload + TX_PAYLOAD_HDR_LEN, macCellCfg->cellCfg.sib1Cfg.sib1Pdu, macCellCfg->cellCfg.sib1Cfg.sib1PduLen);
3570 #ifdef INTEL_WLS_MEM
3571 mtGetWlsHdl(&wlsHdlr);
3572 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, sib1Payload));
3574 pduDesc[pduIndex].tlvs[0].value = sib1Payload;
3576 pduDesc[pduIndex].pdu_length = payloadSize;
3578 #ifdef INTEL_WLS_MEM
3579 addWlsBlockToFree(sib1Payload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3581 LWR_MAC_FREE(sib1Payload, payloadSize);
3587 /***********************************************************************
3589 * @brief fills the PAGE TX-DATA request message
3593 * Function : fillPageTxDataReq
3596 * - fills the Page TX-DATA request message
3598 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3599 * @params[in] macCellCfg consist of SIB1 pdu
3600 * @params[in] uint32_t *msgLen
3601 * @params[in] uint16_t pduIndex
3604 * ********************************************************************/
3605 uint8_t fillPageTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlPageAlloc *pageAllocInfo)
3607 uint32_t payloadSize = 0;
3608 uint8_t *pagePayload = NULLP;
3609 fapi_api_queue_elem_t *payloadElem = NULLP;
3610 #ifdef INTEL_WLS_MEM
3611 void * wlsHdlr = NULLP;
3614 pduDesc[pduIndex].pdu_index = pduIndex;
3615 pduDesc[pduIndex].num_tlvs = 1;
3618 payloadSize = pageAllocInfo->pageDlSch.tbInfo.tbSize;
3619 pduDesc[pduIndex].tlvs[0].tl.tag = ((payloadSize & 0xff0000) >> 8) | FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3620 pduDesc[pduIndex].tlvs[0].tl.length = (payloadSize & 0x0000ffff);
3621 LWR_MAC_ALLOC(pagePayload, payloadSize);
3622 if(pagePayload == NULLP)
3626 payloadElem = (fapi_api_queue_elem_t *)pagePayload;
3627 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, \
3628 pageAllocInfo->pageDlSch.dlPagePduLen);
3629 memcpy(pagePayload + TX_PAYLOAD_HDR_LEN, pageAllocInfo->pageDlSch.dlPagePdu, pageAllocInfo->pageDlSch.dlPagePduLen);
3631 #ifdef INTEL_WLS_MEM
3632 mtGetWlsHdl(&wlsHdlr);
3633 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, pagePayload));
3635 pduDesc[pduIndex].tlvs[0].value = pagePayload;
3637 pduDesc[pduIndex].pdu_length = payloadSize;
3639 #ifdef INTEL_WLS_MEM
3640 addWlsBlockToFree(pagePayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3642 LWR_MAC_FREE(pagePayload, payloadSize);
3648 /***********************************************************************
3650 * @brief fills the RAR TX-DATA request message
3654 * Function : fillRarTxDataReq
3657 * - fills the RAR TX-DATA request message
3659 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3660 * @params[in] RarInfo *rarInfo
3661 * @params[in] uint32_t *msgLen
3662 * @params[in] uint16_t pduIndex
3665 * ********************************************************************/
3666 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, RarInfo *rarInfo, PdschCfg *pdschCfg)
3668 uint16_t payloadSize;
3669 uint8_t *rarPayload = NULLP;
3670 fapi_api_queue_elem_t *payloadElem = NULLP;
3671 #ifdef INTEL_WLS_MEM
3672 void * wlsHdlr = NULLP;
3675 pduDesc[pduIndex].pdu_index = pduIndex;
3676 pduDesc[pduIndex].num_tlvs = 1;
3679 payloadSize = pdschCfg->codeword[0].tbSize;
3680 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3681 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3682 LWR_MAC_ALLOC(rarPayload, payloadSize);
3683 if(rarPayload == NULLP)
3687 payloadElem = (fapi_api_queue_elem_t *)rarPayload;
3688 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, rarInfo->rarPduLen);
3689 memcpy(rarPayload + TX_PAYLOAD_HDR_LEN, rarInfo->rarPdu, rarInfo->rarPduLen);
3691 #ifdef INTEL_WLS_MEM
3692 mtGetWlsHdl(&wlsHdlr);
3693 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, rarPayload));
3695 pduDesc[pduIndex].tlvs[0].value = rarPayload;
3697 pduDesc[pduIndex].pdu_length = payloadSize;
3699 #ifdef INTEL_WLS_MEM
3700 addWlsBlockToFree(rarPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3702 LWR_MAC_FREE(rarPayload, payloadSize);
3707 /***********************************************************************
3709 * @brief fills the DL dedicated Msg TX-DATA request message
3713 * Function : fillDlMsgTxDataReq
3716 * - fills the Dl Dedicated Msg TX-DATA request message
3718 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3719 * @params[in] DlMsgInfo *dlMsgInfo
3720 * @params[in] uint32_t *msgLen
3721 * @params[in] uint16_t pduIndex
3724 * ********************************************************************/
3725 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, uint16_t pduIndex, DlMsgSchInfo *dlMsgSchInfo, PdschCfg *pdschCfg)
3727 uint16_t payloadSize;
3728 uint8_t *dlMsgPayload = NULLP;
3729 fapi_api_queue_elem_t *payloadElem = NULLP;
3730 #ifdef INTEL_WLS_MEM
3731 void * wlsHdlr = NULLP;
3734 pduDesc[pduIndex].pdu_index = pduIndex;
3735 pduDesc[pduIndex].num_tlvs = 1;
3738 payloadSize = pdschCfg->codeword[0].tbSize;
3739 pduDesc[pduIndex].tlvs[0].tl.tag = FAPI_TX_DATA_PTR_TO_PAYLOAD_64;
3740 pduDesc[pduIndex].tlvs[0].tl.length = payloadSize;
3741 LWR_MAC_ALLOC(dlMsgPayload, payloadSize);
3742 if(dlMsgPayload == NULLP)
3746 payloadElem = (fapi_api_queue_elem_t *)dlMsgPayload;
3747 FILL_FAPI_LIST_ELEM(payloadElem, NULLP, FAPI_VENDOR_MSG_PHY_ZBC_BLOCK_REQ, 1, dlMsgSchInfo->dlMsgPduLen);
3748 memcpy(dlMsgPayload + TX_PAYLOAD_HDR_LEN, dlMsgSchInfo->dlMsgPdu, dlMsgSchInfo->dlMsgPduLen);
3750 #ifdef INTEL_WLS_MEM
3751 mtGetWlsHdl(&wlsHdlr);
3752 pduDesc[pduIndex].tlvs[0].value = (uint8_t *)(WLS_VA2PA(wlsHdlr, dlMsgPayload));
3754 pduDesc[pduIndex].tlvs[0].value = dlMsgPayload;
3756 pduDesc[pduIndex].pdu_length = payloadSize;
3758 #ifdef INTEL_WLS_MEM
3759 addWlsBlockToFree(dlMsgPayload, payloadSize, (lwrMacCb.phySlotIndCntr-1));
3761 LWR_MAC_FREE(dlMsgPayload, payloadSize);
3768 /*******************************************************************
3770 * @brief Sends DL TTI Request to PHY
3774 * Function : fillDlTtiReq
3777 * -Sends FAPI DL TTI req to PHY
3779 * @params[in] timing info
3780 * @return ROK - success
3783 * ****************************************************************/
3784 uint16_t fillDlTtiReq(SlotTimingInfo currTimingInfo)
3786 #ifdef CALL_FLOW_DEBUG_LOG
3787 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : DL_TTI_REQUEST\n");
3793 uint8_t numPduEncoded = 0;
3795 uint16_t cellIdx =0;
3796 uint16_t pduIndex = 0;
3798 SlotTimingInfo dlTtiReqTimingInfo;
3799 MacDlSlot *currDlSlot = NULLP;
3800 MacCellCfg macCellCfg;
3802 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3803 fapi_msg_header_t *msgHeader = NULLP;
3804 p_fapi_api_queue_elem_t dlTtiElem;
3805 p_fapi_api_queue_elem_t headerElem;
3806 p_fapi_api_queue_elem_t prevElem;
3807 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3809 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3810 /* consider phy delay */
3811 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,gConfigInfo.gPhyDeltaDl, macCb.macCell[cellIdx]->numOfSlots);
3812 dlTtiReqTimingInfo.cellId = currTimingInfo.cellId;
3814 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3816 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3818 /* Vendor Message */
3819 fapi_vendor_msg_t *vendorMsg;
3820 p_fapi_api_queue_elem_t vendorMsgQElem;
3821 /* Allocte And fill Vendor msg */
3822 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
3825 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for vendor msg in config req");
3828 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
3829 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
3830 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
3832 LWR_MAC_ALLOC(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3835 FILL_FAPI_LIST_ELEM(dlTtiElem, NULLP, FAPI_DL_TTI_REQUEST, 1, \
3836 sizeof(fapi_dl_tti_req_t));
3837 /* Fill message header */
3838 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
3841 DU_LOG("\nERROR --> LWR_MAC: Memory allocation failed for header in DL TTI req");
3842 LWR_MAC_FREE(dlTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_dl_tti_req_t)));
3846 FILL_FAPI_LIST_ELEM(headerElem, dlTtiElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
3847 sizeof(fapi_msg_header_t));
3848 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
3849 msgHeader->num_msg = 2;
3850 msgHeader->handle = 0;
3852 /* Fill Dl TTI Request */
3853 dlTtiReq = (fapi_dl_tti_req_t *)(dlTtiElem +1);
3854 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3855 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, sizeof(fapi_dl_tti_req_t));
3857 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3858 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3859 dlTtiReq->nPdus = calcDlTtiReqPduCount(currDlSlot); /* get total Pdus */
3860 nPdu = dlTtiReq->nPdus;
3862 vendorMsg->p7_req_vendor.dl_tti_req.num_pdus = nPdu;
3863 vendorMsg->p7_req_vendor.dl_tti_req.sym = 0;
3865 dlTtiReq->nGroup = 0;
3866 if(dlTtiReq->nPdus > 0)
3868 if(currDlSlot->dlInfo.isBroadcastPres)
3870 if(currDlSlot->dlInfo.brdcstAlloc.ssbTransmissionMode)
3872 if(dlTtiReq->pdus != NULLP)
3874 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3876 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3877 currDlSlot, idx, dlTtiReq->sfn);
3881 DU_LOG("\033[1;31m");
3882 DU_LOG("\nDEBUG --> LWR_MAC: MIB sent..");
3886 if(currDlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
3888 /* Filling SIB1 param */
3889 if(numPduEncoded != nPdu)
3891 if(currDlSlot->dlInfo.brdcstAlloc.crnti == SI_RNTI)
3892 rntiType = SI_RNTI_TYPE;
3895 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3896 currDlSlot, -1, rntiType, CORESET_TYPE0, MAX_NUM_UE);
3900 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3901 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg,
3902 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3904 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3908 DU_LOG("\033[1;34m");
3909 DU_LOG("\nDEBUG --> LWR_MAC: SIB1 sent...");
3914 if(currDlSlot->pageAllocInfo != NULLP)
3916 /* Filling DL Paging Alloc param */
3917 if(numPduEncoded != nPdu)
3919 rntiType = P_RNTI_TYPE;
3920 fillPagePdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3921 currDlSlot->pageAllocInfo, &macCellCfg);
3923 fillPagePdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3924 currDlSlot->pageAllocInfo, pduIndex, &macCellCfg);
3925 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].pduIdx[pduIndex] = pduIndex;
3929 DU_LOG("\033[1;34m");
3930 DU_LOG("\nDEBUG --> LWR_MAC: PAGE sent...");
3934 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
3936 if(currDlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
3938 /* Filling RAR param */
3939 rntiType = RA_RNTI_TYPE;
3940 if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg)
3942 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3943 currDlSlot, -1, rntiType, CORESET_TYPE0, ueIdx);
3945 MAC_FREE(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdcchCfg, sizeof(PdcchCfg));
3947 if(currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg)
3949 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3950 currDlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg,
3951 currDlSlot->dlInfo.rarAlloc[ueIdx]->bwp,
3956 DU_LOG("\033[1;32m");
3957 DU_LOG("\nDEBUG --> LWR_MAC: RAR sent...");
3962 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
3964 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg) \
3966 rntiType = C_RNTI_TYPE;
3967 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded],
3968 currDlSlot, idx, rntiType, currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg->coresetCfg.coreSetType, ueIdx);
3972 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu != NULLP)
3974 if(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
3976 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded], &vendorMsg->p7_req_vendor.dl_tti_req.pdus[numPduEncoded], \
3977 currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,\
3978 currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->bwp, pduIndex);
3982 DU_LOG("\033[1;32m");
3983 if((macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status))
3985 DU_LOG("\nDEBUG --> LWR_MAC: MSG4 sent...");
3986 MAC_FREE(macCb.macCell[cellIdx]->macRaCb[ueIdx].macMsg4Status, sizeof(bool));
3990 DU_LOG("\nDEBUG --> LWR_MAC: DL MSG sent...");
3996 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdcchCfg,sizeof(PdcchCfg));
3999 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgAlloc));
4000 currDlSlot->dlInfo.dlMsgAlloc[ueIdx] = NULLP;
4006 dlTtiReq->ue_grp_info[dlTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
4009 #ifdef ODU_SLOT_IND_DEBUG_LOG
4010 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
4013 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4014 fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4015 msgHeader->num_msg++;
4017 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4018 fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4019 msgHeader->num_msg++;
4021 /* send Tx-DATA req message */
4022 sendTxDataReq(dlTtiReqTimingInfo, currDlSlot, dlTtiElem->p_next->p_next, &(vendorMsg->p7_req_vendor.tx_data_req));
4023 if(dlTtiElem->p_next->p_next->p_next)
4025 msgHeader->num_msg++;
4026 prevElem = dlTtiElem->p_next->p_next->p_next;
4029 prevElem = dlTtiElem->p_next->p_next;
4033 #ifdef ODU_SLOT_IND_DEBUG_LOG
4034 DU_LOG("\nDEBUG --> LWR_MAC: Sending DL TTI Request");
4036 /* Intel L1 expects UL_TTI.request following DL_TTI.request */
4037 fillUlTtiReq(currTimingInfo, dlTtiElem, &(vendorMsg->p7_req_vendor.ul_tti_req));
4038 msgHeader->num_msg++;
4040 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4041 fillUlDciReq(dlTtiReqTimingInfo, dlTtiElem->p_next, &(vendorMsg->p7_req_vendor.ul_dci_req));
4042 msgHeader->num_msg++;
4044 prevElem = dlTtiElem->p_next->p_next;
4047 if(macCb.macCell[cellIdx]->state == CELL_TO_BE_STOPPED)
4049 /* Intel L1 expects UL_DCI.request following DL_TTI.request */
4050 lwr_mac_procStopReqEvt(currTimingInfo, prevElem, &(vendorMsg->stop_req_vendor));
4051 msgHeader->num_msg++;
4052 macCb.macCell[cellIdx]->state = CELL_STOP_IN_PROGRESS;
4053 prevElem = prevElem->p_next;
4055 prevElem->p_next = vendorMsgQElem;
4056 LwrMacSendToL1(headerElem);
4057 memset(currDlSlot, 0, sizeof(MacDlSlot));
4062 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for DL TTI Request");
4063 memset(currDlSlot, 0, sizeof(MacDlSlot));
4069 lwr_mac_procInvalidEvt(&currTimingInfo);
4076 /*******************************************************************
4078 * @brief Sends TX data Request to PHY
4082 * Function : sendTxDataReq
4085 * -Sends FAPI TX data req to PHY
4087 * @params[in] timing info
4088 * @return ROK - success
4091 * ****************************************************************/
4092 uint16_t sendTxDataReq(SlotTimingInfo currTimingInfo, MacDlSlot *dlSlot, p_fapi_api_queue_elem_t prevElem, fapi_vendor_tx_data_req_t *vendorTxDataReq)
4095 #ifdef CALL_FLOW_DEBUG_LOG
4096 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : TX_DATA_REQ\n");
4102 uint16_t pduIndex = 0;
4103 fapi_tx_data_req_t *txDataReq =NULLP;
4104 p_fapi_api_queue_elem_t txDataElem = 0;
4106 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4108 /* send TX_Data request message */
4109 nPdu = calcTxDataReqPduCount(dlSlot);
4112 LWR_MAC_ALLOC(txDataElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_tx_data_req_t)));
4113 if(txDataElem == NULLP)
4115 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for TX data Request");
4119 FILL_FAPI_LIST_ELEM(txDataElem, NULLP, FAPI_TX_DATA_REQUEST, 1, \
4120 sizeof(fapi_tx_data_req_t));
4121 txDataReq = (fapi_tx_data_req_t *)(txDataElem +1);
4122 memset(txDataReq, 0, sizeof(fapi_tx_data_req_t));
4123 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, sizeof(fapi_tx_data_req_t));
4125 vendorTxDataReq->sym = 0;
4127 txDataReq->sfn = currTimingInfo.sfn;
4128 txDataReq->slot = currTimingInfo.slot;
4129 if(dlSlot->dlInfo.brdcstAlloc.sib1TransmissionMode)
4131 fillSib1TxDataReq(txDataReq->pdu_desc, pduIndex, &macCb.macCell[cellIdx]->macCellCfg, \
4132 &dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg->dci[0].pdschCfg);
4134 MAC_FREE(dlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdcchCfg,sizeof(PdcchCfg));
4135 txDataReq->num_pdus++;
4137 if(dlSlot->pageAllocInfo != NULLP)
4139 fillPageTxDataReq(txDataReq->pdu_desc, pduIndex, dlSlot->pageAllocInfo);
4141 txDataReq->num_pdus++;
4142 MAC_FREE(dlSlot->pageAllocInfo->pageDlSch.dlPagePdu, sizeof(dlSlot->pageAllocInfo->pageDlSch.dlPagePduLen));
4143 MAC_FREE(dlSlot->pageAllocInfo,sizeof(DlPageAlloc));
4146 for(ueIdx=0; ueIdx<MAX_NUM_UE; ueIdx++)
4148 if(dlSlot->dlInfo.rarAlloc[ueIdx] != NULLP)
4150 if((dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg))
4152 fillRarTxDataReq(txDataReq->pdu_desc, pduIndex, &dlSlot->dlInfo.rarAlloc[ueIdx]->rarInfo,\
4153 dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg);
4155 txDataReq->num_pdus++;
4156 MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx]->rarPdschCfg, sizeof(PdschCfg));
4158 MAC_FREE(dlSlot->dlInfo.rarAlloc[ueIdx],sizeof(RarAlloc));
4161 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx] != NULLP)
4163 if(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg)
4165 fillDlMsgTxDataReq(txDataReq->pdu_desc, pduIndex, \
4166 dlSlot->dlInfo.dlMsgAlloc[ueIdx], \
4167 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg);
4169 txDataReq->num_pdus++;
4170 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdschCfg,sizeof(PdschCfg));
4172 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu, \
4173 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPduLen);
4174 dlSlot->dlInfo.dlMsgAlloc[ueIdx]->dlMsgPdu = NULLP;
4175 MAC_FREE(dlSlot->dlInfo.dlMsgAlloc[ueIdx], sizeof(DlMsgSchInfo));
4179 /* Fill message header */
4180 DU_LOG("\nDEBUG --> LWR_MAC: Sending TX DATA Request");
4181 prevElem->p_next = txDataElem;
4187 /***********************************************************************
4189 * @brief calculates the total size to be allocated for UL TTI Req
4193 * Function : getnPdus
4196 * -calculates the total pdu count to be allocated for UL TTI Req
4198 * @params[in] Pointer to fapi Ul TTI Req
4199 * Pointer to CurrUlSlot
4201 * ********************************************************************/
4203 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
4205 uint8_t pduCount = 0, ueIdx = 0;
4207 if(ulTtiReq && currUlSlot)
4209 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PRACH)
4214 for(ueIdx = 0; ueIdx < MAX_NUM_UE; ueIdx++)
4216 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH)
4218 if(currUlSlot->ulSchInfo.schPuschInfo[ueIdx].crnti != 0)
4223 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
4225 if(currUlSlot->ulSchInfo.schPuschUci[ueIdx].crnti != 0)
4230 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_UCI)
4232 if(currUlSlot->ulSchInfo.schPucchInfo[ueIdx].crnti != 0)
4238 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_SRS)
4247 /***********************************************************************
4249 * @brief Set the value of zero correlation config in PRACH PDU
4253 * Function : setNumCs
4256 * -Set the value of zero correlation config in PRACH PDU
4258 * @params[in] Pointer to zero correlation config
4259 * Pointer to MacCellCfg
4260 * ********************************************************************/
4262 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
4266 if(macCellCfg != NULLP)
4268 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
4269 *numCs = UnrestrictedSetNcsTable[idx];
4274 /***********************************************************************
4276 * @brief Fills the PRACH PDU in UL TTI Request
4280 * Function : fillPrachPdu
4283 * -Fills the PRACH PDU in UL TTI Request
4285 * @params[in] Pointer to Prach Pdu
4286 * Pointer to CurrUlSlot
4287 * Pointer to macCellCfg
4289 * ********************************************************************/
4292 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
4294 if(ulTtiReqPdu != NULLP)
4296 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
4297 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->cellCfg.phyCellId;
4298 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
4299 currUlSlot->ulSchInfo.prachSchInfo.numPrachOcas;
4300 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
4301 currUlSlot->ulSchInfo.prachSchInfo.prachFormat;
4302 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulSchInfo.prachSchInfo.numRa;
4303 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
4304 currUlSlot->ulSchInfo.prachSchInfo.prachStartSymb;
4305 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
4306 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
4307 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
4308 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
4309 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
4310 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
4314 /*******************************************************************
4316 * @brief Filling PUSCH PDU in UL TTI Request
4320 * Function : fillPuschPdu
4322 * Functionality: Filling PUSCH PDU in UL TTI Request
4325 * @return ROK - success
4328 * ****************************************************************/
4329 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4330 SchPuschInfo *puschInfo)
4332 if(ulTtiReqPdu != NULLP)
4334 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
4335 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
4336 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
4337 ulTtiReqPdu->pdu.pusch_pdu.rnti = puschInfo->crnti;
4338 /* TODO : Fill handle in raCb when scheduling pusch and access here */
4339 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
4340 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4341 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4342 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
4343 macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4344 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
4345 macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4346 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
4347 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = puschInfo->tbInfo.qamOrder;
4348 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = puschInfo->tbInfo.mcs;
4349 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = puschInfo->tbInfo.mcsTable;
4350 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
4351 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = macCellCfg->cellId;
4352 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
4353 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
4354 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
4355 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = macCellCfg->cellId;
4356 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
4357 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
4358 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
4359 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
4360 puschInfo->fdAlloc.resAllocType;
4361 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
4362 puschInfo->fdAlloc.resAlloc.type1.startPrb;
4363 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
4364 puschInfo->fdAlloc.resAlloc.type1.numPrb;
4365 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
4366 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
4367 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
4368 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
4369 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
4370 puschInfo->tdAlloc.startSymb;
4371 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
4372 puschInfo->tdAlloc.numSymb;
4374 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
4375 puschInfo->dmrsMappingType;
4376 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
4377 puschInfo->nrOfDmrsSymbols;
4378 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
4379 puschInfo->dmrsAddPos;
4381 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
4382 puschInfo->tbInfo.rv;
4383 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
4384 puschInfo->harqProcId;
4385 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
4386 puschInfo->tbInfo.ndi;
4387 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
4388 puschInfo->tbInfo.tbSize;
4389 /* numCb is 0 for new transmission */
4390 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
4392 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
4394 /* UL TTI Vendor PDU */
4395 ulTtiVendorPdu->pdu_type = FAPI_PUSCH_PDU_TYPE;
4396 ulTtiVendorPdu->pdu.pusch_pdu.nr_of_antenna_ports=1;
4397 ulTtiVendorPdu->pdu.pusch_pdu.nr_of_rx_ru=1;
4398 for(int i =0; i< FAPI_VENDOR_MAX_RXRU_NUM; i++)
4400 ulTtiVendorPdu->pdu.pusch_pdu.rx_ru_idx[i]=0;
4405 /*******************************************************************
4407 * @brief Fill PUCCH PDU in Ul TTI Request
4411 * Function : fillPucchPdu
4413 * Functionality: Fill PUCCH PDU in Ul TTI Request
4416 * @return ROK - success
4419 * ****************************************************************/
4420 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, fapi_vendor_ul_tti_req_pdu_t *ulTtiVendorPdu, MacCellCfg *macCellCfg,\
4421 SchPucchInfo *pucchInfo)
4423 if(ulTtiReqPdu != NULLP)
4425 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
4426 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
4427 ulTtiReqPdu->pdu.pucch_pdu.rnti = pucchInfo->crnti;
4428 /* TODO : Fill handle in raCb when scheduling pucch and access here */
4429 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
4430 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->cellCfg.initialUlBwp.bwp.numPrb;
4431 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->cellCfg.initialUlBwp.bwp.firstPrb;
4432 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->cellCfg.initialUlBwp.bwp.scs;
4433 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->cellCfg.initialUlBwp.bwp.cyclicPrefix;
4434 ulTtiReqPdu->pdu.pucch_pdu.formatType = pucchInfo->pucchFormat; /* Supporting PUCCH Format 0 */
4435 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
4437 ulTtiReqPdu->pdu.pucch_pdu.prbStart = pucchInfo->fdAlloc.startPrb;
4438 ulTtiReqPdu->pdu.pucch_pdu.prbSize = pucchInfo->fdAlloc.numPrb;
4439 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = pucchInfo->tdAlloc.startSymb;
4440 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = pucchInfo->tdAlloc.numSymb;
4441 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = pucchInfo->intraFreqHop;
4442 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = pucchInfo->secondPrbHop;
4443 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
4444 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
4445 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
4447 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = pucchInfo->initialCyclicShift;
4449 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
4450 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = pucchInfo->timeDomOCC;
4451 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = pucchInfo->occIdx; /* Valid for Format 4 only */
4452 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = pucchInfo->occLen; /* Valid for Format 4 only */
4453 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = pucchInfo->pi2BPSK;
4454 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = pucchInfo->addDmrs;/* Valid for Format 3, 4 only */
4455 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
4456 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
4457 ulTtiReqPdu->pdu.pucch_pdu.srFlag = pucchInfo->srFlag;
4458 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = pucchInfo->harqInfo.harqBitLength;
4459 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
4460 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
4461 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = pucchInfo->beamPucchInfo.numPrgs;
4462 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = pucchInfo->beamPucchInfo.prgSize;
4463 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = pucchInfo->beamPucchInfo.digBfInterfaces;
4464 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = pucchInfo->beamPucchInfo.prg[0].beamIdx[0];
4466 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
4468 /* UL TTI Vendor PDU */
4469 ulTtiVendorPdu->pdu_type = FAPI_PUCCH_PDU_TYPE;
4470 ulTtiVendorPdu->pdu.pucch_pdu.nr_of_rx_ru=1;
4471 ulTtiVendorPdu->pdu.pucch_pdu.group_id=0;
4472 for(int i =0; i<FAPI_VENDOR_MAX_RXRU_NUM; i++)
4474 ulTtiVendorPdu->pdu.pucch_pdu.rx_ru_idx[i]=0;
4481 /*******************************************************************
4483 * @brief Sends UL TTI Request to PHY
4487 * Function : fillUlTtiReq
4490 * -Sends FAPI Param req to PHY
4492 * @params[in] Pointer to CmLteTimingInfo
4493 * @return ROK - success
4496 ******************************************************************/
4497 uint16_t fillUlTtiReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_tti_req_t* vendorUlTti)
4499 #ifdef CALL_FLOW_DEBUG_LOG
4500 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_TTI_REQUEST\n");
4504 uint16_t cellIdx =0;
4505 uint8_t pduIdx = -1;
4507 SlotTimingInfo ulTtiReqTimingInfo;
4508 MacUlSlot *currUlSlot = NULLP;
4509 MacCellCfg macCellCfg;
4510 fapi_ul_tti_req_t *ulTtiReq = NULLP;
4511 p_fapi_api_queue_elem_t ulTtiElem;
4513 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4515 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4516 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
4519 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,gConfigInfo.gPhyDeltaUl, macCb.macCell[cellIdx]->numOfSlots);
4520 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4522 LWR_MAC_ALLOC(ulTtiElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_tti_req_t)));
4525 FILL_FAPI_LIST_ELEM(ulTtiElem, NULLP, FAPI_UL_TTI_REQUEST, 1, \
4526 sizeof(fapi_ul_tti_req_t));
4527 ulTtiReq = (fapi_ul_tti_req_t *)(ulTtiElem +1);
4528 memset(ulTtiReq, 0, sizeof(fapi_ul_tti_req_t));
4529 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, sizeof(fapi_ul_tti_req_t));
4530 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
4531 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
4532 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
4533 vendorUlTti->num_ul_pdu = ulTtiReq->nPdus;
4534 vendorUlTti->sym = 0;
4535 ulTtiReq->nGroup = 0;
4536 if(ulTtiReq->nPdus > 0)
4538 #ifdef ODU_SLOT_IND_DEBUG_LOG
4539 DU_LOG("\nDEBUG --> LWR_MAC: UL_TTI_REQ, datatype:%d, sfn/slot:%d/%d", currUlSlot->ulSchInfo.dataType, ulTtiReq->sfn, ulTtiReq->slot);
4541 /* Fill Prach Pdu */
4542 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PRACH)
4545 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
4546 ulTtiReq->rachPresent++;
4548 for(ueIdx = 0; ueIdx < MAX_NUM_UE; ueIdx++)
4550 /* Fill PUSCH PDU */
4551 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_PUSCH)
4553 if(currUlSlot->ulSchInfo.schPuschInfo[ueIdx].crnti != 0)
4555 #ifdef ODU_SLOT_IND_DEBUG_LOG
4556 DU_LOG("\nDEBUG --> LWR_MAC: UL_TTI_REQ, PUSCH PDU ueId:%d", ueIdx);
4559 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, &currUlSlot->ulSchInfo.schPuschInfo[ueIdx]);
4563 /* Fill PUCCH PDU */
4564 if(currUlSlot->ulSchInfo.dataType & SCH_DATATYPE_UCI)
4566 if(currUlSlot->ulSchInfo.schPucchInfo[ueIdx].crnti != 0)
4569 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &vendorUlTti->ul_pdus[pduIdx], &macCellCfg, &currUlSlot->ulSchInfo.schPucchInfo[ueIdx]);
4574 ulTtiReq->ueGrpInfo[ulTtiReq->nGroup].nUe = MAX_NUM_UE_PER_TTI;
4578 #ifdef ODU_SLOT_IND_DEBUG_LOG
4579 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL TTI Request");
4581 prevElem->p_next = ulTtiElem;
4583 memset(currUlSlot, 0, sizeof(MacUlSlot));
4588 DU_LOG("\nERROR --> LWR_MAC: Failed to allocate memory for UL TTI Request");
4589 memset(currUlSlot, 0, sizeof(MacUlSlot));
4595 lwr_mac_procInvalidEvt(&currTimingInfo);
4602 /*******************************************************************
4604 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
4608 * Function : fillUlDciPdu
4611 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
4613 * @params[in] Pointer to fapi_dl_dci_t
4614 * Pointer to DciInfo
4617 ******************************************************************/
4618 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
4620 #ifdef CALL_FLOW_DEBUG_LOG
4621 DU_LOG("\nCall Flow: ENTMAC -> ENTLWRMAC : UL_DCI_REQUEST\n");
4623 if(ulDciPtr != NULLP)
4625 uint8_t numBytes =0;
4629 uint8_t coreset1Size = 0;
4630 uint16_t rbStart = 0;
4632 uint8_t dciFormatId = 0;
4633 uint32_t freqDomResAssign =0;
4634 uint8_t timeDomResAssign =0;
4635 uint8_t freqHopFlag =0;
4636 uint8_t modNCodScheme =0;
4638 uint8_t redundancyVer = 0;
4639 uint8_t harqProcessNum = 0;
4640 uint8_t puschTpc = 0;
4641 uint8_t ul_SlInd = 0;
4643 /* Size(in bits) of each field in DCI format 0_0 */
4644 uint8_t dciFormatIdSize = 1;
4645 uint8_t freqDomResAssignSize = 0;
4646 uint8_t timeDomResAssignSize = 4;
4647 uint8_t freqHopFlagSize = 1;
4648 uint8_t modNCodSchemeSize = 5;
4649 uint8_t ndiSize = 1;
4650 uint8_t redundancyVerSize = 2;
4651 uint8_t harqProcessNumSize = 4;
4652 uint8_t puschTpcSize = 2;
4653 uint8_t ul_SlIndSize = 1;
4655 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
4656 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
4657 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
4658 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
4659 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
4660 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
4661 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
4662 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
4663 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
4664 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
4665 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.beta_pdcch_1_0;
4666 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
4668 /* Calculating freq domain resource allocation field value and size
4669 * coreset1Size = Size of coreset 1
4670 * RBStart = Starting Virtual Rsource block
4671 * RBLen = length of contiguously allocted RBs
4672 * Spec 38.214 Sec 5.1.2.2.2
4674 if(schDciInfo->dciFormatInfo.formatType == FORMAT0_0)
4676 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
4677 rbLen = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.numPrb;
4678 rbStart = schDciInfo->dciFormatInfo.format.format0_0.freqAlloc.resAlloc.type1.startPrb;
4680 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
4682 if((rbLen - 1) <= floor(coreset1Size / 2))
4683 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
4685 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
4686 + (coreset1Size - 1 - rbStart);
4688 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
4690 /* Fetching DCI field values */
4691 dciFormatId = schDciInfo->dciFormatInfo.formatType; /* DCI indentifier for UL DCI */
4692 timeDomResAssign = schDciInfo->dciFormatInfo.format.format0_0.rowIndex;
4693 freqHopFlag = schDciInfo->dciFormatInfo.format.format0_0.freqHopFlag;
4694 modNCodScheme = schDciInfo->dciFormatInfo.format.format0_0.mcs;
4695 ndi = schDciInfo->dciFormatInfo.format.format0_0.ndi;
4696 redundancyVer = schDciInfo->dciFormatInfo.format.format0_0.rvIndex;
4697 harqProcessNum = schDciInfo->dciFormatInfo.format.format0_0.harqProcId;
4698 puschTpc = schDciInfo->dciFormatInfo.format.format0_0.tpcCmd;
4699 ul_SlInd = schDciInfo->dciFormatInfo.format.format0_0.sulIndicator;
4701 /* Reversing bits in each DCI field */
4702 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
4703 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
4704 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
4705 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
4706 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
4707 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
4708 puschTpc = reverseBits(puschTpc, puschTpcSize);
4709 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
4711 /* Calulating total number of bytes in buffer */
4712 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
4713 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
4714 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
4716 numBytes = ulDciPtr->payloadSizeBits / 8;
4717 if(ulDciPtr->payloadSizeBits % 8)
4720 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
4722 DU_LOG("\nERROR --> LWR_MAC : Total bytes for DCI is more than expected");
4726 /* Initialize buffer */
4727 for(bytePos = 0; bytePos < numBytes; bytePos++)
4728 ulDciPtr->payload[bytePos] = 0;
4730 bytePos = numBytes - 1;
4733 /* Packing DCI format fields */
4734 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4735 dciFormatId, dciFormatIdSize);
4736 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4737 freqDomResAssign, freqDomResAssignSize);
4738 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4739 timeDomResAssign, timeDomResAssignSize);
4740 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4741 freqHopFlag, freqHopFlagSize);
4742 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4743 modNCodScheme, modNCodSchemeSize);
4744 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4746 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4747 redundancyVer, redundancyVerSize);
4748 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4749 harqProcessNum, harqProcessNumSize);
4750 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4751 puschTpc, puschTpcSize);
4752 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
4753 ul_SlInd, ul_SlIndSize);
4755 } /* fillUlDciPdu */
4757 /*******************************************************************
4759 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
4763 * Function : fillUlDciPdcchPdu
4766 * -Fills the Pdcch PDU info
4768 * @params[in] Pointer to FAPI DL TTI Req
4769 * Pointer to PdcchCfg
4772 ******************************************************************/
4773 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, fapi_vendor_dci_pdu_t *vendorUlDciPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
4775 if(ulDciReqPdu != NULLP)
4777 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
4778 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
4779 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
4780 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
4781 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
4782 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
4783 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
4784 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
4785 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
4786 convertFreqDomRsrcMapToIAPIFormat(dlInfo->ulGrant->coresetCfg.freqDomainResource, \
4787 ulDciReqPdu->pdcchPduConfig.freqDomainResource);
4788 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
4789 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
4790 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
4791 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
4792 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
4793 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
4794 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
4796 /* Calculating PDU length. Considering only one Ul dci pdu for now */
4797 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
4799 /* Vendor UL DCI PDU */
4800 vendorUlDciPdu->pdcch_pdu_config.num_dl_dci = ulDciReqPdu->pdcchPduConfig.numDlDci;
4801 vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_pdcch_to_ssb = 0;
4802 vendorUlDciPdu->pdcch_pdu_config.dl_dci[0].epre_ratio_of_dmrs_to_ssb = 0;
4807 /*******************************************************************
4809 * @brief Sends UL DCI Request to PHY
4813 * Function : fillUlDciReq
4816 * -Sends FAPI Ul Dci req to PHY
4818 * @params[in] Pointer to CmLteTimingInfo
4819 * @return ROK - success
4822 ******************************************************************/
4823 uint16_t fillUlDciReq(SlotTimingInfo currTimingInfo, p_fapi_api_queue_elem_t prevElem, fapi_vendor_ul_dci_req_t *vendorUlDciReq)
4827 uint8_t numPduEncoded = 0;
4828 SlotTimingInfo ulDciReqTimingInfo ={0};
4829 MacDlSlot *currDlSlot = NULLP;
4830 fapi_ul_dci_req_t *ulDciReq =NULLP;
4831 p_fapi_api_queue_elem_t ulDciElem;
4833 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
4835 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
4836 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotTimingInfo));
4837 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % macCb.macCell[cellIdx]->numOfSlots];
4839 LWR_MAC_ALLOC(ulDciElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_ul_dci_req_t)));
4842 FILL_FAPI_LIST_ELEM(ulDciElem, NULLP, FAPI_UL_DCI_REQUEST, 1, \
4843 sizeof(fapi_ul_dci_req_t));
4844 ulDciReq = (fapi_ul_dci_req_t *)(ulDciElem +1);
4845 memset(ulDciReq, 0, sizeof(fapi_ul_dci_req_t));
4846 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, sizeof(fapi_ul_dci_req_t));
4848 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
4849 ulDciReq->slot = ulDciReqTimingInfo.slot;
4850 if(currDlSlot->dlInfo.ulGrant != NULLP)
4852 vendorUlDciReq->sym = 0;
4853 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
4854 vendorUlDciReq->num_pdus = ulDciReq->numPdus;
4855 if(ulDciReq->numPdus > 0)
4857 /* Fill PDCCH configuration Pdu */
4858 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &vendorUlDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4860 /* free UL GRANT at SCH */
4861 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4863 #ifdef ODU_SLOT_IND_DEBUG_LOG
4864 DU_LOG("\nDEBUG --> LWR_MAC: Sending UL DCI Request");
4867 prevElem->p_next = ulDciElem;
4872 lwr_mac_procInvalidEvt(&currTimingInfo);
4878 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4881 /* PHY_STATE_IDLE */
4882 #ifdef INTEL_TIMER_MODE
4883 lwr_mac_procIqSamplesReqEvt,
4885 lwr_mac_procParamReqEvt,
4886 lwr_mac_procParamRspEvt,
4887 lwr_mac_procConfigReqEvt,
4888 lwr_mac_procConfigRspEvt,
4889 lwr_mac_procInvalidEvt,
4890 lwr_mac_procInvalidEvt,
4893 /* PHY_STATE_CONFIGURED */
4894 #ifdef INTEL_TIMER_MODE
4895 lwr_mac_procInvalidEvt,
4897 lwr_mac_procParamReqEvt,
4898 lwr_mac_procParamRspEvt,
4899 lwr_mac_procConfigReqEvt,
4900 lwr_mac_procConfigRspEvt,
4901 lwr_mac_procStartReqEvt,
4902 lwr_mac_procInvalidEvt,
4905 /* PHY_STATE_RUNNING */
4906 #ifdef INTEL_TIMER_MODE
4907 lwr_mac_procInvalidEvt,
4909 lwr_mac_procInvalidEvt,
4910 lwr_mac_procInvalidEvt,
4911 lwr_mac_procConfigReqEvt,
4912 lwr_mac_procConfigRspEvt,
4913 lwr_mac_procInvalidEvt,
4914 lwr_mac_procInvalidEvt,
4918 /*******************************************************************
4920 * @brief Sends message to LWR_MAC Fsm Event Handler
4924 * Function : sendToLowerMac
4927 * -Sends message to LowerMac
4929 * @params[in] Message Type
4935 ******************************************************************/
4936 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4938 lwrMacCb.event = msgType;
4939 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4942 /**********************************************************************
4944 **********************************************************************/