1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
28 #include "lwr_mac_phy.h"
33 #include "lwr_mac_fsm.h"
34 #include "mac_utils.h"
36 #define MIB_SFN_BITMASK 0xFC
37 #define PDCCH_PDU_TYPE 0
38 #define PDSCH_PDU_TYPE 1
39 #define SSB_PDU_TYPE 3
40 #define PRACH_PDU_TYPE 0
41 #define PUSCH_PDU_TYPE 1
42 #define PUCCH_PDU_TYPE 2
44 #define SET_MSG_LEN(x, size) x += size
46 extern void fapiMacConfigRsp(uint16_t cellId);
47 extern uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
49 /* Global variables */
51 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo);
58 /* Initializing WLS free mem list */
60 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
62 cmLListInit(&wlsBlockToFreeList[idx]);
67 /*******************************************************************
69 * @brief Handles Invalid Request Event
73 * Function : lwr_mac_procInvalidEvt
76 * - Displays the PHY state when the invalid event occurs
79 * @return ROK - success
82 * ****************************************************************/
83 uint8_t lwr_mac_procInvalidEvt(void *msg)
85 printf("\nLWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
90 /*******************************************************************
92 * @brief Fills FAPI message header
96 * Function : fillMsgHeader
99 * -Fills FAPI message header
101 * @params[in] Pointer to header
107 * ****************************************************************/
108 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
110 memset(hdr, 0, sizeof(fapi_msg_t));
111 hdr->msg_id = msgType;
112 hdr->length = msgLen;
115 /*******************************************************************
117 * @brief Fills FAPI Config Request message header
121 * Function : fillTlvs
124 * -Fills FAPI Config Request message header
126 * @params[in] Pointer to TLV
133 * ****************************************************************/
134 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
135 uint16_t value, uint32_t *msgLen)
138 tlv->tl.length = length;
140 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
142 /*******************************************************************
144 * @brief fills the cyclic prefix by comparing the bitmask
148 * Function : fillCyclicPrefix
151 * -checks the value with the bitmask and
152 * fills the cellPtr's cyclic prefix.
154 * @params[in] Pointer to ClCellParam
155 * Value to be compared
158 ********************************************************************/
159 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
161 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
163 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
165 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
167 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
171 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
175 /*******************************************************************
177 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
181 * Function : fillSubcarrierSpaceDl
184 * -checks the value with the bitmask and
185 * fills the cellPtr's subcarrier spacing in DL
187 * @params[in] Pointer to ClCellParam
188 * Value to be compared
191 * ****************************************************************/
193 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
195 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
197 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
199 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
201 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
203 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
205 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
207 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
209 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
213 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
217 /*******************************************************************
219 * @brief fills the downlink bandwidth by comparing the bitmask
223 * Function : fillBandwidthDl
226 * -checks the value with the bitmask and
227 * -fills the cellPtr's DL Bandwidth
229 * @params[in] Pointer to ClCellParam
230 * Value to be compared
233 * ****************************************************************/
235 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
237 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
239 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
241 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
243 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
245 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
247 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
249 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
251 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
253 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
255 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
257 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
259 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
261 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
263 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
265 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
267 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
269 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
271 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
273 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
275 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
277 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
279 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
281 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
283 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
285 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
287 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
291 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
295 /*******************************************************************
297 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
301 * Function : fillSubcarrierSpaceUl
304 * -checks the value with the bitmask and
305 * -fills cellPtr's subcarrier spacing in UL
307 * @params[in] Pointer to ClCellParam
308 * Value to be compared
311 * ****************************************************************/
313 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
315 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
317 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
319 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
321 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
323 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
325 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
327 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
329 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
333 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
337 /*******************************************************************
339 * @brief fills the uplink bandwidth by comparing the bitmask
343 * Function : fillBandwidthUl
346 * -checks the value with the bitmask and
347 * fills the cellPtr's UL Bandwidth
351 * @params[in] Pointer to ClCellParam
352 * Value to be compared
356 * ****************************************************************/
358 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
360 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
362 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
364 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
366 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
368 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
370 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
372 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
374 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
376 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
378 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
380 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
382 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
384 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
386 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
388 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
390 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
392 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
394 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
396 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
398 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
400 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
402 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
404 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
406 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
408 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
410 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
414 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
417 /*******************************************************************
419 * @brief fills the CCE maping by comparing the bitmask
423 * Function : fillCCEmaping
426 * -checks the value with the bitmask and
427 * fills the cellPtr's CCE Mapping Type
430 * @params[in] Pointer to ClCellParam
431 * Value to be compared
434 * ****************************************************************/
436 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
438 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
440 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
442 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
444 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
448 (*cellPtr)->cceMappingType = INVALID_VALUE;
452 /*******************************************************************
454 * @brief fills the PUCCH format by comparing the bitmask
458 * Function : fillPucchFormat
461 * -checks the value with the bitmask and
462 * fills the cellPtr's pucch format
465 * @params[in] Pointer to ClCellParam
466 * Value to be compared
469 * ****************************************************************/
471 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
473 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
475 (*cellPtr)->pucchFormats = FORMAT_0;
477 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
479 (*cellPtr)->pucchFormats = FORMAT_1;
481 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
483 (*cellPtr)->pucchFormats = FORMAT_2;
485 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
487 (*cellPtr)->pucchFormats = FORMAT_3;
489 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
491 (*cellPtr)->pucchFormats = FORMAT_4;
495 (*cellPtr)->pucchFormats = INVALID_VALUE;
499 /*******************************************************************
501 * @brief fills the PDSCH Mapping Type by comparing the bitmask
505 * Function : fillPdschMappingType
508 * -checks the value with the bitmask and
509 * fills the cellPtr's PDSCH MappingType
511 * @params[in] Pointer to ClCellParam
512 * Value to be compared
515 * ****************************************************************/
517 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
519 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
521 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
523 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
525 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
529 (*cellPtr)->pdschMappingType = INVALID_VALUE;
533 /*******************************************************************
535 * @brief fills the PDSCH Allocation Type by comparing the bitmask
539 * Function : fillPdschAllocationType
542 * -checks the value with the bitmask and
543 * fills the cellPtr's PDSCH AllocationType
545 * @params[in] Pointer to ClCellParam
546 * Value to be compared
549 * ****************************************************************/
551 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
553 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
555 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
557 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
559 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
563 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
567 /*******************************************************************
569 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
573 * Function : fillPrbMappingType
576 * -checks the value with the bitmask and
577 * fills the cellPtr's PRB Mapping Type
579 * @params[in] Pointer to ClCellParam
580 * Value to be compared
583 ******************************************************************/
584 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
586 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
588 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
590 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
592 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
596 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
600 /*******************************************************************
602 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
606 * Function : fillPdschDmrsConfigType
609 * -checks the value with the bitmask and
610 * fills the cellPtr's DmrsConfig Type
612 * @params[in] Pointer to ClCellParam
613 * Value to be compared
616 ******************************************************************/
618 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
620 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
622 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
624 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
626 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
630 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
634 /*******************************************************************
636 * @brief fills the PDSCH DmrsLength by comparing the bitmask
640 * Function : fillPdschDmrsLength
643 * -checks the value with the bitmask and
644 * fills the cellPtr's PdschDmrsLength
646 * @params[in] Pointer to ClCellParam
647 * Value to be compared
650 ******************************************************************/
651 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
653 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
655 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
657 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
659 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
663 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
667 /*******************************************************************
669 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
673 * Function : fillPdschDmrsAddPos
676 * -checks the value with the bitmask and
677 * fills the cellPtr's Pdsch DmrsAddPos
679 * @params[in] Pointer to ClCellParam
680 * Value to be compared
683 ******************************************************************/
685 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
687 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
689 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
691 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
693 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
695 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
697 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
699 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
701 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
705 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
709 /*******************************************************************
711 * @brief fills the Modulation Order in DL by comparing the bitmask
715 * Function : fillModulationOrderDl
718 * -checks the value with the bitmask and
719 * fills the cellPtr's ModulationOrder in DL.
721 * @params[in] Pointer to ClCellParam
722 * Value to be compared
725 ******************************************************************/
726 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
730 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
734 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
738 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
742 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
746 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
750 /*******************************************************************
752 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
756 * Function : fillPuschDmrsConfigType
759 * -checks the value with the bitmask and
760 * fills the cellPtr's PUSCH DmrsConfigType
762 * @params[in] Pointer to ClCellParam
763 * Value to be compared
766 ******************************************************************/
768 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
770 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
772 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
774 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
776 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
780 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
784 /*******************************************************************
786 * @brief fills the PUSCH DmrsLength by comparing the bitmask
790 * Function : fillPuschDmrsLength
793 * -checks the value with the bitmask and
794 * fills the cellPtr's PUSCH DmrsLength
796 * @params[in] Pointer to ClCellParam
797 * Value to be compared
800 ******************************************************************/
802 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
804 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
806 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
808 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
810 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
814 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
818 /*******************************************************************
820 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
824 * Function : fillPuschDmrsAddPos
827 * -checks the value with the bitmask and
828 * fills the cellPtr's PUSCH DmrsAddPos
830 * @params[in] Pointer to ClCellParam
831 * Value to be compared
834 ******************************************************************/
836 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
838 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
840 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
842 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
844 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
846 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
848 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
850 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
852 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
856 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
860 /*******************************************************************
862 * @brief fills the PUSCH Mapping Type by comparing the bitmask
866 * Function : fillPuschMappingType
869 * -checks the value with the bitmask and
870 * fills the cellPtr's PUSCH MappingType
872 * @params[in] Pointer to ClCellParam
873 * Value to be compared
876 ******************************************************************/
878 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
880 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
882 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
884 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
886 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
890 (*cellPtr)->puschMappingType = INVALID_VALUE;
894 /*******************************************************************
896 * @brief fills the PUSCH Allocation Type by comparing the bitmask
900 * Function : fillPuschAllocationType
903 * -checks the value with the bitmask and
904 * fills the cellPtr's PUSCH AllocationType
906 * @params[in] Pointer to ClCellParam
907 * Value to be compared
910 ******************************************************************/
912 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
914 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
916 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
918 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
920 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
924 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
928 /*******************************************************************
930 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
934 * Function : fillPuschPrbMappingType
937 * -checks the value with the bitmask and
938 * fills the cellPtr's PUSCH PRB MApping Type
940 * @params[in] Pointer to ClCellParam
941 * Value to be compared
944 ******************************************************************/
946 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
948 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
950 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
952 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
954 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
958 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
962 /*******************************************************************
964 * @brief fills the Modulation Order in Ul by comparing the bitmask
968 * Function : fillModulationOrderUl
971 * -checks the value with the bitmask and
972 * fills the cellPtr's Modualtsion Order in UL.
974 * @params[in] Pointer to ClCellParam
975 * Value to be compared
978 ******************************************************************/
980 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
984 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
988 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
992 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
996 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1000 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1004 /*******************************************************************
1006 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1010 * Function : fillPuschAggregationFactor
1013 * -checks the value with the bitmask and
1014 * fills the cellPtr's PUSCH Aggregation Factor
1016 * @params[in] Pointer to ClCellParam
1017 * Value to be compared
1020 ******************************************************************/
1022 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1024 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1026 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1028 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1030 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1032 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1034 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1036 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1038 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1042 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1046 /*******************************************************************
1048 * @brief fills the PRACH Long Format by comparing the bitmask
1052 * Function : fillPrachLongFormat
1055 * -checks the value with the bitmask and
1056 * fills the cellPtr's PRACH Long Format
1058 * @params[in] Pointer to ClCellParam
1059 * Value to be compared
1062 ******************************************************************/
1064 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1066 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1068 (*cellPtr)->prachLongFormats = FORMAT_0;
1070 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1072 (*cellPtr)->prachLongFormats = FORMAT_1;
1074 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1076 (*cellPtr)->prachLongFormats = FORMAT_2;
1078 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1080 (*cellPtr)->prachLongFormats = FORMAT_3;
1084 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1088 /*******************************************************************
1090 * @brief fills the PRACH Short Format by comparing the bitmask
1094 * Function : fillPrachShortFormat
1097 * -checks the value with the bitmask and
1098 * fills the cellPtr's PRACH ShortFormat
1100 * @params[in] Pointer to ClCellParam
1101 * Value to be compared
1104 ******************************************************************/
1106 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1108 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1110 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1112 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1114 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1116 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1118 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1120 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1122 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1124 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1126 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1128 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1130 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1132 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1134 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1136 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1138 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1140 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1142 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1146 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1150 /*******************************************************************
1152 * @brief fills the Fd Occasions Type by comparing the bitmask
1156 * Function : fillFdOccasions
1159 * -checks the value with the bitmask and
1160 * fills the cellPtr's Fd Occasions
1162 * @params[in] Pointer to ClCellParam
1163 * Value to be compared
1166 ******************************************************************/
1168 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1172 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1176 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1180 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1184 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1188 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1192 /*******************************************************************
1194 * @brief fills the RSSI Measurement by comparing the bitmask
1198 * Function : fillRssiMeas
1201 * -checks the value with the bitmask and
1202 * fills the cellPtr's RSSI Measurement report
1204 * @params[in] Pointer to ClCellParam
1205 * Value to be compared
1208 ******************************************************************/
1210 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1212 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1214 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1216 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1218 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1222 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1226 /*******************************************************************
1228 * @brief Returns the TLVs value
1232 * Function : getParamValue
1235 * -return TLVs value
1238 * @return ROK - temp
1241 * ****************************************************************/
1243 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1246 posPtr = &tlv->tl.tag;
1247 posPtr += sizeof(tlv->tl.tag);
1248 posPtr += sizeof(tlv->tl.length);
1249 /*TO DO: malloc to SSI memory */
1250 if(type == FAPI_UINT_8)
1252 return(*(uint8_t *)posPtr);
1254 else if(type == FAPI_UINT_16)
1256 return(*(uint16_t *)posPtr);
1258 else if(type == FAPI_UINT_32)
1260 return(*(uint32_t *)posPtr);
1264 DU_LOG("\nLWR_MAC: Value Extraction failed" );
1269 /*******************************************************************
1271 * @brief Sends FAPI Param req to PHY
1275 * Function : lwr_mac_procParamReqEvt
1278 * -Sends FAPI Param req to PHY
1281 * @return ROK - success
1284 * ****************************************************************/
1286 uint8_t lwr_mac_procParamReqEvt(void *msg)
1289 /* startGuardTimer(); */
1290 uint32_t msgLen = 0; //Length of message Body
1291 fapi_param_req_t *paramReq = NULL;
1293 LWR_MAC_ALLOC(paramReq, sizeof(fapi_param_req_t));
1294 if(paramReq != NULL)
1296 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, msgLen);
1298 DU_LOG("\nLWR_MAC: Sending Param Request to Phy");
1299 LwrMacSendToPhy(paramReq->header.msg_id, \
1300 sizeof(fapi_param_req_t), (void *)paramReq);
1304 DU_LOG("\nLWR_MAC: Failed to allocate memory for Param Request");
1311 /*******************************************************************
1313 * @brief Sends FAPI Param Response to MAC via PHY
1317 * Function : lwr_mac_procParamRspEvt
1320 * -Sends FAPI Param rsp to MAC via PHY
1323 * @return ROK - success
1326 * ****************************************************************/
1328 uint8_t lwr_mac_procParamRspEvt(void *msg)
1331 /* stopGuardTimer(); */
1333 uint32_t encodedVal;
1334 fapi_param_resp_t *paramRsp;
1335 ClCellParam *cellParam = NULLP;
1337 paramRsp = (fapi_param_resp_t *)msg;
1338 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1340 if(paramRsp != NULLP)
1342 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1343 if(cellParam != NULLP)
1345 DU_LOG("\n LWR_MAC: Filling TLVS into MAC API");
1346 if(paramRsp->error_code == MSG_OK)
1348 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1350 switch(paramRsp->tlvs[index].tl.tag)
1352 case FAPI_RELEASE_CAPABILITY_TAG:
1353 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1354 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1356 cellParam->releaseCapability = RELEASE_15;
1360 case FAPI_PHY_STATE_TAG:
1361 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1362 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1364 printf("\n PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1369 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1370 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1371 if(encodedVal != RFAILED && encodedVal != 0)
1373 cellParam->skipBlankDlConfig = SUPPORTED;
1377 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1381 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1382 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1383 if(encodedVal != RFAILED && encodedVal != 0)
1385 cellParam->skipBlankUlConfig = SUPPORTED;
1389 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1393 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1394 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1397 case FAPI_CYCLIC_PREFIX_TAG:
1398 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1399 if(encodedVal != RFAILED)
1401 fillCyclicPrefix(encodedVal, &cellParam);
1405 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1406 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1407 if(encodedVal != RFAILED)
1409 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1413 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1414 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1415 if(encodedVal != RFAILED)
1417 fillBandwidthDl(encodedVal, &cellParam);
1421 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1422 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1423 if(encodedVal != RFAILED)
1425 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1429 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1430 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1431 if(encodedVal != RFAILED)
1433 fillBandwidthUl(encodedVal, &cellParam);
1437 case FAPI_CCE_MAPPING_TYPE_TAG:
1438 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1439 if(encodedVal != RFAILED)
1441 fillCCEmaping(encodedVal, &cellParam);
1445 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1446 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1447 if(encodedVal != RFAILED && encodedVal != 0)
1449 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1453 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1457 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1458 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1459 if(encodedVal != RFAILED && encodedVal != 0)
1461 cellParam->precoderGranularityCoreset = SUPPORTED;
1465 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1469 case FAPI_PDCCH_MU_MIMO_TAG:
1470 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1471 if(encodedVal != RFAILED && encodedVal != 0)
1473 cellParam->pdcchMuMimo = SUPPORTED;
1477 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1481 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1482 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1483 if(encodedVal != RFAILED && encodedVal != 0)
1485 cellParam->pdcchPrecoderCycling = SUPPORTED;
1489 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1493 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1494 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1497 case FAPI_PUCCH_FORMATS_TAG:
1498 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1499 if(encodedVal != RFAILED)
1501 fillPucchFormat(encodedVal, &cellParam);
1505 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1506 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1509 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1510 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1511 if(encodedVal != RFAILED)
1513 fillPdschMappingType(encodedVal, &cellParam);
1517 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1518 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1519 if(encodedVal != RFAILED)
1521 fillPdschAllocationType(encodedVal, &cellParam);
1525 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1526 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1527 if(encodedVal != RFAILED)
1529 fillPrbMappingType(encodedVal, &cellParam);
1533 case FAPI_PDSCH_CBG_TAG:
1534 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1535 if(encodedVal != RFAILED && encodedVal != 0)
1537 cellParam->pdschCbg = SUPPORTED;
1541 cellParam->pdschCbg = NOT_SUPPORTED;
1545 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1546 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1547 if(encodedVal != RFAILED)
1549 fillPdschDmrsConfigType(encodedVal, &cellParam);
1553 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1554 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1555 if(encodedVal != RFAILED)
1557 fillPdschDmrsLength(encodedVal, &cellParam);
1561 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1562 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1563 if(encodedVal != RFAILED)
1565 fillPdschDmrsAddPos(encodedVal, &cellParam);
1569 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1570 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1573 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1574 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1575 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1577 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1581 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1582 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1583 if(encodedVal != RFAILED)
1585 fillModulationOrderDl(encodedVal, &cellParam);
1589 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1590 cellParam->maxMuMimoUsersDl = \
1591 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1594 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1595 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1596 if(encodedVal != RFAILED && encodedVal != 0)
1598 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1602 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1606 case FAPI_PREMPTIONSUPPORT_TAG:
1607 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1608 if(encodedVal != RFAILED && encodedVal != 0)
1610 cellParam->premptionSupport = SUPPORTED;
1614 cellParam->premptionSupport = NOT_SUPPORTED;
1618 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1619 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1620 if(encodedVal != RFAILED && encodedVal != 0)
1622 cellParam->pdschNonSlotSupport = SUPPORTED;
1626 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1630 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1631 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1632 if(encodedVal != RFAILED && encodedVal != 0)
1634 cellParam->uciMuxUlschInPusch = SUPPORTED;
1638 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1642 case FAPI_UCI_ONLY_PUSCH_TAG:
1643 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1644 if(encodedVal != RFAILED && encodedVal != 0)
1646 cellParam->uciOnlyPusch = SUPPORTED;
1650 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1654 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1655 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1656 if(encodedVal != RFAILED && encodedVal != 0)
1658 cellParam->puschFrequencyHopping = SUPPORTED;
1662 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1666 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1667 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1668 if(encodedVal != RFAILED)
1670 fillPuschDmrsConfig(encodedVal, &cellParam);
1674 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1675 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1676 if(encodedVal != RFAILED)
1678 fillPuschDmrsLength(encodedVal, &cellParam);
1682 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1683 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1684 if(encodedVal != RFAILED)
1686 fillPuschDmrsAddPos(encodedVal, &cellParam);
1690 case FAPI_PUSCH_CBG_TAG:
1691 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1692 if(encodedVal != RFAILED && encodedVal != 0)
1694 cellParam->puschCbg = SUPPORTED;
1698 cellParam->puschCbg = NOT_SUPPORTED;
1702 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1703 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1704 if(encodedVal != RFAILED)
1706 fillPuschMappingType(encodedVal, &cellParam);
1710 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1711 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1712 if(encodedVal != RFAILED)
1714 fillPuschAllocationType(encodedVal, &cellParam);
1718 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1719 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1720 if(encodedVal != RFAILED)
1722 fillPuschPrbMappingType(encodedVal, &cellParam);
1726 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1727 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1728 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1730 cellParam->puschMaxPtrsPorts = encodedVal;
1734 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1735 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1738 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1739 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1742 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1743 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1744 if(encodedVal != RFAILED)
1746 fillModulationOrderUl(encodedVal, &cellParam);
1750 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1751 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1754 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1755 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1756 if(encodedVal != RFAILED && encodedVal != 0)
1758 cellParam->dftsOfdmSupport = SUPPORTED;
1762 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1766 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1767 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1768 if(encodedVal != RFAILED)
1770 fillPuschAggregationFactor(encodedVal, &cellParam);
1774 case FAPI_PRACH_LONG_FORMATS_TAG:
1775 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1776 if(encodedVal != RFAILED)
1778 fillPrachLongFormat(encodedVal, &cellParam);
1782 case FAPI_PRACH_SHORT_FORMATS_TAG:
1783 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1784 if(encodedVal != RFAILED)
1786 fillPrachShortFormat(encodedVal, &cellParam);
1790 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1791 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1792 if(encodedVal != RFAILED && encodedVal != 0)
1794 cellParam->prachRestrictedSets = SUPPORTED;
1798 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1802 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1803 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1804 if(encodedVal != RFAILED)
1806 fillFdOccasions(encodedVal, &cellParam);
1810 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1811 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1812 if(encodedVal != RFAILED)
1814 fillRssiMeas(encodedVal, &cellParam);
1818 //printf("\n Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1822 MAC_FREE(cellParam, sizeof(ClCellParam));
1823 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1828 DU_LOG("\n LWR_MAC: Invalid error code %d", paramRsp->error_code);
1834 DU_LOG("\nLWR_MAC: Failed to allocate memory for cell param");
1840 DU_LOG("\nLWR_MAC: Param Response received from PHY is NULL");
1848 /*******************************************************************
1850 * @brief Sends FAPI Config req to PHY
1854 * Function : lwr_mac_procConfigReqEvt
1857 * -Sends FAPI Config Req to PHY
1860 * @return ROK - success
1863 * ****************************************************************/
1865 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1872 uint32_t msgLen = 0;
1873 MacCellCfg macCfgParams;
1874 fapi_config_req_t *configReq;
1876 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
1879 cellId = (uint16_t *)msg;
1880 GET_CELL_IDX(*cellId, cellIdx);
1881 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
1883 /* Fill Cell Configuration in lwrMacCb */
1884 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
1885 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
1886 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
1889 /* Fill FAPI config req */
1890 LWR_MAC_ALLOC(configReq, sizeof(fapi_config_req_t));
1891 if(configReq != NULL)
1893 memset(configReq, 0, sizeof(fapi_config_req_t));
1894 msgLen = sizeof(macCfgParams.numTlv);
1895 configReq->number_of_tlvs = macCfgParams.numTlv;
1897 if(macCfgParams.dlCarrCfg.pres)
1899 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
1900 sizeof(uint16_t), macCfgParams.dlCarrCfg.bw, &msgLen);
1901 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
1902 sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
1903 fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
1904 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
1905 fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
1906 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
1907 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
1908 sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
1910 if(macCfgParams.ulCarrCfg.pres)
1912 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
1913 sizeof(uint16_t), macCfgParams.ulCarrCfg.bw, &msgLen);
1914 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
1915 sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
1916 fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
1917 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
1918 fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
1919 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
1920 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
1921 sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
1923 fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
1924 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
1926 /* fill cell config */
1927 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
1928 sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
1929 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
1930 sizeof(uint8_t), macCfgParams.dupType, &msgLen);
1932 /* fill SSB configuration */
1933 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
1934 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
1935 fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
1936 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
1937 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
1938 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
1940 /* fill PRACH configuration */
1941 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
1942 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
1943 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
1944 sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
1945 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
1946 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
1947 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
1948 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
1949 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
1950 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
1951 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
1952 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
1953 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
1954 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
1955 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
1956 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
1957 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
1958 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
1959 if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
1961 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
1962 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
1963 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
1968 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
1971 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
1972 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
1973 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
1974 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
1976 /* fill SSB table */
1977 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
1978 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
1979 fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
1980 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
1981 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
1982 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
1983 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
1984 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
1985 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
1986 sizeof(uint32_t), macCfgParams.ssbCfg.mibPdu[0], &msgLen);
1987 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
1988 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
1989 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
1990 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
1991 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
1992 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
1993 fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
1994 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
1996 /* fill TDD table */
1997 fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
1998 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
1999 fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2000 sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[0][0], &msgLen);
2002 /* fill measurement config */
2003 fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2004 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2006 /* fill DMRS Type A Pos */
2007 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2008 sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2010 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, \
2011 (sizeof(fapi_config_req_t) - sizeof(fapi_msg_t)));
2013 DU_LOG("\nLWR_MAC: Sending Config Request to Phy");
2014 LwrMacSendToPhy(configReq->header.msg_id, sizeof(fapi_config_req_t), (void *)configReq);
2018 DU_LOG("\nLWR_MAC: Failed to allocate memory for config Request");
2024 } /* lwr_mac_handleConfigReqEvt */
2026 /*******************************************************************
2028 * @brief Processes config response from phy
2032 * Function : lwr_mac_procConfigRspEvt
2035 * Processes config response from phy
2037 * @params[in] FAPI message pointer
2038 * @return ROK - success
2041 * ****************************************************************/
2043 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2046 fapi_config_resp_t *configRsp;
2047 configRsp = (fapi_config_resp_t *)msg;
2049 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2052 if(configRsp != NULL)
2054 if(configRsp->error_code == MSG_OK)
2056 DU_LOG("\nLWR_MAC: PHY has moved to Configured state \n");
2057 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2058 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2060 * Store config response into an intermediate struture and send to MAC
2061 * Support LC and LWLC for sending config rsp to MAC
2063 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2067 DU_LOG("\n LWR_MAC: Invalid error code %d", configRsp->error_code);
2073 DU_LOG("\nLWR_MAC: Config Response received from PHY is NULL");
2079 } /* lwr_mac_procConfigRspEvt */
2081 /*******************************************************************
2083 * @brief Build and send start request to phy
2087 * Function : lwr_mac_procStartReqEvt
2090 * Build and send start request to phy
2092 * @params[in] FAPI message pointer
2093 * @return ROK - success
2096 * ****************************************************************/
2097 uint8_t lwr_mac_procStartReqEvt(void *msg)
2100 uint32_t msgLen = 0;
2101 fapi_start_req_t *startReq;
2103 LWR_MAC_ALLOC(startReq, sizeof(fapi_start_req_t));
2104 if(startReq != NULL)
2106 memset(startReq, 0, sizeof(fapi_start_req_t));
2107 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, msgLen);
2109 DU_LOG("\nLWR_MAC: Sending Start Request to PHY");
2110 LwrMacSendToPhy(startReq->header.msg_id, sizeof(fapi_start_req_t),\
2115 DU_LOG("\nLWR_MAC: Failed to allocate memory for Start Request");
2120 } /* lwr_mac_procStartReqEvt */
2122 /*******************************************************************
2124 * @brief Sends FAPI Stop Req to PHY
2128 * Function : lwr_mac_procStopReqEvt
2131 * -Sends FAPI Stop Req to PHY
2134 * @return ROK - success
2137 ********************************************************************/
2139 uint8_t lwr_mac_procStopReqEvt(void *msg)
2142 uint32_t msgLen = 0;
2143 fapi_stop_req_t *stopReq = NULLP;
2144 LWR_MAC_ALLOC(stopReq, sizeof(fapi_stop_req_t));
2145 if(stopReq != NULLP)
2147 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2148 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, msgLen);
2149 DU_LOG("\nLOWER MAC: Sending Stop Request to PHY");
2150 LwrMacSendToPhy(stopReq->header.msg_id, sizeof(fapi_stop_req_t), (void *)stopReq);
2154 DU_LOG("\nLOWER MAC: Failed to allocate memory for Stop Request");
2161 /*******************************************************************
2163 * @brief Modifes the received mibPdu to uint32 bit
2164 * and stores it in MacCellCfg
2168 * Function : setMibPdu
2173 * @params[in] Pointer to mibPdu
2174 * pointer to modified value
2175 ******************************************************************/
2177 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
2179 *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
2180 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
2181 DU_LOG("\nLWR_MAC: MIB PDU %x", *val);
2185 /*******************************************************************
2187 * @brief fills SSB PDU required for DL TTI info in MAC
2191 * Function : fillSsbPdu
2194 * -Fills the SSB PDU info
2197 * @params[in] Pointer to FAPI DL TTI Req
2198 * Pointer to RgCellCb
2199 * Pointer to msgLen of DL TTI Info
2202 ******************************************************************/
2204 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2205 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2207 uint32_t mibPayload = 0;
2208 if(dlTtiReqPdu != NULL)
2210 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2211 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2212 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2213 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2214 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2215 /* ssbOfPdufstA to be filled in ssbCfg */
2216 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2217 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2218 /* Bit manipulation for SFN */
2219 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2220 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2221 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2222 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2223 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2224 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2225 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2226 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2227 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2234 /*******************************************************************
2236 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2240 * Function : fillSib1DlDciPdu
2243 * -Fills the Dl DCI PDU
2245 * @params[in] Pointer to fapi_dl_dci_t
2246 * Pointer to PdcchCfg
2249 ******************************************************************/
2251 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2253 if(dlDciPtr != NULLP)
2259 uint16_t coreset0Size;
2262 uint32_t freqDomResAssign;
2263 uint32_t timeDomResAssign;
2265 uint32_t modNCodScheme;
2266 uint8_t redundancyVer;
2267 uint32_t sysInfoInd;
2270 /* Size(in bits) of each field in DCI format 0_1
2271 * as mentioned in spec 38.214 */
2272 uint8_t freqDomResAssignSize;
2273 uint8_t timeDomResAssignSize = 4;
2274 uint8_t VRB2PRBMapSize = 1;
2275 uint8_t modNCodSchemeSize = 5;
2276 uint8_t redundancyVerSize = 2;
2277 uint8_t sysInfoIndSize = 1;
2278 uint8_t reservedSize = 15;
2280 dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2281 dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2282 dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2283 dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2284 dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2285 dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2286 dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2287 dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2288 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2289 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2290 dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2291 dlDciPtr->powerControlOfssetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2293 /* Calculating freq domain resource allocation field value and size
2294 * coreset0Size = Size of coreset 0
2295 * RBStart = Starting Virtual Rsource block
2296 * RBLen = length of contiguously allocted RBs
2297 * Spec 38.214 Sec 5.1.2.2.2
2299 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2300 rbStart = 0; /* For SIB1 */
2301 //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2302 rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2304 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2306 if((rbLen - 1) <= floor(coreset0Size / 2))
2307 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2309 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2310 + (coreset0Size - 1 - rbStart);
2312 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2315 /* Fetching DCI field values */
2316 timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2318 VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2320 modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2321 redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2322 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2325 /* Reversing bits in each DCI field */
2326 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2327 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2328 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2329 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2330 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2331 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2333 /* Calulating total number of bytes in buffer */
2334 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2335 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2336 + sysInfoIndSize + reservedSize;
2338 numBytes = dlDciPtr->payloadSizeBits / 8;
2339 if(dlDciPtr->payloadSizeBits % 8)
2342 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2344 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2348 /* Initialize buffer */
2349 for(bytePos = 0; bytePos < numBytes; bytePos++)
2350 dlDciPtr->payload[bytePos] = 0;
2352 bytePos = numBytes - 1;
2355 /* Packing DCI format fields */
2356 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2357 freqDomResAssign, freqDomResAssignSize);
2358 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2359 timeDomResAssign, timeDomResAssignSize);
2360 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2361 VRB2PRBMap, VRB2PRBMapSize);
2362 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2363 modNCodScheme, modNCodSchemeSize);
2364 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2365 redundancyVer, redundancyVerSize);
2366 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2367 sysInfoInd, sysInfoIndSize);
2368 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2369 reserved, reservedSize);
2372 } /* fillSib1DlDciPdu */
2374 /*******************************************************************
2376 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2380 * Function : fillRarDlDciPdu
2383 * -Fills the Dl DCI PDU
2385 * @params[in] Pointer to fapi_dl_dci_t
2386 * Pointer to PdcchCfg
2389 ******************************************************************/
2391 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2393 if(dlDciPtr != NULLP)
2399 uint16_t coreset0Size;
2402 uint32_t freqDomResAssign;
2403 uint8_t timeDomResAssign;
2405 uint8_t modNCodScheme;
2409 /* Size(in bits) of each field in DCI format 1_0 */
2410 uint8_t freqDomResAssignSize;
2411 uint8_t timeDomResAssignSize = 4;
2412 uint8_t VRB2PRBMapSize = 1;
2413 uint8_t modNCodSchemeSize = 5;
2414 uint8_t tbScalingSize = 2;
2415 uint8_t reservedSize = 16;
2417 dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2418 dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2419 dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2420 dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2421 dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2422 dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2423 dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2424 dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2425 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2426 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2427 dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2428 dlDciPtr->powerControlOfssetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2430 /* Calculating freq domain resource allocation field value and size
2431 * coreset0Size = Size of coreset 0
2432 * RBStart = Starting Virtual Rsource block
2433 * RBLen = length of contiguously allocted RBs
2434 * Spec 38.214 Sec 5.1.2.2.2
2437 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2438 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2439 rbStart = 0; /* For SIB1 */
2440 //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2441 rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2443 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2445 if((rbLen - 1) <= floor(coreset0Size / 2))
2446 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2448 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2449 + (coreset0Size - 1 - rbStart);
2451 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2454 /* Fetching DCI field values */
2455 timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2456 VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2457 modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2458 tbScaling = 0; /* configured to 0 scaling */
2461 /* Reversing bits in each DCI field */
2462 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2463 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2464 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2465 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2466 tbScaling = reverseBits(tbScaling, tbScalingSize);
2468 /* Calulating total number of bytes in buffer */
2469 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2470 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2472 numBytes = dlDciPtr->payloadSizeBits / 8;
2473 if(dlDciPtr->payloadSizeBits % 8)
2476 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2478 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2482 /* Initialize buffer */
2483 for(bytePos = 0; bytePos < numBytes; bytePos++)
2484 dlDciPtr->payload[bytePos] = 0;
2486 bytePos = numBytes - 1;
2489 /* Packing DCI format fields */
2490 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2491 freqDomResAssign, freqDomResAssignSize);
2492 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2493 timeDomResAssign, timeDomResAssignSize);
2494 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2495 VRB2PRBMap, VRB2PRBMapSize);
2496 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2497 modNCodScheme, modNCodSchemeSize);
2498 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2499 tbScaling, tbScalingSize);
2500 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2501 reserved, reservedSize);
2503 } /* fillRarDlDciPdu */
2505 /*******************************************************************
2507 * @brief fills DL DCI PDU required for DL TTI info in MAC
2511 * Function : fillDlMsgDlDciPdu
2514 * -Fills the Dl DCI PDU
2516 * @params[in] Pointer to fapi_dl_dci_t
2517 * Pointer to PdcchCfg
2520 ******************************************************************/
2521 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2522 DlMsgInfo *dlMsgInfo)
2524 if(dlDciPtr != NULLP)
2530 uint16_t coresetSize = 0;
2531 uint16_t rbStart = 0;
2533 uint8_t dciFormatId;
2534 uint32_t freqDomResAssign;
2535 uint8_t timeDomResAssign;
2537 uint8_t modNCodScheme;
2539 uint8_t redundancyVer = 0;
2540 uint8_t harqProcessNum = 0;
2541 uint8_t dlAssignmentIdx = 0;
2542 uint8_t pucchTpc = 0;
2543 uint8_t pucchResoInd = 0;
2544 uint8_t harqFeedbackInd = 0;
2546 /* Size(in bits) of each field in DCI format 1_0 */
2547 uint8_t dciFormatIdSize = 1;
2548 uint8_t freqDomResAssignSize = 0;
2549 uint8_t timeDomResAssignSize = 4;
2550 uint8_t VRB2PRBMapSize = 1;
2551 uint8_t modNCodSchemeSize = 5;
2552 uint8_t ndiSize = 1;
2553 uint8_t redundancyVerSize = 2;
2554 uint8_t harqProcessNumSize = 4;
2555 uint8_t dlAssignmentIdxSize = 2;
2556 uint8_t pucchTpcSize = 2;
2557 uint8_t pucchResoIndSize = 3;
2558 uint8_t harqFeedbackIndSize = 3;
2560 dlDciPtr->rnti = pdcchInfo->dci.rnti;
2561 dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2562 dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2563 dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2564 dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2565 dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2566 dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2567 dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2568 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2569 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2570 dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2571 dlDciPtr->powerControlOfssetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2573 /* Calculating freq domain resource allocation field value and size
2574 * coreset0Size = Size of coreset 0
2575 * RBStart = Starting Virtual Rsource block
2576 * RBLen = length of contiguously allocted RBs
2577 * Spec 38.214 Sec 5.1.2.2.2
2579 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2580 rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2581 rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2583 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2585 if((rbLen - 1) <= floor(coresetSize / 2))
2586 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2588 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2589 + (coresetSize - 1 - rbStart);
2591 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2594 /* Fetching DCI field values */
2595 dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
2596 timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2597 VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2598 modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2599 ndi = dlMsgInfo->ndi;
2600 redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2601 harqProcessNum = dlMsgInfo->harqProcNum;
2602 dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
2603 pucchTpc = dlMsgInfo->pucchTpc;
2604 pucchResoInd = dlMsgInfo->pucchResInd;
2605 harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
2607 /* Reversing bits in each DCI field */
2608 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
2609 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2610 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2611 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2612 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2613 ndi = reverseBits(ndi, ndiSize);
2614 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2615 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
2616 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2617 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
2618 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
2619 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2622 /* Calulating total number of bytes in buffer */
2623 dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2624 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2625 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2626 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2628 numBytes = dlDciPtr->payloadSizeBits / 8;
2629 if(dlDciPtr->payloadSizeBits % 8)
2632 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2634 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2638 /* Initialize buffer */
2639 for(bytePos = 0; bytePos < numBytes; bytePos++)
2640 dlDciPtr->payload[bytePos] = 0;
2642 bytePos = numBytes - 1;
2645 /* Packing DCI format fields */
2646 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2647 dciFormatId, dciFormatIdSize);
2648 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2649 freqDomResAssign, freqDomResAssignSize);
2650 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2651 timeDomResAssign, timeDomResAssignSize);
2652 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2653 VRB2PRBMap, VRB2PRBMapSize);
2654 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2655 modNCodScheme, modNCodSchemeSize);
2656 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2658 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2659 redundancyVer, redundancyVerSize);
2660 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2661 redundancyVer, redundancyVerSize);
2662 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2663 harqProcessNum, harqProcessNumSize);
2664 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2665 dlAssignmentIdx, dlAssignmentIdxSize);
2666 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2667 pucchTpc, pucchTpcSize);
2668 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2669 pucchResoInd, pucchResoIndSize);
2670 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2671 harqFeedbackInd, harqFeedbackIndSize);
2675 /*******************************************************************
2677 * @brief fills PDCCH PDU required for DL TTI info in MAC
2681 * Function : fillPdcchPdu
2684 * -Fills the Pdcch PDU info
2687 * @params[in] Pointer to FAPI DL TTI Req
2688 * Pointer to PdcchCfg
2691 ******************************************************************/
2692 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2693 RntiType rntiType, uint8_t coreSetType)
2695 if(dlTtiReqPdu != NULLP)
2697 PdcchCfg *pdcchInfo = NULLP;
2698 BwpCfg *bwp = NULLP;
2700 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2701 if(rntiType == SI_RNTI_TYPE)
2703 pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2704 bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2705 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2707 else if(rntiType == RA_RNTI_TYPE)
2709 pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2710 bwp = &dlInfo->rarAlloc->bwp;
2711 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2713 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2715 pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2716 bwp = &dlInfo->dlMsgAlloc->bwp;
2717 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2718 &dlInfo->dlMsgAlloc->dlMsgInfo);
2722 DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
2725 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2726 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2727 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2728 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2729 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2730 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2731 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2732 memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2733 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2734 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2735 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2736 dlTtiReqPdu->pdu.pdcch_pdu.coreSetSize = pdcchInfo->coresetCfg.coreSetType;
2737 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
2738 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2739 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2740 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2742 /* Calculating PDU length. Considering only one dl dci pdu for now */
2743 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2749 /*******************************************************************
2751 * @brief fills PDSCH PDU required for DL TTI info in MAC
2755 * Function : fillPdschPdu
2758 * -Fills the Pdsch PDU info
2761 * @params[in] Pointer to FAPI DL TTI Req
2762 * Pointer to PdschCfg
2763 * Pointer to msgLen of DL TTI Info
2766 ******************************************************************/
2768 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2769 BwpCfg bwp, uint16_t pduIndex)
2773 if(dlTtiReqPdu != NULLP)
2775 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2776 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2777 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2778 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
2779 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
2780 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
2781 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
2782 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
2783 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
2784 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
2785 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
2787 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
2788 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
2789 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
2790 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
2791 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
2792 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
2794 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
2795 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
2796 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
2797 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
2798 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
2799 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
2800 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
2801 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
2802 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
2803 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
2804 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
2805 /* since we are using type-1, hence rbBitmap excluded */
2806 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
2807 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
2808 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
2809 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
2810 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
2811 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
2812 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
2813 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
2814 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
2815 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
2816 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
2817 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
2818 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
2819 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
2820 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
2821 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
2822 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
2824 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
2828 /***********************************************************************
2830 * @brief calculates the total size to be allocated for DL TTI Req
2834 * Function : calcDlTtiReqPduCount
2837 * -calculates the total pdu count to be allocated for DL TTI Req
2839 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
2842 * ********************************************************************/
2843 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
2848 if(dlInfo->isBroadcastPres)
2850 if(dlInfo->brdcstAlloc.ssbTrans)
2852 for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
2854 /* SSB PDU is filled */
2858 if(dlInfo->brdcstAlloc.sib1Trans)
2860 /* PDCCH and PDSCH PDU is filled */
2864 if(dlInfo->rarAlloc != NULLP)
2866 /* PDCCH and PDSCH PDU is filled */
2869 if(dlInfo->dlMsgAlloc != NULLP)
2871 /* PDCCH and PDSCH PDU is filled */
2877 /***********************************************************************
2879 * @brief calculates the total size to be allocated for DL TTI Req
2883 * Function : calcTxDataReqPduCount
2886 * -calculates the total pdu count to be allocated for DL TTI Req
2888 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
2891 * ********************************************************************/
2892 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
2896 if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
2900 if(dlInfo->rarAlloc != NULLP)
2904 if(dlInfo->dlMsgAlloc != NULLP)
2910 /***********************************************************************
2912 * @brief fills the SIB1 TX-DATA request message
2916 * Function : fillSib1TxDataReq
2919 * - fills the SIB1 TX-DATA request message
2921 * @params[in] fapi_tx_pdu_desc_t *pduDesc
2922 * @params[in] macCellCfg consist of SIB1 pdu
2923 * @params[in] uint32_t *msgLen
2924 * @params[in] uint16_t pduIndex
2927 * ********************************************************************/
2928 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
2931 uint32_t pduLen = 0;
2932 uint8_t *sib1TxdataValue = NULLP;
2934 pduDesc[pduIndex].pdu_index = pduIndex;
2935 pduDesc[pduIndex].num_tlvs = 1;
2938 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
2939 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
2940 pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
2941 LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
2942 if(sib1TxdataValue == NULLP)
2946 memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
2947 macCellCfg->sib1Cfg.sib1PduLen);
2948 pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
2950 /* The total length of the PDU description and PDU data */
2951 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
2952 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
2953 pduDesc[pduIndex].pdu_length = pduLen;
2956 MAC_FREE(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
2962 /***********************************************************************
2964 * @brief fills the RAR TX-DATA request message
2968 * Function : fillRarTxDataReq
2971 * - fills the RAR TX-DATA request message
2973 * @params[in] fapi_tx_pdu_desc_t *pduDesc
2974 * @params[in] RarInfo *rarInfo
2975 * @params[in] uint32_t *msgLen
2976 * @params[in] uint16_t pduIndex
2979 * ********************************************************************/
2980 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
2983 uint32_t pduLen = 0;
2984 uint8_t *rarTxdataValue = NULLP;
2986 pduDesc[pduIndex].pdu_index = pduIndex;
2987 pduDesc[pduIndex].num_tlvs = 1;
2990 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
2991 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
2992 pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
2993 LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
2994 if(rarTxdataValue == NULLP)
2998 memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
2999 pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
3001 /* The total length of the PDU description and PDU data */
3002 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3003 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3004 pduDesc[pduIndex].pdu_length = pduLen;
3006 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3007 * But since we did not implement WLS, this has to be done here
3010 MAC_FREE(rarTxdataValue,rarInfo->rarPduLen);
3016 /***********************************************************************
3018 * @brief fills the DL dedicated Msg TX-DATA request message
3022 * Function : fillDlMsgTxDataReq
3025 * - fills the Dl Dedicated Msg TX-DATA request message
3027 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3028 * @params[in] DlMsgInfo *dlMsgInfo
3029 * @params[in] uint32_t *msgLen
3030 * @params[in] uint16_t pduIndex
3033 * ********************************************************************/
3034 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo,
3037 uint32_t pduLen = 0;
3038 uint8_t *dedMsgTxDataValue = NULLP;
3040 pduDesc[pduIndex].pdu_index = pduIndex;
3041 pduDesc[pduIndex].num_tlvs = 1;
3044 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3045 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3046 pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen;
3047 LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3048 if(dedMsgTxDataValue == NULLP)
3052 memcpy(dedMsgTxDataValue, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3053 pduDesc[pduIndex].tlvs[0].value = dedMsgTxDataValue;
3055 /* The total length of the PDU description and PDU data */
3056 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3057 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3058 pduDesc[pduIndex].pdu_length = pduLen;
3060 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3061 * But since we did not implement WLS, this has to be done here
3064 MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3072 /*******************************************************************
3074 * @brief Sends DL TTI Request to PHY
3078 * Function : fillDlTtiReq
3081 * -Sends FAPI DL TTI req to PHY
3083 * @params[in] timing info
3084 * @return ROK - success
3087 * ****************************************************************/
3088 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3093 uint8_t numPduEncoded = 0;
3095 uint16_t pduIndex = 0;
3096 uint32_t msgLen = 0;
3098 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3099 SlotIndInfo dlTtiReqTimingInfo;
3101 MacDlSlot *currDlSlot = NULLP;
3102 MacCellCfg macCellCfg;
3103 memset(&macCellCfg, 0, sizeof(MacCellCfg));
3106 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3108 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3109 /* consider phy delay */
3110 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA);
3112 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3114 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3115 nPdu = calcDlTtiReqPduCount(&currDlSlot->dlInfo);
3116 LWR_MAC_ALLOC(dlTtiReq, sizeof(fapi_dl_tti_req_t));
3117 if(dlTtiReq != NULLP)
3119 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3120 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3121 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3122 dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
3123 nPdu = dlTtiReq->nPdus;
3124 dlTtiReq->nGroup = 0;
3126 if(dlTtiReq->nPdus > 0)
3128 if(currDlSlot->dlInfo.isBroadcastPres)
3130 if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3132 if(dlTtiReq->pdus != NULLP)
3134 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3136 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3137 currDlSlot, idx, dlTtiReq->sfn);
3141 printf("\033[1;31m");
3142 DU_LOG("\nLWR_MAC: MIB sent..");
3145 if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3147 /* Filling SIB1 param */
3148 if(numPduEncoded != nPdu)
3150 rntiType = SI_RNTI_TYPE;
3151 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3152 rntiType, CORESET_TYPE0);
3154 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3155 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3156 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3161 printf("\033[1;34m");
3162 DU_LOG("\nLWR_MAC: SIB1 sent...");
3166 if(currDlSlot->dlInfo.rarAlloc != NULLP)
3168 /* Filling RAR param */
3169 rntiType = RA_RNTI_TYPE;
3170 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3171 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3173 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3174 &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3175 currDlSlot->dlInfo.rarAlloc->bwp,
3180 printf("\033[1;32m");
3181 DU_LOG("\nLWR_MAC: RAR sent...");
3184 if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3186 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3188 /* Filling Msg4 param */
3189 printf("\033[1;32m");
3190 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3192 rntiType = TC_RNTI_TYPE;
3193 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3194 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3195 DU_LOG("\nLWR_MAC: MSG4 sent...");
3199 /* Filling other DL msg params */
3200 rntiType = C_RNTI_TYPE;
3201 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3202 &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3203 DU_LOG("\nLWR_MAC: DL MSG sent...");
3208 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3209 &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3210 currDlSlot->dlInfo.dlMsgAlloc->bwp,
3217 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3218 currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3222 msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
3223 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
3224 #ifdef ODU_SLOT_IND_DEBUG_LOG
3225 DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3227 LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), \
3230 /* send Tx-DATA req message */
3231 sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo);
3235 msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
3236 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
3237 #ifdef ODU_SLOT_IND_DEBUG_LOG
3238 DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3240 LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), (void *)dlTtiReq);
3242 memset(currDlSlot, 0, sizeof(MacDlSlot));
3247 DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request");
3248 memset(currDlSlot, 0, sizeof(MacDlSlot));
3254 lwr_mac_procInvalidEvt(&currTimingInfo);
3261 /*******************************************************************
3263 * @brief Sends TX data Request to PHY
3267 * Function : sendTxDataReq
3270 * -Sends FAPI TX data req to PHY
3272 * @params[in] timing info
3273 * @return ROK - success
3276 * ****************************************************************/
3277 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
3282 uint32_t msgLen = 0;
3283 uint16_t pduIndex = 0;
3284 uint32_t txDataReqMsgSize = 0;
3285 fapi_tx_data_req_t *txDataReq = NULLP;
3287 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3289 /* send TX_Data request message */
3290 nPdu = calcTxDataReqPduCount(dlInfo);
3293 txDataReqMsgSize = sizeof(fapi_tx_data_req_t);
3294 if(dlInfo->brdcstAlloc.sib1Trans)
3296 txDataReqMsgSize += macCb.macCell[cellIdx]->macCellCfg.sib1Cfg.sib1PduLen;
3298 if(dlInfo->rarAlloc != NULLP)
3300 txDataReqMsgSize += dlInfo->rarAlloc->rarInfo.rarPduLen;
3302 if(dlInfo->dlMsgAlloc != NULLP)
3304 txDataReqMsgSize += dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen;
3307 LWR_MAC_ALLOC(txDataReq, txDataReqMsgSize);
3308 if(txDataReq == NULLP)
3310 DU_LOG("\nLWR_MAC: Failed to allocate memory for TX data Request");
3314 memset(txDataReq, 0, txDataReqMsgSize);
3315 txDataReq->sfn = currTimingInfo.sfn;
3316 txDataReq->slot = currTimingInfo.slot;
3317 if(dlInfo->brdcstAlloc.sib1Trans)
3319 fillSib1TxDataReq(txDataReq->pdu_desc,
3320 &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
3322 txDataReq->num_pdus++;
3324 if(dlInfo->rarAlloc != NULLP)
3326 fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
3328 txDataReq->num_pdus++;
3330 MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3331 dlInfo->rarAlloc = NULLP;
3333 if(dlInfo->dlMsgAlloc != NULLP)
3335 fillDlMsgTxDataReq(txDataReq->pdu_desc, \
3336 &dlInfo->dlMsgAlloc->dlMsgInfo, pduIndex);
3338 txDataReq->num_pdus++;
3340 MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3341 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3342 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3343 MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3344 dlInfo->dlMsgAlloc = NULLP;
3347 msgLen = txDataReqMsgSize - sizeof(fapi_msg_t);
3348 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, msgLen);
3349 DU_LOG("\nLWR_MAC: Sending TX DATA Request");
3350 LwrMacSendToPhy(txDataReq->header.msg_id, txDataReqMsgSize, \
3357 /***********************************************************************
3359 * @brief calculates the total size to be allocated for UL TTI Req
3363 * Function : getnPdus
3366 * -calculates the total pdu count to be allocated for UL TTI Req
3368 * @params[in] Pointer to fapi Ul TTI Req
3369 * Pointer to CurrUlSlot
3371 * ********************************************************************/
3373 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3375 uint8_t pduCount = 0;
3377 if(ulTtiReq && currUlSlot)
3379 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3382 ulTtiReq->rachPresent++;
3384 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3389 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3394 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3399 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3408 /***********************************************************************
3410 * @brief Set the value of zero correlation config in PRACH PDU
3414 * Function : setNumCs
3417 * -Set the value of zero correlation config in PRACH PDU
3419 * @params[in] Pointer to zero correlation config
3420 * Pointer to MacCellCfg
3421 * ********************************************************************/
3423 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3427 if(macCellCfg != NULLP)
3429 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3430 *numCs = UnrestrictedSetNcsTable[idx];
3435 /***********************************************************************
3437 * @brief Fills the PRACH PDU in UL TTI Request
3441 * Function : fillPrachPdu
3444 * -Fills the PRACH PDU in UL TTI Request
3446 * @params[in] Pointer to Prach Pdu
3447 * Pointer to CurrUlSlot
3448 * Pointer to macCellCfg
3450 * ********************************************************************/
3453 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3455 if(ulTtiReqPdu != NULLP)
3457 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3458 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3459 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3460 currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3461 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3462 currUlSlot->ulInfo.prachSchInfo.prachFormat;
3463 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3464 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3465 currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3466 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3467 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3468 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3469 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3470 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3471 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3475 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3477 if(ulTtiReqPdu != NULLP)
3479 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3480 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3481 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3482 ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3483 /* TODO : Fill handle in raCb when scheduling pusch and access here */
3484 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3485 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3486 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3487 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3488 macCellCfg->initialUlBwp.bwp.scs;
3489 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3490 macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3491 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3492 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = 2;
3493 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = \
3494 currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3495 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = 0;
3496 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3497 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3498 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3499 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3500 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3501 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3502 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3503 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3504 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3505 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3506 currUlSlot->ulInfo.schPuschInfo.resAllocType;
3507 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3508 currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3509 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3510 currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3511 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3512 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3513 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3514 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3515 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3516 currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3517 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3518 currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3519 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3520 currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3521 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3522 currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3523 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3524 currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3525 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3526 currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3527 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3528 currUlSlot->ulInfo.schPuschInfo.harqProcId;
3529 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3530 currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3531 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3532 currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3533 /* numCb is 0 for new transmission */
3534 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3536 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3540 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3541 MacUlSlot *currUlSlot)
3543 if(ulTtiReqPdu != NULLP)
3545 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
3546 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3547 ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
3548 /* TODO : Fill handle in raCb when scheduling pucch and access here */
3549 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
3550 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3551 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3552 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3553 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3554 ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3555 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3556 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = 0; /* Disabled */
3557 ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3558 ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3559 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3560 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3561 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = 0; /* Disabled */
3562 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = 0;
3563 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3564 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3565 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
3566 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = 0;
3567 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3568 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = 0; /* Valid for Format 1 */
3569 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = 0; /* Valid for Format 4 */
3570 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = 0; /* Valid for Format 4 */
3571 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = 0; /* Valid for Format 3, 4 */
3572 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3573 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
3574 ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
3575 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3576 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
3577 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
3578 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3579 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3580 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3581 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3583 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3589 /*******************************************************************
3591 * @brief Sends UL TTI Request to PHY
3595 * Function : fillUlTtiReq
3598 * -Sends FAPI Param req to PHY
3600 * @params[in] Pointer to CmLteTimingInfo
3601 * @return ROK - success
3604 ******************************************************************/
3605 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
3609 uint8_t pduIdx = -1;
3610 uint32_t msgLen = 0;
3611 uint32_t msgSize = 0;
3613 fapi_ul_tti_req_t *ulTtiReq = NULLP;
3614 SlotIndInfo ulTtiReqTimingInfo;
3616 MacUlSlot *currUlSlot = NULLP;
3617 MacCellCfg macCellCfg;
3619 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3621 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3622 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3625 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
3627 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3628 msgSize = sizeof(fapi_ul_tti_req_t);
3629 LWR_MAC_ALLOC(ulTtiReq, msgSize);
3631 if(ulTtiReq != NULLP)
3633 memset(ulTtiReq, 0, msgSize);
3634 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
3635 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3636 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3637 ulTtiReq->nGroup = 0;
3638 if(ulTtiReq->nPdus > 0)
3640 /* Fill Prach Pdu */
3641 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3644 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3647 /* Fill PUSCH PDU */
3648 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3651 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3653 /* Fill PUCCH PDU */
3654 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3657 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3660 msgLen = sizeof(fapi_ul_tti_req_t) - sizeof(fapi_msg_t);
3661 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, msgLen);
3662 #ifdef ODU_SLOT_IND_DEBUG_LOG
3663 DU_LOG("\nLWR_MAC: Sending UL TTI Request");
3665 LwrMacSendToPhy(ulTtiReq->header.msg_id, msgSize, (void *)ulTtiReq);
3667 memset(currUlSlot, 0, sizeof(MacUlSlot));
3672 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL TTI Request");
3673 memset(currUlSlot, 0, sizeof(MacUlSlot));
3679 lwr_mac_procInvalidEvt(&currTimingInfo);
3686 /*******************************************************************
3688 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
3692 * Function : fillUlDciPdu
3695 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
3697 * @params[in] Pointer to fapi_dl_dci_t
3698 * Pointer to DciInfo
3701 ******************************************************************/
3702 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
3704 if(ulDciPtr != NULLP)
3710 uint8_t coreset1Size = 0;
3711 uint16_t rbStart = 0;
3713 uint8_t dciFormatId = 0;
3714 uint32_t freqDomResAssign;
3715 uint8_t timeDomResAssign;
3716 uint8_t freqHopFlag;
3717 uint8_t modNCodScheme;
3719 uint8_t redundancyVer = 0;
3720 uint8_t harqProcessNum = 0;
3721 uint8_t puschTpc = 0;
3722 uint8_t ul_SlInd = 0;
3724 /* Size(in bits) of each field in DCI format 0_0 */
3725 uint8_t dciFormatIdSize = 1;
3726 uint8_t freqDomResAssignSize = 0;
3727 uint8_t timeDomResAssignSize = 4;
3728 uint8_t freqHopFlagSize = 1;
3729 uint8_t modNCodSchemeSize = 5;
3730 uint8_t ndiSize = 1;
3731 uint8_t redundancyVerSize = 2;
3732 uint8_t harqProcessNumSize = 4;
3733 uint8_t puschTpcSize = 2;
3734 uint8_t ul_SlIndSize = 1;
3736 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
3737 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
3738 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
3739 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
3740 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
3741 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
3742 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
3743 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
3744 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
3745 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
3746 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
3747 ulDciPtr->powerControlOfssetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
3749 /* Calculating freq domain resource allocation field value and size
3750 * coreset1Size = Size of coreset 1
3751 * RBStart = Starting Virtual Rsource block
3752 * RBLen = length of contiguously allocted RBs
3753 * Spec 38.214 Sec 5.1.2.2.2
3755 if(schDciInfo->formatType == FORMAT0_0)
3757 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
3758 rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
3759 rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
3761 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
3763 if((rbLen - 1) <= floor(coreset1Size / 2))
3764 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
3766 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
3767 + (coreset1Size - 1 - rbStart);
3769 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
3771 /* Fetching DCI field values */
3772 dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
3773 timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
3774 freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
3775 modNCodScheme = schDciInfo->format.format0_0.mcs;
3776 ndi = schDciInfo->format.format0_0.ndi;
3777 redundancyVer = schDciInfo->format.format0_0.rv;
3778 harqProcessNum = schDciInfo->format.format0_0.harqProcId;
3779 puschTpc = schDciInfo->format.format0_0.tpcCmd;
3780 ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
3782 /* Reversing bits in each DCI field */
3783 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
3784 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3785 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3786 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3787 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
3788 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
3789 puschTpc = reverseBits(puschTpc, puschTpcSize);
3790 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
3792 /* Calulating total number of bytes in buffer */
3793 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3794 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
3795 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
3797 numBytes = ulDciPtr->payloadSizeBits / 8;
3798 if(ulDciPtr->payloadSizeBits % 8)
3801 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3803 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
3807 /* Initialize buffer */
3808 for(bytePos = 0; bytePos < numBytes; bytePos++)
3809 ulDciPtr->payload[bytePos] = 0;
3811 bytePos = numBytes - 1;
3814 /* Packing DCI format fields */
3815 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3816 dciFormatId, dciFormatIdSize);
3817 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3818 freqDomResAssign, freqDomResAssignSize);
3819 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3820 timeDomResAssign, timeDomResAssignSize);
3821 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3822 freqHopFlag, freqHopFlagSize);
3823 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3824 modNCodScheme, modNCodSchemeSize);
3825 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3827 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3828 redundancyVer, redundancyVerSize);
3829 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3830 harqProcessNum, harqProcessNumSize);
3831 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3832 puschTpc, puschTpcSize);
3833 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3834 ul_SlInd, ul_SlIndSize);
3836 } /* fillUlDciPdu */
3838 /*******************************************************************
3840 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
3844 * Function : fillUlDciPdcchPdu
3847 * -Fills the Pdcch PDU info
3849 * @params[in] Pointer to FAPI DL TTI Req
3850 * Pointer to PdcchCfg
3853 ******************************************************************/
3854 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
3856 if(ulDciReqPdu != NULLP)
3858 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
3859 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
3860 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
3861 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
3862 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
3863 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
3864 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
3865 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
3866 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
3867 memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
3868 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
3869 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
3870 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
3871 ulDciReqPdu->pdcchPduConfig.coreSetSize = dlInfo->ulGrant->coresetCfg.coreSetType;
3872 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
3873 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
3874 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
3875 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
3877 /* Calculating PDU length. Considering only one Ul dci pdu for now */
3878 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3883 /*******************************************************************
3885 * @brief Sends UL DCI Request to PHY
3889 * Function : fillUlDciReq
3892 * -Sends FAPI Ul Dci req to PHY
3894 * @params[in] Pointer to CmLteTimingInfo
3895 * @return ROK - success
3898 ******************************************************************/
3899 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
3903 uint8_t numPduEncoded = 0;
3904 uint32_t msgLen = 0;
3905 uint32_t msgSize = 0;
3907 fapi_ul_dci_req_t *ulDciReq = NULLP;
3908 SlotIndInfo ulDciReqTimingInfo;
3910 MacDlSlot *currDlSlot = NULLP;
3912 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3914 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3915 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
3916 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3918 if(currDlSlot->dlInfo.ulGrant != NULLP)
3920 msgSize = sizeof(fapi_ul_dci_req_t);
3921 LWR_MAC_ALLOC(ulDciReq, msgSize);
3922 if(ulDciReq != NULLP)
3924 memset(ulDciReq, 0, msgSize);
3925 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
3926 ulDciReq->slot = ulDciReqTimingInfo.slot;
3927 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
3928 if(ulDciReq->numPdus > 0)
3930 /* Fill PDCCH configuration Pdu */
3931 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
3933 /* free UL GRANT at SCH */
3934 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
3935 currDlSlot->dlInfo.ulGrant = NULLP;
3936 /* send UL DCI to PHY */
3937 msgLen = sizeof(fapi_ul_dci_req_t) - sizeof(fapi_msg_t);
3938 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, msgLen);
3939 LwrMacSendToPhy(ulDciReq->header.msg_id, sizeof(fapi_ul_dci_req_t), (void *)ulDciReq);
3945 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL DCI Request");
3946 memset(currDlSlot, 0, sizeof(MacDlSlot));
3953 lwr_mac_procInvalidEvt(&currTimingInfo);
3959 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
3962 /* PHY_STATE_IDLE */
3963 lwr_mac_procParamReqEvt,
3964 lwr_mac_procParamRspEvt,
3965 lwr_mac_procConfigReqEvt,
3966 lwr_mac_procConfigRspEvt,
3967 lwr_mac_procInvalidEvt,
3968 lwr_mac_procInvalidEvt,
3971 /* PHY_STATE_CONFIGURED */
3972 lwr_mac_procParamReqEvt,
3973 lwr_mac_procParamRspEvt,
3974 lwr_mac_procConfigReqEvt,
3975 lwr_mac_procConfigRspEvt,
3976 lwr_mac_procStartReqEvt,
3977 lwr_mac_procInvalidEvt,
3980 /* PHY_STATE_RUNNING */
3981 lwr_mac_procInvalidEvt,
3982 lwr_mac_procInvalidEvt,
3983 lwr_mac_procConfigReqEvt,
3984 lwr_mac_procConfigRspEvt,
3985 lwr_mac_procInvalidEvt,
3986 lwr_mac_procStopReqEvt,
3990 /*******************************************************************
3992 * @brief Sends message to LWR_MAC Fsm Event Handler
3996 * Function : sendToLowerMac
3999 * -Sends message to LowerMac
4001 * @params[in] Message Type
4007 ******************************************************************/
4008 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4010 lwrMacCb.event = msgType;
4011 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4013 /**********************************************************************
4015 **********************************************************************/