1 /*******************************************************************************
2 ################################################################################
3 # Copyright (c) [2017-2019] [Radisys] #
5 # Licensed under the Apache License, Version 2.0 (the "License"); #
6 # you may not use this file except in compliance with the License. #
7 # You may obtain a copy of the License at #
9 # http://www.apache.org/licenses/LICENSE-2.0 #
11 # Unless required by applicable law or agreed to in writing, software #
12 # distributed under the License is distributed on an "AS IS" BASIS, #
13 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
14 # See the License for the specific language governing permissions and #
15 # limitations under the License. #
16 ################################################################################
17 *******************************************************************************/
20 /* header include files -- defines (.h) */
21 #include "common_def.h"
24 #include "du_app_mac_inf.h"
25 #include "mac_sch_interface.h"
26 #include "lwr_mac_upr_inf.h"
28 #include "lwr_mac_phy.h"
32 #include "fapi_vendor_extension.h"
37 #include "lwr_mac_fsm.h"
38 #include "mac_utils.h"
40 #define MIB_SFN_BITMASK 0xFC
41 #define PDCCH_PDU_TYPE 0
42 #define PDSCH_PDU_TYPE 1
43 #define SSB_PDU_TYPE 3
44 #define PRACH_PDU_TYPE 0
45 #define PUSCH_PDU_TYPE 1
46 #define PUCCH_PDU_TYPE 2
48 #define SET_MSG_LEN(x, size) x += size
50 void fapiMacConfigRsp(uint16_t cellId);
51 uint8_t UnrestrictedSetNcsTable[MAX_ZERO_CORR_CFG_IDX];
53 /* Global variables */
55 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo);
57 void lwrMacLayerInit()
62 /* Initializing WLS free mem list */
64 for(idx = 0; idx < WLS_MEM_FREE_PRD; idx++)
66 cmLListInit(&wlsBlockToFreeList[idx]);
71 /*******************************************************************
73 * @brief Handles Invalid Request Event
77 * Function : lwr_mac_procInvalidEvt
80 * - Displays the PHY state when the invalid event occurs
83 * @return ROK - success
86 * ****************************************************************/
87 uint8_t lwr_mac_procInvalidEvt(void *msg)
89 printf("\nLWR_MAC: Error Indication Event[%d] received in state [%d]", lwrMacCb.event, lwrMacCb.phyState);
94 /*******************************************************************
96 * @brief Fills FAPI message header
100 * Function : fillMsgHeader
103 * -Fills FAPI message header
105 * @params[in] Pointer to header
111 * ****************************************************************/
112 void fillMsgHeader(fapi_msg_t *hdr, uint16_t msgType, uint16_t msgLen)
114 memset(hdr, 0, sizeof(fapi_msg_t));
115 hdr->msg_id = msgType;
116 hdr->length = msgLen;
119 /*******************************************************************
121 * @brief Fills FAPI Config Request message header
125 * Function : fillTlvs
128 * -Fills FAPI Config Request message header
130 * @params[in] Pointer to TLV
137 * ****************************************************************/
138 void fillTlvs(fapi_uint32_tlv_t *tlv, uint16_t tag, uint16_t length,
139 uint32_t value, uint32_t *msgLen)
142 tlv->tl.length = length;
144 *msgLen = *msgLen + sizeof(tag) + sizeof(length) + length;
146 /*******************************************************************
148 * @brief fills the cyclic prefix by comparing the bitmask
152 * Function : fillCyclicPrefix
155 * -checks the value with the bitmask and
156 * fills the cellPtr's cyclic prefix.
158 * @params[in] Pointer to ClCellParam
159 * Value to be compared
162 ********************************************************************/
163 void fillCyclicPrefix(uint8_t value, ClCellParam **cellPtr)
165 if((value & FAPI_NORMAL_CYCLIC_PREFIX_MASK) == FAPI_NORMAL_CYCLIC_PREFIX_MASK)
167 (*cellPtr)->cyclicPrefix = NORMAL_CYCLIC_PREFIX_MASK;
169 else if((value & FAPI_EXTENDED_CYCLIC_PREFIX_MASK) == FAPI_EXTENDED_CYCLIC_PREFIX_MASK)
171 (*cellPtr)->cyclicPrefix = EXTENDED_CYCLIC_PREFIX_MASK;
175 (*cellPtr)->cyclicPrefix = INVALID_VALUE;
179 /*******************************************************************
181 * @brief fills the subcarrier spacing of Downlink by comparing the bitmask
185 * Function : fillSubcarrierSpaceDl
188 * -checks the value with the bitmask and
189 * fills the cellPtr's subcarrier spacing in DL
191 * @params[in] Pointer to ClCellParam
192 * Value to be compared
195 * ****************************************************************/
197 void fillSubcarrierSpaceDl(uint8_t value, ClCellParam **cellPtr)
199 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
201 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_15_KHZ;
203 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
205 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_30_KHZ;
207 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
209 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_60_KHZ;
211 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
213 (*cellPtr)->supportedSubcarrierSpacingDl = SPACING_120_KHZ;
217 (*cellPtr)->supportedSubcarrierSpacingDl = INVALID_VALUE;
221 /*******************************************************************
223 * @brief fills the downlink bandwidth by comparing the bitmask
227 * Function : fillBandwidthDl
230 * -checks the value with the bitmask and
231 * -fills the cellPtr's DL Bandwidth
233 * @params[in] Pointer to ClCellParam
234 * Value to be compared
237 * ****************************************************************/
239 void fillBandwidthDl(uint16_t value, ClCellParam **cellPtr)
241 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
243 (*cellPtr)->supportedBandwidthDl = BW_5MHZ;
245 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
247 (*cellPtr)->supportedBandwidthDl = BW_10MHZ;
249 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
251 (*cellPtr)->supportedBandwidthDl = BW_15MHZ;
253 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
255 (*cellPtr)->supportedBandwidthDl = BW_20MHZ;
257 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
259 (*cellPtr)->supportedBandwidthDl = BW_40MHZ;
261 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
263 (*cellPtr)->supportedBandwidthDl = BW_50MHZ;
265 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
267 (*cellPtr)->supportedBandwidthDl = BW_60MHZ;
269 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
271 (*cellPtr)->supportedBandwidthDl = BW_70MHZ;
273 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
275 (*cellPtr)->supportedBandwidthDl = BW_80MHZ;
277 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
279 (*cellPtr)->supportedBandwidthDl = BW_90MHZ;
281 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
283 (*cellPtr)->supportedBandwidthDl = BW_100MHZ;
285 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
287 (*cellPtr)->supportedBandwidthDl = BW_200MHZ;
289 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
291 (*cellPtr)->supportedBandwidthDl = BW_400MHZ;
295 (*cellPtr)->supportedBandwidthDl = INVALID_VALUE;
299 /*******************************************************************
301 * @brief fills the subcarrier spacing of Uplink by comparing the bitmask
305 * Function : fillSubcarrierSpaceUl
308 * -checks the value with the bitmask and
309 * -fills cellPtr's subcarrier spacing in UL
311 * @params[in] Pointer to ClCellParam
312 * Value to be compared
315 * ****************************************************************/
317 void fillSubcarrierSpaceUl(uint8_t value, ClCellParam **cellPtr)
319 if((value & FAPI_15KHZ_MASK) == FAPI_15KHZ_MASK)
321 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_15_KHZ;
323 else if((value & FAPI_30KHZ_MASK) == FAPI_30KHZ_MASK)
325 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_30_KHZ;
327 else if((value & FAPI_60KHZ_MASK) == FAPI_60KHZ_MASK)
329 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_60_KHZ;
331 else if((value & FAPI_120KHZ_MASK) == FAPI_120KHZ_MASK)
333 (*cellPtr)->supportedSubcarrierSpacingsUl = SPACING_120_KHZ;
337 (*cellPtr)->supportedSubcarrierSpacingsUl = INVALID_VALUE;
341 /*******************************************************************
343 * @brief fills the uplink bandwidth by comparing the bitmask
347 * Function : fillBandwidthUl
350 * -checks the value with the bitmask and
351 * fills the cellPtr's UL Bandwidth
355 * @params[in] Pointer to ClCellParam
356 * Value to be compared
360 * ****************************************************************/
362 void fillBandwidthUl(uint16_t value, ClCellParam **cellPtr)
364 if((value & FAPI_5MHZ_BW_MASK) == FAPI_5MHZ_BW_MASK)
366 (*cellPtr)->supportedBandwidthUl = BW_5MHZ;
368 else if((value & FAPI_10MHZ_BW_MASK) == FAPI_10MHZ_BW_MASK)
370 (*cellPtr)->supportedBandwidthUl = BW_10MHZ;
372 else if((value & FAPI_15MHZ_BW_MASK) == FAPI_15MHZ_BW_MASK)
374 (*cellPtr)->supportedBandwidthUl = BW_15MHZ;
376 else if((value & FAPI_20MHZ_BW_MASK) == FAPI_20MHZ_BW_MASK)
378 (*cellPtr)->supportedBandwidthUl = BW_20MHZ;
380 else if((value & FAPI_40MHZ_BW_MASK) == FAPI_40MHZ_BW_MASK)
382 (*cellPtr)->supportedBandwidthUl = BW_40MHZ;
384 else if((value & FAPI_50MHZ_BW_MASK) == FAPI_50MHZ_BW_MASK)
386 (*cellPtr)->supportedBandwidthUl = BW_50MHZ;
388 else if((value & FAPI_60MHZ_BW_MASK) == FAPI_60MHZ_BW_MASK)
390 (*cellPtr)->supportedBandwidthUl = BW_60MHZ;
392 else if((value & FAPI_70MHZ_BW_MASK) == FAPI_70MHZ_BW_MASK)
394 (*cellPtr)->supportedBandwidthUl = BW_70MHZ;
396 else if((value & FAPI_80MHZ_BW_MASK) == FAPI_80MHZ_BW_MASK)
398 (*cellPtr)->supportedBandwidthUl = BW_80MHZ;
400 else if((value & FAPI_90MHZ_BW_MASK) == FAPI_90MHZ_BW_MASK)
402 (*cellPtr)->supportedBandwidthUl = BW_90MHZ;
404 else if((value & FAPI_100MHZ_BW_MASK) == FAPI_100MHZ_BW_MASK)
406 (*cellPtr)->supportedBandwidthUl = BW_100MHZ;
408 else if((value & FAPI_200MHZ_BW_MASK) == FAPI_200MHZ_BW_MASK)
410 (*cellPtr)->supportedBandwidthUl = BW_200MHZ;
412 else if((value & FAPI_400MHZ_BW_MASK) == FAPI_400MHZ_BW_MASK)
414 (*cellPtr)->supportedBandwidthUl = BW_400MHZ;
418 (*cellPtr)->supportedBandwidthUl = INVALID_VALUE;
421 /*******************************************************************
423 * @brief fills the CCE maping by comparing the bitmask
427 * Function : fillCCEmaping
430 * -checks the value with the bitmask and
431 * fills the cellPtr's CCE Mapping Type
434 * @params[in] Pointer to ClCellParam
435 * Value to be compared
438 * ****************************************************************/
440 void fillCCEmaping(uint8_t value, ClCellParam **cellPtr)
442 if ((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_INTERLEAVED_MASK)
444 (*cellPtr)->cceMappingType = CCE_MAPPING_INTERLEAVED_MASK;
446 else if((value & FAPI_CCE_MAPPING_INTERLEAVED_MASK) == FAPI_CCE_MAPPING_NONINTERLVD_MASK)
448 (*cellPtr)->cceMappingType = CCE_MAPPING_NONINTERLVD_MASK;
452 (*cellPtr)->cceMappingType = INVALID_VALUE;
456 /*******************************************************************
458 * @brief fills the PUCCH format by comparing the bitmask
462 * Function : fillPucchFormat
465 * -checks the value with the bitmask and
466 * fills the cellPtr's pucch format
469 * @params[in] Pointer to ClCellParam
470 * Value to be compared
473 * ****************************************************************/
475 void fillPucchFormat(uint8_t value, ClCellParam **cellPtr)
477 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
479 (*cellPtr)->pucchFormats = FORMAT_0;
481 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
483 (*cellPtr)->pucchFormats = FORMAT_1;
485 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
487 (*cellPtr)->pucchFormats = FORMAT_2;
489 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
491 (*cellPtr)->pucchFormats = FORMAT_3;
493 else if((value & FAPI_FORMAT_4_MASK) == FAPI_FORMAT_4_MASK)
495 (*cellPtr)->pucchFormats = FORMAT_4;
499 (*cellPtr)->pucchFormats = INVALID_VALUE;
503 /*******************************************************************
505 * @brief fills the PDSCH Mapping Type by comparing the bitmask
509 * Function : fillPdschMappingType
512 * -checks the value with the bitmask and
513 * fills the cellPtr's PDSCH MappingType
515 * @params[in] Pointer to ClCellParam
516 * Value to be compared
519 * ****************************************************************/
521 void fillPdschMappingType(uint8_t value, ClCellParam **cellPtr)
523 if((value & FAPI_PDSCH_MAPPING_TYPE_A_MASK) == FAPI_PDSCH_MAPPING_TYPE_A_MASK)
525 (*cellPtr)->pdschMappingType = MAPPING_TYPE_A;
527 else if((value & FAPI_PDSCH_MAPPING_TYPE_B_MASK) == FAPI_PDSCH_MAPPING_TYPE_B_MASK)
529 (*cellPtr)->pdschMappingType = MAPPING_TYPE_B;
533 (*cellPtr)->pdschMappingType = INVALID_VALUE;
537 /*******************************************************************
539 * @brief fills the PDSCH Allocation Type by comparing the bitmask
543 * Function : fillPdschAllocationType
546 * -checks the value with the bitmask and
547 * fills the cellPtr's PDSCH AllocationType
549 * @params[in] Pointer to ClCellParam
550 * Value to be compared
553 * ****************************************************************/
555 void fillPdschAllocationType(uint8_t value, ClCellParam **cellPtr)
557 if((value & FAPI_PDSCH_ALLOC_TYPE_0_MASK) == FAPI_PDSCH_ALLOC_TYPE_0_MASK)
559 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_0;
561 else if((value & FAPI_PDSCH_ALLOC_TYPE_1_MASK) == FAPI_PDSCH_ALLOC_TYPE_1_MASK)
563 (*cellPtr)->pdschAllocationTypes = ALLOCATION_TYPE_1;
567 (*cellPtr)->pdschAllocationTypes = INVALID_VALUE;
571 /*******************************************************************
573 * @brief fills the PDSCH PRB Mapping Type by comparing the bitmask
577 * Function : fillPrbMappingType
580 * -checks the value with the bitmask and
581 * fills the cellPtr's PRB Mapping Type
583 * @params[in] Pointer to ClCellParam
584 * Value to be compared
587 ******************************************************************/
588 void fillPrbMappingType(uint8_t value, ClCellParam **cellPtr)
590 if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
592 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
594 else if((value & FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PDSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
596 (*cellPtr)->pdschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
600 (*cellPtr)->pdschVrbToPrbMapping = INVALID_VALUE;
604 /*******************************************************************
606 * @brief fills the PDSCH DmrsConfig Type by comparing the bitmask
610 * Function : fillPdschDmrsConfigType
613 * -checks the value with the bitmask and
614 * fills the cellPtr's DmrsConfig Type
616 * @params[in] Pointer to ClCellParam
617 * Value to be compared
620 ******************************************************************/
622 void fillPdschDmrsConfigType(uint8_t value, ClCellParam **cellPtr)
624 if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_1_MASK)
626 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
628 else if((value & FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PDSCH_DMRS_CONFIG_TYPE_2_MASK)
630 (*cellPtr)->pdschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
634 (*cellPtr)->pdschDmrsConfigTypes = INVALID_VALUE;
638 /*******************************************************************
640 * @brief fills the PDSCH DmrsLength by comparing the bitmask
644 * Function : fillPdschDmrsLength
647 * -checks the value with the bitmask and
648 * fills the cellPtr's PdschDmrsLength
650 * @params[in] Pointer to ClCellParam
651 * Value to be compared
654 ******************************************************************/
655 void fillPdschDmrsLength(uint8_t value, ClCellParam **cellPtr)
657 if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_1)
659 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_1;
661 else if(value == FAPI_PDSCH_DMRS_MAX_LENGTH_2)
663 (*cellPtr)->pdschDmrsMaxLength = DMRS_MAX_LENGTH_2;
667 (*cellPtr)->pdschDmrsMaxLength = INVALID_VALUE;
671 /*******************************************************************
673 * @brief fills the PDSCH Dmrs Additional Pos by comparing the bitmask
677 * Function : fillPdschDmrsAddPos
680 * -checks the value with the bitmask and
681 * fills the cellPtr's Pdsch DmrsAddPos
683 * @params[in] Pointer to ClCellParam
684 * Value to be compared
687 ******************************************************************/
689 void fillPdschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
691 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
693 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
695 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
697 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
699 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
701 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
703 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
705 (*cellPtr)->pdschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
709 (*cellPtr)->pdschDmrsAdditionalPos = INVALID_VALUE;
713 /*******************************************************************
715 * @brief fills the Modulation Order in DL by comparing the bitmask
719 * Function : fillModulationOrderDl
722 * -checks the value with the bitmask and
723 * fills the cellPtr's ModulationOrder in DL.
725 * @params[in] Pointer to ClCellParam
726 * Value to be compared
729 ******************************************************************/
730 void fillModulationOrderDl(uint8_t value, ClCellParam **cellPtr)
734 (*cellPtr)->supportedMaxModulationOrderDl = MOD_QPSK;
738 (*cellPtr)->supportedMaxModulationOrderDl = MOD_16QAM;
742 (*cellPtr)->supportedMaxModulationOrderDl = MOD_64QAM;
746 (*cellPtr)->supportedMaxModulationOrderDl = MOD_256QAM;
750 (*cellPtr)->supportedMaxModulationOrderDl = INVALID_VALUE;
754 /*******************************************************************
756 * @brief fills the PUSCH DmrsConfig Type by comparing the bitmask
760 * Function : fillPuschDmrsConfigType
763 * -checks the value with the bitmask and
764 * fills the cellPtr's PUSCH DmrsConfigType
766 * @params[in] Pointer to ClCellParam
767 * Value to be compared
770 ******************************************************************/
772 void fillPuschDmrsConfig(uint8_t value, ClCellParam **cellPtr)
774 if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_1_MASK)
776 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_1;
778 else if((value & FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK) == FAPI_PUSCH_DMRS_CONFIG_TYPE_2_MASK)
780 (*cellPtr)->puschDmrsConfigTypes = DMRS_CONFIG_TYPE_2;
784 (*cellPtr)->puschDmrsConfigTypes = INVALID_VALUE;
788 /*******************************************************************
790 * @brief fills the PUSCH DmrsLength by comparing the bitmask
794 * Function : fillPuschDmrsLength
797 * -checks the value with the bitmask and
798 * fills the cellPtr's PUSCH DmrsLength
800 * @params[in] Pointer to ClCellParam
801 * Value to be compared
804 ******************************************************************/
806 void fillPuschDmrsLength(uint8_t value, ClCellParam **cellPtr)
808 if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_1)
810 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_1;
812 else if(value == FAPI_PUSCH_DMRS_MAX_LENGTH_2)
814 (*cellPtr)->puschDmrsMaxLength = DMRS_MAX_LENGTH_2;
818 (*cellPtr)->puschDmrsMaxLength = INVALID_VALUE;
822 /*******************************************************************
824 * @brief fills the PUSCH Dmrs Additional position by comparing the bitmask
828 * Function : fillPuschDmrsAddPos
831 * -checks the value with the bitmask and
832 * fills the cellPtr's PUSCH DmrsAddPos
834 * @params[in] Pointer to ClCellParam
835 * Value to be compared
838 ******************************************************************/
840 void fillPuschDmrsAddPos(uint8_t value, ClCellParam **cellPtr)
842 if((value & FAPI_DMRS_ADDITIONAL_POS_0_MASK) == FAPI_DMRS_ADDITIONAL_POS_0_MASK)
844 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_0;
846 else if((value & FAPI_DMRS_ADDITIONAL_POS_1_MASK) == FAPI_DMRS_ADDITIONAL_POS_1_MASK)
848 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_1;
850 else if((value & FAPI_DMRS_ADDITIONAL_POS_2_MASK) == FAPI_DMRS_ADDITIONAL_POS_2_MASK)
852 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_2;
854 else if((value & FAPI_DMRS_ADDITIONAL_POS_3_MASK) == FAPI_DMRS_ADDITIONAL_POS_3_MASK)
856 (*cellPtr)->puschDmrsAdditionalPos = DMRS_ADDITIONAL_POS_3;
860 (*cellPtr)->puschDmrsAdditionalPos = INVALID_VALUE;
864 /*******************************************************************
866 * @brief fills the PUSCH Mapping Type by comparing the bitmask
870 * Function : fillPuschMappingType
873 * -checks the value with the bitmask and
874 * fills the cellPtr's PUSCH MappingType
876 * @params[in] Pointer to ClCellParam
877 * Value to be compared
880 ******************************************************************/
882 void fillPuschMappingType(uint8_t value, ClCellParam **cellPtr)
884 if((value & FAPI_PUSCH_MAPPING_TYPE_A_MASK) == FAPI_PUSCH_MAPPING_TYPE_A_MASK)
886 (*cellPtr)->puschMappingType = MAPPING_TYPE_A;
888 else if((value & FAPI_PUSCH_MAPPING_TYPE_B_MASK) == FAPI_PUSCH_MAPPING_TYPE_B_MASK)
890 (*cellPtr)->puschMappingType = MAPPING_TYPE_B;
894 (*cellPtr)->puschMappingType = INVALID_VALUE;
898 /*******************************************************************
900 * @brief fills the PUSCH Allocation Type by comparing the bitmask
904 * Function : fillPuschAllocationType
907 * -checks the value with the bitmask and
908 * fills the cellPtr's PUSCH AllocationType
910 * @params[in] Pointer to ClCellParam
911 * Value to be compared
914 ******************************************************************/
916 void fillPuschAllocationType(uint8_t value, ClCellParam **cellPtr)
918 if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
920 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_0;
922 else if((value & FAPI_PUSCH_ALLOC_TYPE_0_MASK) == FAPI_PUSCH_ALLOC_TYPE_0_MASK)
924 (*cellPtr)->puschAllocationTypes = ALLOCATION_TYPE_1;
928 (*cellPtr)->puschAllocationTypes = INVALID_VALUE;
932 /*******************************************************************
934 * @brief fills the PUSCH PRB Mapping Type by comparing the bitmask
938 * Function : fillPuschPrbMappingType
941 * -checks the value with the bitmask and
942 * fills the cellPtr's PUSCH PRB MApping Type
944 * @params[in] Pointer to ClCellParam
945 * Value to be compared
948 ******************************************************************/
950 void fillPuschPrbMappingType(uint8_t value, ClCellParam **cellPtr)
952 if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_NON_INTLV_MASK)
954 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_NON_INTLV;
956 else if((value & FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK) == FAPI_PUSCH_VRB_TO_PRB_MAP_INTLVD_MASK)
958 (*cellPtr)->puschVrbToPrbMapping = VRB_TO_PRB_MAP_INTLVD;
962 (*cellPtr)->puschVrbToPrbMapping = INVALID_VALUE;
966 /*******************************************************************
968 * @brief fills the Modulation Order in Ul by comparing the bitmask
972 * Function : fillModulationOrderUl
975 * -checks the value with the bitmask and
976 * fills the cellPtr's Modualtsion Order in UL.
978 * @params[in] Pointer to ClCellParam
979 * Value to be compared
982 ******************************************************************/
984 void fillModulationOrderUl(uint8_t value, ClCellParam **cellPtr)
988 (*cellPtr)->supportedModulationOrderUl = MOD_QPSK;
992 (*cellPtr)->supportedModulationOrderUl = MOD_16QAM;
996 (*cellPtr)->supportedModulationOrderUl = MOD_64QAM;
1000 (*cellPtr)->supportedModulationOrderUl = MOD_256QAM;
1004 (*cellPtr)->supportedModulationOrderUl = INVALID_VALUE;
1008 /*******************************************************************
1010 * @brief fills the PUSCH Aggregation Factor by comparing the bitmask
1014 * Function : fillPuschAggregationFactor
1017 * -checks the value with the bitmask and
1018 * fills the cellPtr's PUSCH Aggregation Factor
1020 * @params[in] Pointer to ClCellParam
1021 * Value to be compared
1024 ******************************************************************/
1026 void fillPuschAggregationFactor(uint8_t value, ClCellParam **cellPtr)
1028 if((value & FAPI_FORMAT_0_MASK) == FAPI_FORMAT_0_MASK)
1030 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_1;
1032 else if((value & FAPI_FORMAT_1_MASK) == FAPI_FORMAT_1_MASK)
1034 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_2;
1036 else if((value & FAPI_FORMAT_2_MASK) == FAPI_FORMAT_2_MASK)
1038 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_4;
1040 else if((value & FAPI_FORMAT_3_MASK) == FAPI_FORMAT_3_MASK)
1042 (*cellPtr)->puschAggregationFactor = AGG_FACTOR_8;
1046 (*cellPtr)->puschAggregationFactor = INVALID_VALUE;
1050 /*******************************************************************
1052 * @brief fills the PRACH Long Format by comparing the bitmask
1056 * Function : fillPrachLongFormat
1059 * -checks the value with the bitmask and
1060 * fills the cellPtr's PRACH Long Format
1062 * @params[in] Pointer to ClCellParam
1063 * Value to be compared
1066 ******************************************************************/
1068 void fillPrachLongFormat(uint8_t value, ClCellParam **cellPtr)
1070 if((value & FAPI_PRACH_LF_FORMAT_0_MASK) == FAPI_PRACH_LF_FORMAT_0_MASK)
1072 (*cellPtr)->prachLongFormats = FORMAT_0;
1074 else if((value & FAPI_PRACH_LF_FORMAT_1_MASK) == FAPI_PRACH_LF_FORMAT_1_MASK)
1076 (*cellPtr)->prachLongFormats = FORMAT_1;
1078 else if((value & FAPI_PRACH_LF_FORMAT_2_MASK) == FAPI_PRACH_LF_FORMAT_2_MASK)
1080 (*cellPtr)->prachLongFormats = FORMAT_2;
1082 else if((value & FAPI_PRACH_LF_FORMAT_3_MASK) == FAPI_PRACH_LF_FORMAT_3_MASK)
1084 (*cellPtr)->prachLongFormats = FORMAT_3;
1088 (*cellPtr)->prachLongFormats = INVALID_VALUE;
1092 /*******************************************************************
1094 * @brief fills the PRACH Short Format by comparing the bitmask
1098 * Function : fillPrachShortFormat
1101 * -checks the value with the bitmask and
1102 * fills the cellPtr's PRACH ShortFormat
1104 * @params[in] Pointer to ClCellParam
1105 * Value to be compared
1108 ******************************************************************/
1110 void fillPrachShortFormat(uint8_t value, ClCellParam **cellPtr)
1112 if((value & FAPI_PRACH_SF_FORMAT_A1_MASK) == FAPI_PRACH_SF_FORMAT_A1_MASK)
1114 (*cellPtr)->prachShortFormats = SF_FORMAT_A1;
1116 else if((value & FAPI_PRACH_SF_FORMAT_A2_MASK) == FAPI_PRACH_SF_FORMAT_A2_MASK)
1118 (*cellPtr)->prachShortFormats = SF_FORMAT_A2;
1120 else if((value & FAPI_PRACH_SF_FORMAT_A3_MASK) == FAPI_PRACH_SF_FORMAT_A3_MASK)
1122 (*cellPtr)->prachShortFormats = SF_FORMAT_A3;
1124 else if((value & FAPI_PRACH_SF_FORMAT_B1_MASK) == FAPI_PRACH_SF_FORMAT_B1_MASK)
1126 (*cellPtr)->prachShortFormats = SF_FORMAT_B1;
1128 else if((value & FAPI_PRACH_SF_FORMAT_B2_MASK) == FAPI_PRACH_SF_FORMAT_B2_MASK)
1130 (*cellPtr)->prachShortFormats = SF_FORMAT_B2;
1132 else if((value & FAPI_PRACH_SF_FORMAT_B3_MASK) == FAPI_PRACH_SF_FORMAT_B3_MASK)
1134 (*cellPtr)->prachShortFormats = SF_FORMAT_B3;
1136 else if((value & FAPI_PRACH_SF_FORMAT_B4_MASK) == FAPI_PRACH_SF_FORMAT_B4_MASK)
1138 (*cellPtr)->prachShortFormats = SF_FORMAT_B4;
1140 else if((value & FAPI_PRACH_SF_FORMAT_C0_MASK) == FAPI_PRACH_SF_FORMAT_C0_MASK)
1142 (*cellPtr)->prachShortFormats = SF_FORMAT_C0;
1144 else if((value & FAPI_PRACH_SF_FORMAT_C2_MASK) == FAPI_PRACH_SF_FORMAT_C2_MASK)
1146 (*cellPtr)->prachShortFormats = SF_FORMAT_C2;
1150 (*cellPtr)->prachShortFormats = INVALID_VALUE;
1154 /*******************************************************************
1156 * @brief fills the Fd Occasions Type by comparing the bitmask
1160 * Function : fillFdOccasions
1163 * -checks the value with the bitmask and
1164 * fills the cellPtr's Fd Occasions
1166 * @params[in] Pointer to ClCellParam
1167 * Value to be compared
1170 ******************************************************************/
1172 void fillFdOccasions(uint8_t value, ClCellParam **cellPtr)
1176 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_1;
1180 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_2;
1184 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_4;
1188 (*cellPtr)->maxPrachFdOccasionsInASlot = PRACH_FD_OCC_IN_A_SLOT_8;
1192 (*cellPtr)->maxPrachFdOccasionsInASlot = INVALID_VALUE;
1196 /*******************************************************************
1198 * @brief fills the RSSI Measurement by comparing the bitmask
1202 * Function : fillRssiMeas
1205 * -checks the value with the bitmask and
1206 * fills the cellPtr's RSSI Measurement report
1208 * @params[in] Pointer to ClCellParam
1209 * Value to be compared
1212 ******************************************************************/
1214 void fillRssiMeas(uint8_t value, ClCellParam **cellPtr)
1216 if((value & FAPI_RSSI_REPORT_IN_DBM_MASK) == FAPI_RSSI_REPORT_IN_DBM_MASK)
1218 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBM;
1220 else if((value & FAPI_RSSI_REPORT_IN_DBFS_MASK) == FAPI_RSSI_REPORT_IN_DBFS_MASK)
1222 (*cellPtr)->rssiMeasurementSupport = RSSI_REPORT_DBFS;
1226 (*cellPtr)->rssiMeasurementSupport = INVALID_VALUE;
1230 /*******************************************************************
1232 * @brief Returns the TLVs value
1236 * Function : getParamValue
1239 * -return TLVs value
1242 * @return ROK - temp
1245 * ****************************************************************/
1247 uint32_t getParamValue(fapi_uint16_tlv_t *tlv, uint16_t type)
1250 posPtr = &tlv->tl.tag;
1251 posPtr += sizeof(tlv->tl.tag);
1252 posPtr += sizeof(tlv->tl.length);
1253 /*TO DO: malloc to SSI memory */
1254 if(type == FAPI_UINT_8)
1256 return(*(uint8_t *)posPtr);
1258 else if(type == FAPI_UINT_16)
1260 return(*(uint16_t *)posPtr);
1262 else if(type == FAPI_UINT_32)
1264 return(*(uint32_t *)posPtr);
1268 DU_LOG("\nLWR_MAC: Value Extraction failed" );
1274 /*******************************************************************
1276 * @brief Modifes the received mibPdu to uint32 bit
1277 * and stores it in MacCellCfg
1281 * Function : setMibPdu
1286 * @params[in] Pointer to mibPdu
1287 * pointer to modified value
1288 ******************************************************************/
1289 void setMibPdu(uint8_t *mibPdu, uint32_t *val, uint16_t sfn)
1291 *mibPdu |= (((uint8_t)(sfn >> 2)) & MIB_SFN_BITMASK);
1292 *val = (mibPdu[0] << 24 | mibPdu[1] << 16 | mibPdu[2] << 8);
1293 DU_LOG("\nLWR_MAC: MIB PDU %x", *val);
1296 /*******************************************************************
1298 * @brief Sends FAPI Param req to PHY
1302 * Function : lwr_mac_procParamReqEvt
1305 * -Sends FAPI Param req to PHY
1308 * @return ROK - success
1311 * ****************************************************************/
1313 uint8_t lwr_mac_procParamReqEvt(void *msg)
1316 /* startGuardTimer(); */
1317 uint32_t msgLen = 0; //Length of message Body
1318 fapi_param_req_t *paramReq = NULL;
1320 LWR_MAC_ALLOC(paramReq, sizeof(fapi_param_req_t));
1321 if(paramReq != NULL)
1323 fillMsgHeader(¶mReq->header, FAPI_PARAM_REQUEST, msgLen);
1325 DU_LOG("\nLWR_MAC: Sending Param Request to Phy");
1326 LwrMacSendToPhy(paramReq->header.msg_id, \
1327 sizeof(fapi_param_req_t), (void *)paramReq);
1331 DU_LOG("\nLWR_MAC: Failed to allocate memory for Param Request");
1338 /*******************************************************************
1340 * @brief Sends FAPI Param Response to MAC via PHY
1344 * Function : lwr_mac_procParamRspEvt
1347 * -Sends FAPI Param rsp to MAC via PHY
1350 * @return ROK - success
1353 * ****************************************************************/
1355 uint8_t lwr_mac_procParamRspEvt(void *msg)
1358 /* stopGuardTimer(); */
1360 uint32_t encodedVal;
1361 fapi_param_resp_t *paramRsp;
1362 ClCellParam *cellParam = NULLP;
1364 paramRsp = (fapi_param_resp_t *)msg;
1365 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, lwrMacCb.phyState);
1367 if(paramRsp != NULLP)
1369 MAC_ALLOC(cellParam, sizeof(ClCellParam));
1370 if(cellParam != NULLP)
1372 DU_LOG("\n LWR_MAC: Filling TLVS into MAC API");
1373 if(paramRsp->error_code == MSG_OK)
1375 for(index = 0; index < paramRsp->number_of_tlvs; index++)
1377 switch(paramRsp->tlvs[index].tl.tag)
1379 case FAPI_RELEASE_CAPABILITY_TAG:
1380 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1381 if(encodedVal != RFAILED && (encodedVal & RELEASE_15) == RELEASE_15)
1383 cellParam->releaseCapability = RELEASE_15;
1387 case FAPI_PHY_STATE_TAG:
1388 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1389 if(encodedVal != RFAILED && encodedVal != lwrMacCb.phyState)
1391 printf("\n PhyState mismatch [%d][%d]", lwrMacCb.phyState, lwrMacCb.event);
1396 case FAPI_SKIP_BLANK_DL_CONFIG_TAG:
1397 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1398 if(encodedVal != RFAILED && encodedVal != 0)
1400 cellParam->skipBlankDlConfig = SUPPORTED;
1404 cellParam->skipBlankDlConfig = NOT_SUPPORTED;
1408 case FAPI_SKIP_BLANK_UL_CONFIG_TAG:
1409 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1410 if(encodedVal != RFAILED && encodedVal != 0)
1412 cellParam->skipBlankUlConfig = SUPPORTED;
1416 cellParam->skipBlankUlConfig = NOT_SUPPORTED;
1420 case FAPI_NUM_CONFIG_TLVS_TO_REPORT_TYPE_TAG:
1421 cellParam->numTlvsToReport = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1424 case FAPI_CYCLIC_PREFIX_TAG:
1425 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1426 if(encodedVal != RFAILED)
1428 fillCyclicPrefix(encodedVal, &cellParam);
1432 case FAPI_SUPPORTED_SUBCARRIER_SPACING_DL_TAG:
1433 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1434 if(encodedVal != RFAILED)
1436 fillSubcarrierSpaceDl(encodedVal, &cellParam);
1440 case FAPI_SUPPORTED_BANDWIDTH_DL_TAG:
1441 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1442 if(encodedVal != RFAILED)
1444 fillBandwidthDl(encodedVal, &cellParam);
1448 case FAPI_SUPPORTED_SUBCARRIER_SPACING_UL_TAG:
1449 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1450 if(encodedVal != RFAILED)
1452 fillSubcarrierSpaceUl(encodedVal, &cellParam);
1456 case FAPI_SUPPORTED_BANDWIDTH_UL_TAG:
1457 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_16);
1458 if(encodedVal != RFAILED)
1460 fillBandwidthUl(encodedVal, &cellParam);
1464 case FAPI_CCE_MAPPING_TYPE_TAG:
1465 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1466 if(encodedVal != RFAILED)
1468 fillCCEmaping(encodedVal, &cellParam);
1472 case FAPI_CORESET_OUTSIDE_FIRST_3_OFDM_SYMS_OF_SLOT_TAG:
1473 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1474 if(encodedVal != RFAILED && encodedVal != 0)
1476 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = SUPPORTED;
1480 cellParam->coresetOutsideFirst3OfdmSymsOfSlot = NOT_SUPPORTED;
1484 case FAPI_PRECODER_GRANULARITY_CORESET_TAG:
1485 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1486 if(encodedVal != RFAILED && encodedVal != 0)
1488 cellParam->precoderGranularityCoreset = SUPPORTED;
1492 cellParam->precoderGranularityCoreset = NOT_SUPPORTED;
1496 case FAPI_PDCCH_MU_MIMO_TAG:
1497 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1498 if(encodedVal != RFAILED && encodedVal != 0)
1500 cellParam->pdcchMuMimo = SUPPORTED;
1504 cellParam->pdcchMuMimo = NOT_SUPPORTED;
1508 case FAPI_PDCCH_PRECODER_CYCLING_TAG:
1509 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1510 if(encodedVal != RFAILED && encodedVal != 0)
1512 cellParam->pdcchPrecoderCycling = SUPPORTED;
1516 cellParam->pdcchPrecoderCycling = NOT_SUPPORTED;
1520 case FAPI_MAX_PDCCHS_PER_SLOT_TAG:
1521 cellParam->maxPdcchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1524 case FAPI_PUCCH_FORMATS_TAG:
1525 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1526 if(encodedVal != RFAILED)
1528 fillPucchFormat(encodedVal, &cellParam);
1532 case FAPI_MAX_PUCCHS_PER_SLOT_TAG:
1533 cellParam->maxPucchsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1536 case FAPI_PDSCH_MAPPING_TYPE_TAG:
1537 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1538 if(encodedVal != RFAILED)
1540 fillPdschMappingType(encodedVal, &cellParam);
1544 case FAPI_PDSCH_ALLOCATION_TYPES_TAG:
1545 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1546 if(encodedVal != RFAILED)
1548 fillPdschAllocationType(encodedVal, &cellParam);
1552 case FAPI_PDSCH_VRB_TO_PRB_MAPPING_TAG:
1553 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1554 if(encodedVal != RFAILED)
1556 fillPrbMappingType(encodedVal, &cellParam);
1560 case FAPI_PDSCH_CBG_TAG:
1561 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1562 if(encodedVal != RFAILED && encodedVal != 0)
1564 cellParam->pdschCbg = SUPPORTED;
1568 cellParam->pdschCbg = NOT_SUPPORTED;
1572 case FAPI_PDSCH_DMRS_CONFIG_TYPES_TAG:
1573 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1574 if(encodedVal != RFAILED)
1576 fillPdschDmrsConfigType(encodedVal, &cellParam);
1580 case FAPI_PDSCH_DMRS_MAX_LENGTH_TAG:
1581 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1582 if(encodedVal != RFAILED)
1584 fillPdschDmrsLength(encodedVal, &cellParam);
1588 case FAPI_PDSCH_DMRS_ADDITIONAL_POS_TAG:
1589 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1590 if(encodedVal != RFAILED)
1592 fillPdschDmrsAddPos(encodedVal, &cellParam);
1596 case FAPI_MAX_PDSCHS_TBS_PER_SLOT_TAG:
1597 cellParam->maxPdschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1600 case FAPI_MAX_NUMBER_MIMO_LAYERS_PDSCH_TAG:
1601 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1602 if(encodedVal != RFAILED && encodedVal < FAPI_MAX_NUMBERMIMO_LAYERS_PDSCH)
1604 cellParam->maxNumberMimoLayersPdsch = encodedVal;
1608 case FAPI_SUPPORTED_MAX_MODULATION_ORDER_DL_TAG:
1609 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1610 if(encodedVal != RFAILED)
1612 fillModulationOrderDl(encodedVal, &cellParam);
1616 case FAPI_MAX_MU_MIMO_USERS_DL_TAG:
1617 cellParam->maxMuMimoUsersDl = \
1618 getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1621 case FAPI_PDSCH_DATA_IN_DMRS_SYMBOLS_TAG:
1622 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1623 if(encodedVal != RFAILED && encodedVal != 0)
1625 cellParam->pdschDataInDmrsSymbols = SUPPORTED;
1629 cellParam->pdschDataInDmrsSymbols = NOT_SUPPORTED;
1633 case FAPI_PREMPTIONSUPPORT_TAG:
1634 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1635 if(encodedVal != RFAILED && encodedVal != 0)
1637 cellParam->premptionSupport = SUPPORTED;
1641 cellParam->premptionSupport = NOT_SUPPORTED;
1645 case FAPI_PDSCH_NON_SLOT_SUPPORT_TAG:
1646 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1647 if(encodedVal != RFAILED && encodedVal != 0)
1649 cellParam->pdschNonSlotSupport = SUPPORTED;
1653 cellParam->pdschNonSlotSupport = NOT_SUPPORTED;
1657 case FAPI_UCI_MUX_ULSCH_IN_PUSCH_TAG:
1658 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1659 if(encodedVal != RFAILED && encodedVal != 0)
1661 cellParam->uciMuxUlschInPusch = SUPPORTED;
1665 cellParam->uciMuxUlschInPusch = NOT_SUPPORTED;
1669 case FAPI_UCI_ONLY_PUSCH_TAG:
1670 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1671 if(encodedVal != RFAILED && encodedVal != 0)
1673 cellParam->uciOnlyPusch = SUPPORTED;
1677 cellParam->uciOnlyPusch = NOT_SUPPORTED;
1681 case FAPI_PUSCH_FREQUENCY_HOPPING_TAG:
1682 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1683 if(encodedVal != RFAILED && encodedVal != 0)
1685 cellParam->puschFrequencyHopping = SUPPORTED;
1689 cellParam->puschFrequencyHopping = NOT_SUPPORTED;
1693 case FAPI_PUSCH_DMRS_CONFIG_TYPES_TAG:
1694 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1695 if(encodedVal != RFAILED)
1697 fillPuschDmrsConfig(encodedVal, &cellParam);
1701 case FAPI_PUSCH_DMRS_MAX_LEN_TAG:
1702 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1703 if(encodedVal != RFAILED)
1705 fillPuschDmrsLength(encodedVal, &cellParam);
1709 case FAPI_PUSCH_DMRS_ADDITIONAL_POS_TAG:
1710 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1711 if(encodedVal != RFAILED)
1713 fillPuschDmrsAddPos(encodedVal, &cellParam);
1717 case FAPI_PUSCH_CBG_TAG:
1718 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1719 if(encodedVal != RFAILED && encodedVal != 0)
1721 cellParam->puschCbg = SUPPORTED;
1725 cellParam->puschCbg = NOT_SUPPORTED;
1729 case FAPI_PUSCH_MAPPING_TYPE_TAG:
1730 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1731 if(encodedVal != RFAILED)
1733 fillPuschMappingType(encodedVal, &cellParam);
1737 case FAPI_PUSCH_ALLOCATION_TYPES_TAG:
1738 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1739 if(encodedVal != RFAILED)
1741 fillPuschAllocationType(encodedVal, &cellParam);
1745 case FAPI_PUSCH_VRB_TO_PRB_MAPPING_TAG:
1746 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1747 if(encodedVal != RFAILED)
1749 fillPuschPrbMappingType(encodedVal, &cellParam);
1753 case FAPI_PUSCH_MAX_PTRS_PORTS_TAG:
1754 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1755 if(encodedVal != RFAILED && encodedVal < FAPI_PUSCH_MAX_PTRS_PORTS_UB)
1757 cellParam->puschMaxPtrsPorts = encodedVal;
1761 case FAPI_MAX_PDUSCHS_TBS_PER_SLOT_TAG:
1762 cellParam->maxPduschsTBsPerSlot = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1765 case FAPI_MAX_NUMBER_MIMO_LAYERS_NON_CB_PUSCH_TAG:
1766 cellParam->maxNumberMimoLayersNonCbPusch = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1769 case FAPI_SUPPORTED_MODULATION_ORDER_UL_TAG:
1770 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1771 if(encodedVal != RFAILED)
1773 fillModulationOrderUl(encodedVal, &cellParam);
1777 case FAPI_MAX_MU_MIMO_USERS_UL_TAG:
1778 cellParam->maxMuMimoUsersUl = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1781 case FAPI_DFTS_OFDM_SUPPORT_TAG:
1782 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1783 if(encodedVal != RFAILED && encodedVal != 0)
1785 cellParam->dftsOfdmSupport = SUPPORTED;
1789 cellParam->dftsOfdmSupport = NOT_SUPPORTED;
1793 case FAPI_PUSCH_AGGREGATION_FACTOR_TAG:
1794 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1795 if(encodedVal != RFAILED)
1797 fillPuschAggregationFactor(encodedVal, &cellParam);
1801 case FAPI_PRACH_LONG_FORMATS_TAG:
1802 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1803 if(encodedVal != RFAILED)
1805 fillPrachLongFormat(encodedVal, &cellParam);
1809 case FAPI_PRACH_SHORT_FORMATS_TAG:
1810 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1811 if(encodedVal != RFAILED)
1813 fillPrachShortFormat(encodedVal, &cellParam);
1817 case FAPI_PRACH_RESTRICTED_SETS_TAG:
1818 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1819 if(encodedVal != RFAILED && encodedVal != 0)
1821 cellParam->prachRestrictedSets = SUPPORTED;
1825 cellParam->prachRestrictedSets = NOT_SUPPORTED;
1829 case FAPI_MAX_PRACH_FD_OCCASIONS_IN_A_SLOT_TAG:
1830 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1831 if(encodedVal != RFAILED)
1833 fillFdOccasions(encodedVal, &cellParam);
1837 case FAPI_RSSI_MEASUREMENT_SUPPORT_TAG:
1838 encodedVal = getParamValue(¶mRsp->tlvs[index], FAPI_UINT_8);
1839 if(encodedVal != RFAILED)
1841 fillRssiMeas(encodedVal, &cellParam);
1845 //printf("\n Invalid value for TLV[%x] at index[%d]", paramRsp->tlvs[index].tl.tag, index);
1849 MAC_FREE(cellParam, sizeof(ClCellParam));
1850 sendToLowerMac(FAPI_CONFIG_REQUEST, 0, (void *)NULL);
1855 DU_LOG("\n LWR_MAC: Invalid error code %d", paramRsp->error_code);
1861 DU_LOG("\nLWR_MAC: Failed to allocate memory for cell param");
1867 DU_LOG("\nLWR_MAC: Param Response received from PHY is NULL");
1875 /*******************************************************************
1877 * @brief Sends FAPI Config req to PHY
1881 * Function : lwr_mac_procConfigReqEvt
1884 * -Sends FAPI Config Req to PHY
1887 * @return ROK - success
1890 * ****************************************************************/
1892 uint8_t lwr_mac_procConfigReqEvt(void *msg)
1899 uint32_t msgLen = 0;
1901 MacCellCfg macCfgParams;
1902 fapi_vendor_msg_t *vendorMsg;
1903 fapi_config_req_t *configReq;
1904 fapi_msg_header_t *msgHeader;
1905 p_fapi_api_queue_elem_t headerElem;
1906 p_fapi_api_queue_elem_t vendorMsgQElem;
1907 p_fapi_api_queue_elem_t cfgReqQElem;
1909 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
1912 cellId = (uint16_t *)msg;
1913 GET_CELL_IDX(*cellId, cellIdx);
1914 macCfgParams = macCb.macCell[cellIdx]->macCellCfg;
1916 /* Fill Cell Configuration in lwrMacCb */
1917 memset(&lwrMacCb.cellCb[lwrMacCb.numCell], 0, sizeof(LwrMacCellCb));
1918 lwrMacCb.cellCb[lwrMacCb.numCell].cellId = macCfgParams.cellId;
1919 lwrMacCb.cellCb[lwrMacCb.numCell].phyCellId = macCfgParams.phyCellId;
1922 /* Allocte And fill Vendor msg */
1923 LWR_MAC_ALLOC(vendorMsgQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
1926 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
1929 FILL_FAPI_LIST_ELEM(vendorMsgQElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
1930 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgQElem + 1);
1931 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
1932 vendorMsg->config_req_vendor.hopping_id = 0;
1933 vendorMsg->config_req_vendor.carrier_aggregation_level = 0;
1934 vendorMsg->config_req_vendor.group_hop_flag = 0;
1935 vendorMsg->config_req_vendor.sequence_hop_flag = 0;
1937 /* Fill FAPI config req */
1938 LWR_MAC_ALLOC(cfgReqQElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_config_req_t)));
1941 DU_LOG("\nLWR_MAC: Memory allocation failed for config req");
1944 FILL_FAPI_LIST_ELEM(cfgReqQElem, vendorMsgQElem, FAPI_CONFIG_REQUEST, 1, \
1945 sizeof(fapi_config_req_t));
1947 configReq = (fapi_config_req_t *)(cfgReqQElem + 1);
1948 memset(configReq, 0, sizeof(fapi_config_req_t));
1949 fillMsgHeader(&configReq->header, FAPI_CONFIG_REQUEST, sizeof(fapi_config_req_t));
1950 configReq->number_of_tlvs = 25;
1951 msgLen = sizeof(configReq->number_of_tlvs);
1953 if(macCfgParams.dlCarrCfg.pres)
1955 fillTlvs(&configReq->tlvs[index++], FAPI_DL_BANDWIDTH_TAG, \
1956 sizeof(uint32_t), macCfgParams.dlCarrCfg.bw, &msgLen);
1957 fillTlvs(&configReq->tlvs[index++], FAPI_DL_FREQUENCY_TAG, \
1958 sizeof(uint32_t), macCfgParams.dlCarrCfg.freq, &msgLen);
1959 /* Due to bug in Intel FT code, commenting TLVs that are are not
1960 * needed to avoid error. Must be uncommented when FT bug is fixed */
1961 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_K0_TAG, \
1962 sizeof(uint16_t), macCfgParams.dlCarrCfg.k0[0], &msgLen);
1963 //fillTlvs(&configReq->tlvs[index++], FAPI_DL_GRIDSIZE_TAG, \
1964 sizeof(uint16_t), macCfgParams.dlCarrCfg.gridSize[0], &msgLen);
1965 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_TX_ANT_TAG, \
1966 sizeof(uint16_t), macCfgParams.dlCarrCfg.numAnt, &msgLen);
1968 if(macCfgParams.ulCarrCfg.pres)
1970 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_BANDWIDTH_TAG, \
1971 sizeof(uint32_t), macCfgParams.ulCarrCfg.bw, &msgLen);
1972 fillTlvs(&configReq->tlvs[index++], FAPI_UPLINK_FREQUENCY_TAG, \
1973 sizeof(uint32_t), macCfgParams.ulCarrCfg.freq, &msgLen);
1974 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_K0_TAG, \
1975 sizeof(uint16_t), macCfgParams.ulCarrCfg.k0[0], &msgLen);
1976 //fillTlvs(&configReq->tlvs[index++], FAPI_UL_GRID_SIZE_TAG, \
1977 sizeof(uint16_t), macCfgParams.ulCarrCfg.gridSize[0], &msgLen);
1978 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_RX_ANT_TAG, \
1979 sizeof(uint16_t), macCfgParams.ulCarrCfg.numAnt, &msgLen);
1981 //fillTlvs(&configReq->tlvs[index++], FAPI_FREQUENCY_SHIFT_7P5_KHZ_TAG, \
1982 sizeof(uint8_t), macCfgParams.freqShft, &msgLen);
1984 /* fill cell config */
1985 fillTlvs(&configReq->tlvs[index++], FAPI_PHY_CELL_ID_TAG, \
1986 sizeof(uint8_t), macCfgParams.phyCellId, &msgLen);
1987 fillTlvs(&configReq->tlvs[index++], FAPI_FRAME_DUPLEX_TYPE_TAG, \
1988 sizeof(uint8_t), macCfgParams.dupType, &msgLen);
1990 /* fill SSB configuration */
1991 fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_POWER_TAG, \
1992 sizeof(uint32_t), macCfgParams.ssbCfg.ssbPbchPwr, &msgLen);
1993 //fillTlvs(&configReq->tlvs[index++], FAPI_BCH_PAYLOAD_TAG, \
1994 sizeof(uint8_t), macCfgParams.ssbCfg.bchPayloadFlag, &msgLen);
1995 fillTlvs(&configReq->tlvs[index++], FAPI_SCS_COMMON_TAG, \
1996 sizeof(uint8_t), macCfgParams.ssbCfg.scsCmn, &msgLen);
1998 /* fill PRACH configuration */
1999 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SEQUENCE_LENGTH_TAG, \
2000 sizeof(uint8_t), macCfgParams.prachCfg.prachSeqLen, &msgLen);
2001 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_SUBC_SPACING_TAG, \
2002 sizeof(uint8_t), macCfgParams.prachCfg.prachSubcSpacing, &msgLen);
2003 fillTlvs(&configReq->tlvs[index++], FAPI_RESTRICTED_SET_CONFIG_TAG, \
2004 sizeof(uint8_t), macCfgParams.prachCfg.prachRstSetCfg, &msgLen);
2005 fillTlvs(&configReq->tlvs[index++], FAPI_NUM_PRACH_FD_OCCASIONS_TAG,
2006 sizeof(uint8_t), macCfgParams.prachCfg.msg1Fdm, &msgLen);
2007 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_CONFIG_INDEX_TAG,
2008 sizeof(uint8_t), macCfgParams.prachCfg.prachCfgIdx, &msgLen);
2009 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ROOT_SEQUENCE_INDEX_TAG, \
2010 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].rootSeqIdx, &msgLen);
2011 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_ROOT_SEQUENCES_TAG, \
2012 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numRootSeq, &msgLen);
2013 fillTlvs(&configReq->tlvs[index++], FAPI_K1_TAG, \
2014 sizeof(uint16_t), macCfgParams.prachCfg.fdm[0].k1, &msgLen);
2015 fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_ZERO_CORR_CONF_TAG , \
2016 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].zeroCorrZoneCfg, &msgLen);
2017 //fillTlvs(&configReq->tlvs[index++], FAPI_NUM_UNUSED_ROOT_SEQUENCES_TAG, \
2018 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].numUnusedRootSeq, &msgLen);
2019 /* if(macCfgParams.prachCfg.fdm[0].numUnusedRootSeq)
2021 for(idx = 0; idx < macCfgParams.prachCfg.fdm[0].numUnusedRootSeq; idx++)
2022 fillTlvs(&configReq->tlvs[index++], FAPI_UNUSED_ROOT_SEQUENCES_TAG, \
2023 sizeof(uint8_t), macCfgParams.prachCfg.fdm[0].unsuedRootSeq[idx], \
2028 macCfgParams.prachCfg.fdm[0].unsuedRootSeq = NULL;
2031 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PER_RACH_TAG, \
2032 sizeof(uint8_t), macCfgParams.prachCfg.ssbPerRach, &msgLen);
2033 //fillTlvs(&configReq->tlvs[index++], FAPI_PRACH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2034 sizeof(uint8_t), macCfgParams.prachCfg.prachMultCarrBand, &msgLen);
2036 /* fill SSB table */
2037 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_OFFSET_POINT_A_TAG, \
2038 sizeof(uint16_t), macCfgParams.ssbCfg.ssbOffsetPointA, &msgLen);
2039 //fillTlvs(&configReq->tlvs[index++], FAPI_BETA_PSS_TAG, \
2040 sizeof(uint8_t), macCfgParams.ssbCfg.betaPss, &msgLen);
2041 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_PERIOD_TAG, \
2042 sizeof(uint8_t), macCfgParams.ssbCfg.ssbPeriod, &msgLen);
2043 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_SUBCARRIER_OFFSET_TAG, \
2044 sizeof(uint8_t), macCfgParams.ssbCfg.ssbScOffset, &msgLen);
2046 setMibPdu(macCfgParams.ssbCfg.mibPdu, &mib, 0);
2047 fillTlvs(&configReq->tlvs[index++], FAPI_MIB_TAG , \
2048 sizeof(uint32_t), mib, &msgLen);
2050 fillTlvs(&configReq->tlvs[index++], FAPI_SSB_MASK_TAG, \
2051 sizeof(uint32_t), macCfgParams.ssbCfg.ssbMask[0], &msgLen);
2052 fillTlvs(&configReq->tlvs[index++], FAPI_BEAM_ID_TAG, \
2053 sizeof(uint8_t), macCfgParams.ssbCfg.beamId[0], &msgLen);
2054 //fillTlvs(&configReq->tlvs[index++], FAPI_SS_PBCH_MULTIPLE_CARRIERS_IN_A_BAND_TAG, \
2055 sizeof(uint8_t), macCfgParams.ssbCfg.multCarrBand, &msgLen);
2056 //fillTlvs(&configReq->tlvs[index++], FAPI_MULTIPLE_CELLS_SS_PBCH_IN_A_CARRIER_TAG, \
2057 sizeof(uint8_t), macCfgParams.ssbCfg.multCellCarr, &msgLen);
2059 /* fill TDD table */
2060 //fillTlvs(&configReq->tlvs[index++], FAPI_TDD_PERIOD_TAG, \
2061 sizeof(uint8_t), macCfgParams.tddCfg.tddPeriod, &msgLen);
2062 //fillTlvs(&configReq->tlvs[index++], FAPI_SLOT_CONFIG_TAG, \
2063 sizeof(uint8_t), macCfgParams.tddCfg.slotCfg[0][0], &msgLen);
2065 /* fill measurement config */
2066 //fillTlvs(&configReq->tlvs[index++], FAPI_RSSI_MEASUREMENT_TAG, \
2067 sizeof(uint8_t), macCfgParams.rssiUnit, &msgLen);
2069 /* fill DMRS Type A Pos */
2070 fillTlvs(&configReq->tlvs[index++], FAPI_DMRS_TYPE_A_POS_TAG, \
2071 sizeof(uint8_t), macCfgParams.dmrsTypeAPos, &msgLen);
2073 /* Fill message header */
2074 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2077 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2080 FILL_FAPI_LIST_ELEM(headerElem, cfgReqQElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2081 sizeof(fapi_msg_header_t));
2082 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2083 msgHeader->num_msg = 2; /* Config req msg and vendor specific msg */
2084 msgHeader->handle = 0;
2086 DU_LOG("\nLWR_MAC: Sending Config Request to Phy");
2087 LwrMacSendToFapi(headerElem);
2091 } /* lwr_mac_handleConfigReqEvt */
2093 /*******************************************************************
2095 * @brief Processes config response from phy
2099 * Function : lwr_mac_procConfigRspEvt
2102 * Processes config response from phy
2104 * @params[in] FAPI message pointer
2105 * @return ROK - success
2108 * ****************************************************************/
2110 uint8_t lwr_mac_procConfigRspEvt(void *msg)
2113 fapi_config_resp_t *configRsp;
2114 configRsp = (fapi_config_resp_t *)msg;
2116 DU_LOG("\nLWR_MAC: Received EVENT[%d] at STATE[%d]", lwrMacCb.event, \
2119 if(configRsp != NULL)
2121 if(configRsp->error_code == MSG_OK)
2123 DU_LOG("\nLWR_MAC: PHY has moved to Configured state \n");
2124 lwrMacCb.phyState = PHY_STATE_CONFIGURED;
2125 lwrMacCb.cellCb[0].state = PHY_STATE_CONFIGURED;
2127 * Store config response into an intermediate struture and send to MAC
2128 * Support LC and LWLC for sending config rsp to MAC
2130 fapiMacConfigRsp(lwrMacCb.cellCb[0].cellId);
2134 DU_LOG("\n LWR_MAC: Invalid error code %d", configRsp->error_code);
2140 DU_LOG("\nLWR_MAC: Config Response received from PHY is NULL");
2146 } /* lwr_mac_procConfigRspEvt */
2148 /*******************************************************************
2150 * @brief Build and send start request to phy
2154 * Function : lwr_mac_procStartReqEvt
2157 * Build and send start request to phy
2159 * @params[in] FAPI message pointer
2160 * @return ROK - success
2163 * ****************************************************************/
2164 uint8_t lwr_mac_procStartReqEvt(void *msg)
2167 fapi_msg_header_t *msgHeader;
2168 fapi_start_req_t *startReq;
2169 fapi_vendor_msg_t *vendorMsg;
2170 p_fapi_api_queue_elem_t headerElem;
2171 p_fapi_api_queue_elem_t startReqElem;
2172 p_fapi_api_queue_elem_t vendorMsgElem;
2174 /* Allocte And fill Vendor msg */
2175 LWR_MAC_ALLOC(vendorMsgElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_vendor_msg_t)));
2178 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in start req");
2181 FILL_FAPI_LIST_ELEM(vendorMsgElem, NULLP, FAPI_VENDOR_MESSAGE, 1, sizeof(fapi_vendor_msg_t));
2182 vendorMsg = (fapi_vendor_msg_t *)(vendorMsgElem + 1);
2183 fillMsgHeader(&vendorMsg->header, FAPI_VENDOR_MESSAGE, sizeof(fapi_vendor_msg_t));
2184 vendorMsg->start_req_vendor.sfn = 0;
2185 vendorMsg->start_req_vendor.slot = 0;
2186 vendorMsg->start_req_vendor.mode = 1; /* for FDD */
2188 vendorMsg->start_req_vendor.count = 0;
2189 vendorMsg->start_req_vendor.period = 1;
2192 /* Fill FAPI config req */
2193 LWR_MAC_ALLOC(startReqElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_start_req_t)));
2196 DU_LOG("\nLWR_MAC: Memory allocation failed for start req");
2199 FILL_FAPI_LIST_ELEM(startReqElem, vendorMsgElem, FAPI_START_REQUEST, 1, \
2200 sizeof(fapi_start_req_t));
2202 startReq = (fapi_start_req_t *)(startReqElem + 1);
2203 memset(startReq, 0, sizeof(fapi_start_req_t));
2204 fillMsgHeader(&startReq->header, FAPI_START_REQUEST, sizeof(fapi_start_req_t));
2206 /* Fill message header */
2207 LWR_MAC_ALLOC(headerElem, (sizeof(fapi_api_queue_elem_t) + sizeof(fapi_msg_header_t)));
2210 DU_LOG("\nLWR_MAC: Memory allocation failed for vendor msg in config req");
2213 FILL_FAPI_LIST_ELEM(headerElem, startReqElem, FAPI_VENDOR_MSG_HEADER_IND, 1, \
2214 sizeof(fapi_msg_header_t));
2215 msgHeader = (fapi_msg_header_t *)(headerElem + 1);
2216 msgHeader->num_msg = 2; /* Start req msg and vendor specific msg */
2217 msgHeader->handle = 0;
2220 DU_LOG("\nLWR_MAC: Sending Start Request to Phy");
2221 LwrMacSendToFapi(headerElem);
2224 } /* lwr_mac_procStartReqEvt */
2226 /*******************************************************************
2228 * @brief Sends FAPI Stop Req to PHY
2232 * Function : lwr_mac_procStopReqEvt
2235 * -Sends FAPI Stop Req to PHY
2238 * @return ROK - success
2241 ********************************************************************/
2243 uint8_t lwr_mac_procStopReqEvt(void *msg)
2246 uint32_t msgLen = 0;
2247 fapi_stop_req_t *stopReq = NULLP;
2248 LWR_MAC_ALLOC(stopReq, sizeof(fapi_stop_req_t));
2249 if(stopReq != NULLP)
2251 memset(stopReq, 0, sizeof(fapi_stop_req_t));
2252 fillMsgHeader(&stopReq->header, FAPI_STOP_REQUEST, msgLen);
2253 DU_LOG("\nLOWER MAC: Sending Stop Request to PHY");
2254 LwrMacSendToPhy(stopReq->header.msg_id, sizeof(fapi_stop_req_t), (void *)stopReq);
2258 DU_LOG("\nLOWER MAC: Failed to allocate memory for Stop Request");
2266 /*******************************************************************
2268 * @brief fills SSB PDU required for DL TTI info in MAC
2272 * Function : fillSsbPdu
2275 * -Fills the SSB PDU info
2278 * @params[in] Pointer to FAPI DL TTI Req
2279 * Pointer to RgCellCb
2280 * Pointer to msgLen of DL TTI Info
2283 ******************************************************************/
2285 uint8_t fillSsbPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, MacCellCfg *macCellCfg,
2286 MacDlSlot *currDlSlot, uint8_t ssbIdxCount, uint16_t sfn)
2288 uint32_t mibPayload = 0;
2289 if(dlTtiReqPdu != NULL)
2291 dlTtiReqPdu->pduType = SSB_PDU_TYPE; /* SSB PDU */
2292 dlTtiReqPdu->pdu.ssb_pdu.physCellId = macCellCfg->phyCellId;
2293 dlTtiReqPdu->pdu.ssb_pdu.betaPss = macCellCfg->ssbCfg.betaPss;
2294 dlTtiReqPdu->pdu.ssb_pdu.ssbBlockIndex = currDlSlot->dlInfo.brdcstAlloc.ssbInfo[ssbIdxCount].ssbIdx;
2295 dlTtiReqPdu->pdu.ssb_pdu.ssbSubCarrierOffset = macCellCfg->ssbCfg.ssbScOffset;
2296 /* ssbOfPdufstA to be filled in ssbCfg */
2297 dlTtiReqPdu->pdu.ssb_pdu.ssbOffsetPointA = macCellCfg->ssbCfg.ssbOffsetPointA;
2298 dlTtiReqPdu->pdu.ssb_pdu.bchPayloadFlag = macCellCfg->ssbCfg.bchPayloadFlag;
2299 /* Bit manipulation for SFN */
2300 setMibPdu(macCellCfg->ssbCfg.mibPdu, &mibPayload, sfn);
2301 dlTtiReqPdu->pdu.ssb_pdu.bchPayload.bchPayload = mibPayload;
2302 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.numPrgs = 0;
2303 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.prgSize = 0;
2304 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.digBfInterfaces = 0;
2305 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming.pmi_bfi[0].pmIdx = 0;
2306 dlTtiReqPdu->pdu.ssb_pdu.preCodingAndBeamforming. \
2307 pmi_bfi[0].beamIdx[0].beamidx = macCellCfg->ssbCfg.beamId[0];
2308 dlTtiReqPdu->pduSize = sizeof(fapi_dl_ssb_pdu_t); /* Size of SSB PDU */
2315 /*******************************************************************
2317 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2321 * Function : fillSib1DlDciPdu
2324 * -Fills the Dl DCI PDU
2326 * @params[in] Pointer to fapi_dl_dci_t
2327 * Pointer to PdcchCfg
2330 ******************************************************************/
2332 void fillSib1DlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *sib1PdcchInfo)
2334 if(dlDciPtr != NULLP)
2340 uint16_t coreset0Size;
2343 uint32_t freqDomResAssign;
2344 uint32_t timeDomResAssign;
2346 uint32_t modNCodScheme;
2347 uint8_t redundancyVer;
2348 uint32_t sysInfoInd;
2351 /* Size(in bits) of each field in DCI format 0_1
2352 * as mentioned in spec 38.214 */
2353 uint8_t freqDomResAssignSize;
2354 uint8_t timeDomResAssignSize = 4;
2355 uint8_t VRB2PRBMapSize = 1;
2356 uint8_t modNCodSchemeSize = 5;
2357 uint8_t redundancyVerSize = 2;
2358 uint8_t sysInfoIndSize = 1;
2359 uint8_t reservedSize = 15;
2361 dlDciPtr->rnti = sib1PdcchInfo->dci.rnti;
2362 dlDciPtr->scramblingId = sib1PdcchInfo->dci.scramblingId;
2363 dlDciPtr->scramblingRnti = sib1PdcchInfo->dci.scramblingRnti;
2364 dlDciPtr->cceIndex = sib1PdcchInfo->dci.cceIndex;
2365 dlDciPtr->aggregationLevel = sib1PdcchInfo->dci.aggregLevel;
2366 dlDciPtr->pc_and_bform.numPrgs = sib1PdcchInfo->dci.beamPdcchInfo.numPrgs;
2367 dlDciPtr->pc_and_bform.prgSize = sib1PdcchInfo->dci.beamPdcchInfo.prgSize;
2368 dlDciPtr->pc_and_bform.digBfInterfaces = sib1PdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2369 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2370 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = sib1PdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2371 dlDciPtr->beta_pdcch_1_0 = sib1PdcchInfo->dci.txPdcchPower.powerValue;
2372 dlDciPtr->powerControlOffsetSS = sib1PdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2374 /* Calculating freq domain resource allocation field value and size
2375 * coreset0Size = Size of coreset 0
2376 * RBStart = Starting Virtual Rsource block
2377 * RBLen = length of contiguously allocted RBs
2378 * Spec 38.214 Sec 5.1.2.2.2
2380 coreset0Size= sib1PdcchInfo->coresetCfg.coreSetSize;
2381 rbStart = 0; /* For SIB1 */
2382 //rbStart = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2383 rbLen = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2385 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2387 if((rbLen - 1) <= floor(coreset0Size / 2))
2388 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2390 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2391 + (coreset0Size - 1 - rbStart);
2393 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2396 /* Fetching DCI field values */
2397 timeDomResAssign = sib1PdcchInfo->dci.pdschCfg->pdschTimeAlloc.
2399 VRB2PRBMap = sib1PdcchInfo->dci.pdschCfg->pdschFreqAlloc.\
2401 modNCodScheme = sib1PdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2402 redundancyVer = sib1PdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2403 sysInfoInd = 0; /* 0 for SIB1; 1 for SI messages */
2406 /* Reversing bits in each DCI field */
2407 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2408 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2409 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2410 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2411 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2412 sysInfoInd = reverseBits(sysInfoInd, sysInfoIndSize);
2414 /* Calulating total number of bytes in buffer */
2415 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2416 + VRB2PRBMapSize + modNCodSchemeSize + redundancyVerSize\
2417 + sysInfoIndSize + reservedSize;
2419 numBytes = dlDciPtr->payloadSizeBits / 8;
2420 if(dlDciPtr->payloadSizeBits % 8)
2423 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2425 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2429 /* Initialize buffer */
2430 for(bytePos = 0; bytePos < numBytes; bytePos++)
2431 dlDciPtr->payload[bytePos] = 0;
2433 bytePos = numBytes - 1;
2436 /* Packing DCI format fields */
2437 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2438 freqDomResAssign, freqDomResAssignSize);
2439 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2440 timeDomResAssign, timeDomResAssignSize);
2441 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2442 VRB2PRBMap, VRB2PRBMapSize);
2443 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2444 modNCodScheme, modNCodSchemeSize);
2445 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2446 redundancyVer, redundancyVerSize);
2447 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2448 sysInfoInd, sysInfoIndSize);
2449 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2450 reserved, reservedSize);
2453 } /* fillSib1DlDciPdu */
2455 /*******************************************************************
2457 * @brief fills Dl DCI PDU required for DL TTI info in MAC
2461 * Function : fillRarDlDciPdu
2464 * -Fills the Dl DCI PDU
2466 * @params[in] Pointer to fapi_dl_dci_t
2467 * Pointer to PdcchCfg
2470 ******************************************************************/
2472 void fillRarDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *rarPdcchInfo)
2474 if(dlDciPtr != NULLP)
2480 uint16_t coreset0Size;
2483 uint32_t freqDomResAssign;
2484 uint8_t timeDomResAssign;
2486 uint8_t modNCodScheme;
2490 /* Size(in bits) of each field in DCI format 1_0 */
2491 uint8_t freqDomResAssignSize;
2492 uint8_t timeDomResAssignSize = 4;
2493 uint8_t VRB2PRBMapSize = 1;
2494 uint8_t modNCodSchemeSize = 5;
2495 uint8_t tbScalingSize = 2;
2496 uint8_t reservedSize = 16;
2498 dlDciPtr->rnti = rarPdcchInfo->dci.rnti;
2499 dlDciPtr->scramblingId = rarPdcchInfo->dci.scramblingId;
2500 dlDciPtr->scramblingRnti = rarPdcchInfo->dci.scramblingRnti;
2501 dlDciPtr->cceIndex = rarPdcchInfo->dci.cceIndex;
2502 dlDciPtr->aggregationLevel = rarPdcchInfo->dci.aggregLevel;
2503 dlDciPtr->pc_and_bform.numPrgs = rarPdcchInfo->dci.beamPdcchInfo.numPrgs;
2504 dlDciPtr->pc_and_bform.prgSize = rarPdcchInfo->dci.beamPdcchInfo.prgSize;
2505 dlDciPtr->pc_and_bform.digBfInterfaces = rarPdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2506 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2507 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = rarPdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2508 dlDciPtr->beta_pdcch_1_0 = rarPdcchInfo->dci.txPdcchPower.powerValue;
2509 dlDciPtr->powerControlOffsetSS = rarPdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2511 /* Calculating freq domain resource allocation field value and size
2512 * coreset0Size = Size of coreset 0
2513 * RBStart = Starting Virtual Rsource block
2514 * RBLen = length of contiguously allocted RBs
2515 * Spec 38.214 Sec 5.1.2.2.2
2518 /* TODO: Fill values of coreset0Size, rbStart and rbLen */
2519 coreset0Size= rarPdcchInfo->coresetCfg.coreSetSize;
2520 rbStart = 0; /* For SIB1 */
2521 //rbStart = rarPdcchInfo->dci.pdschCfg->freqAlloc.rbStart;
2522 rbLen = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2524 if((rbLen >=1) && (rbLen <= coreset0Size - rbStart))
2526 if((rbLen - 1) <= floor(coreset0Size / 2))
2527 freqDomResAssign = (coreset0Size * (rbLen-1)) + rbStart;
2529 freqDomResAssign = (coreset0Size * (coreset0Size - rbLen + 1)) \
2530 + (coreset0Size - 1 - rbStart);
2532 freqDomResAssignSize = ceil(log2(coreset0Size * (coreset0Size + 1) / 2));
2535 /* Fetching DCI field values */
2536 timeDomResAssign = rarPdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2537 VRB2PRBMap = rarPdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2538 modNCodScheme = rarPdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2539 tbScaling = 0; /* configured to 0 scaling */
2542 /* Reversing bits in each DCI field */
2543 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2544 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2545 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2546 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2547 tbScaling = reverseBits(tbScaling, tbScalingSize);
2549 /* Calulating total number of bytes in buffer */
2550 dlDciPtr->payloadSizeBits = freqDomResAssignSize + timeDomResAssignSize\
2551 + VRB2PRBMapSize + modNCodSchemeSize + tbScalingSize + reservedSize;
2553 numBytes = dlDciPtr->payloadSizeBits / 8;
2554 if(dlDciPtr->payloadSizeBits % 8)
2557 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2559 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2563 /* Initialize buffer */
2564 for(bytePos = 0; bytePos < numBytes; bytePos++)
2565 dlDciPtr->payload[bytePos] = 0;
2567 bytePos = numBytes - 1;
2570 /* Packing DCI format fields */
2571 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2572 freqDomResAssign, freqDomResAssignSize);
2573 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2574 timeDomResAssign, timeDomResAssignSize);
2575 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2576 VRB2PRBMap, VRB2PRBMapSize);
2577 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2578 modNCodScheme, modNCodSchemeSize);
2579 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2580 tbScaling, tbScalingSize);
2581 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2582 reserved, reservedSize);
2584 } /* fillRarDlDciPdu */
2586 /*******************************************************************
2588 * @brief fills DL DCI PDU required for DL TTI info in MAC
2592 * Function : fillDlMsgDlDciPdu
2595 * -Fills the Dl DCI PDU
2597 * @params[in] Pointer to fapi_dl_dci_t
2598 * Pointer to PdcchCfg
2601 ******************************************************************/
2602 void fillDlMsgDlDciPdu(fapi_dl_dci_t *dlDciPtr, PdcchCfg *pdcchInfo,\
2603 DlMsgInfo *dlMsgInfo)
2605 if(dlDciPtr != NULLP)
2611 uint16_t coresetSize = 0;
2612 uint16_t rbStart = 0;
2614 uint8_t dciFormatId;
2615 uint32_t freqDomResAssign;
2616 uint8_t timeDomResAssign;
2618 uint8_t modNCodScheme;
2620 uint8_t redundancyVer = 0;
2621 uint8_t harqProcessNum = 0;
2622 uint8_t dlAssignmentIdx = 0;
2623 uint8_t pucchTpc = 0;
2624 uint8_t pucchResoInd = 0;
2625 uint8_t harqFeedbackInd = 0;
2627 /* Size(in bits) of each field in DCI format 1_0 */
2628 uint8_t dciFormatIdSize = 1;
2629 uint8_t freqDomResAssignSize = 0;
2630 uint8_t timeDomResAssignSize = 4;
2631 uint8_t VRB2PRBMapSize = 1;
2632 uint8_t modNCodSchemeSize = 5;
2633 uint8_t ndiSize = 1;
2634 uint8_t redundancyVerSize = 2;
2635 uint8_t harqProcessNumSize = 4;
2636 uint8_t dlAssignmentIdxSize = 2;
2637 uint8_t pucchTpcSize = 2;
2638 uint8_t pucchResoIndSize = 3;
2639 uint8_t harqFeedbackIndSize = 3;
2641 dlDciPtr->rnti = pdcchInfo->dci.rnti;
2642 dlDciPtr->scramblingId = pdcchInfo->dci.scramblingId;
2643 dlDciPtr->scramblingRnti = pdcchInfo->dci.scramblingRnti;
2644 dlDciPtr->cceIndex = pdcchInfo->dci.cceIndex;
2645 dlDciPtr->aggregationLevel = pdcchInfo->dci.aggregLevel;
2646 dlDciPtr->pc_and_bform.numPrgs = pdcchInfo->dci.beamPdcchInfo.numPrgs;
2647 dlDciPtr->pc_and_bform.prgSize = pdcchInfo->dci.beamPdcchInfo.prgSize;
2648 dlDciPtr->pc_and_bform.digBfInterfaces = pdcchInfo->dci.beamPdcchInfo.digBfInterfaces;
2649 dlDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = pdcchInfo->dci.beamPdcchInfo.prg[0].pmIdx;
2650 dlDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = pdcchInfo->dci.beamPdcchInfo.prg[0].beamIdx[0];
2651 dlDciPtr->beta_pdcch_1_0 = pdcchInfo->dci.txPdcchPower.powerValue;
2652 dlDciPtr->powerControlOffsetSS = pdcchInfo->dci.txPdcchPower.powerControlOffsetSS;
2654 /* Calculating freq domain resource allocation field value and size
2655 * coreset0Size = Size of coreset 0
2656 * RBStart = Starting Virtual Rsource block
2657 * RBLen = length of contiguously allocted RBs
2658 * Spec 38.214 Sec 5.1.2.2.2
2660 coresetSize = pdcchInfo->coresetCfg.coreSetSize;
2661 rbStart = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.startPrb;
2662 rbLen = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.freqAlloc.numPrb;
2664 if((rbLen >=1) && (rbLen <= coresetSize - rbStart))
2666 if((rbLen - 1) <= floor(coresetSize / 2))
2667 freqDomResAssign = (coresetSize * (rbLen-1)) + rbStart;
2669 freqDomResAssign = (coresetSize * (coresetSize - rbLen + 1)) \
2670 + (coresetSize - 1 - rbStart);
2672 freqDomResAssignSize = ceil(log2(coresetSize * (coresetSize + 1) / 2));
2675 /* Fetching DCI field values */
2676 dciFormatId = dlMsgInfo->dciFormatId; /* Always set to 1 for DL */
2677 timeDomResAssign = pdcchInfo->dci.pdschCfg->pdschTimeAlloc.rowIndex -1;
2678 VRB2PRBMap = pdcchInfo->dci.pdschCfg->pdschFreqAlloc.vrbPrbMapping;
2679 modNCodScheme = pdcchInfo->dci.pdschCfg->codeword[0].mcsIndex;
2680 ndi = dlMsgInfo->ndi;
2681 redundancyVer = pdcchInfo->dci.pdschCfg->codeword[0].rvIndex;
2682 harqProcessNum = dlMsgInfo->harqProcNum;
2683 dlAssignmentIdx = dlMsgInfo->dlAssignIdx;
2684 pucchTpc = dlMsgInfo->pucchTpc;
2685 pucchResoInd = dlMsgInfo->pucchResInd;
2686 harqFeedbackInd = dlMsgInfo->harqFeedbackInd;
2688 /* Reversing bits in each DCI field */
2689 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
2690 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
2691 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
2692 VRB2PRBMap = reverseBits(VRB2PRBMap, VRB2PRBMapSize);
2693 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
2694 ndi = reverseBits(ndi, ndiSize);
2695 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
2696 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
2697 dlAssignmentIdx = reverseBits(dlAssignmentIdx , dlAssignmentIdxSize);
2698 pucchTpc = reverseBits(pucchTpc, pucchTpcSize);
2699 pucchResoInd = reverseBits(pucchResoInd, pucchResoIndSize);
2700 harqFeedbackInd = reverseBits(harqFeedbackInd, harqFeedbackIndSize);
2703 /* Calulating total number of bytes in buffer */
2704 dlDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
2705 + timeDomResAssignSize + VRB2PRBMapSize + modNCodSchemeSize\
2706 + ndiSize + redundancyVerSize + harqProcessNumSize + dlAssignmentIdxSize\
2707 + pucchTpcSize + pucchResoIndSize + harqFeedbackIndSize);
2709 numBytes = dlDciPtr->payloadSizeBits / 8;
2710 if(dlDciPtr->payloadSizeBits % 8)
2713 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
2715 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
2719 /* Initialize buffer */
2720 for(bytePos = 0; bytePos < numBytes; bytePos++)
2721 dlDciPtr->payload[bytePos] = 0;
2723 bytePos = numBytes - 1;
2726 /* Packing DCI format fields */
2727 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2728 dciFormatId, dciFormatIdSize);
2729 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2730 freqDomResAssign, freqDomResAssignSize);
2731 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2732 timeDomResAssign, timeDomResAssignSize);
2733 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2734 VRB2PRBMap, VRB2PRBMapSize);
2735 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2736 modNCodScheme, modNCodSchemeSize);
2737 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2739 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2740 redundancyVer, redundancyVerSize);
2741 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2742 redundancyVer, redundancyVerSize);
2743 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2744 harqProcessNum, harqProcessNumSize);
2745 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2746 dlAssignmentIdx, dlAssignmentIdxSize);
2747 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2748 pucchTpc, pucchTpcSize);
2749 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2750 pucchResoInd, pucchResoIndSize);
2751 fillDlDciPayload(dlDciPtr->payload, &bytePos, &bitPos,\
2752 harqFeedbackInd, harqFeedbackIndSize);
2756 /*******************************************************************
2758 * @brief fills PDCCH PDU required for DL TTI info in MAC
2762 * Function : fillPdcchPdu
2765 * -Fills the Pdcch PDU info
2768 * @params[in] Pointer to FAPI DL TTI Req
2769 * Pointer to PdcchCfg
2772 ******************************************************************/
2773 uint8_t fillPdcchPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, DlSchedInfo *dlInfo, \
2774 RntiType rntiType, uint8_t coreSetType)
2776 if(dlTtiReqPdu != NULLP)
2778 PdcchCfg *pdcchInfo = NULLP;
2779 BwpCfg *bwp = NULLP;
2781 memset(&dlTtiReqPdu->pdu.pdcch_pdu, 0, sizeof(fapi_dl_pdcch_pdu_t));
2782 if(rntiType == SI_RNTI_TYPE)
2784 pdcchInfo = &dlInfo->brdcstAlloc.sib1Alloc.sib1PdcchCfg;
2785 bwp = &dlInfo->brdcstAlloc.sib1Alloc.bwp;
2786 fillSib1DlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2788 else if(rntiType == RA_RNTI_TYPE)
2790 pdcchInfo = &dlInfo->rarAlloc->rarPdcchCfg;
2791 bwp = &dlInfo->rarAlloc->bwp;
2792 fillRarDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo);
2794 else if(rntiType == TC_RNTI_TYPE || rntiType == C_RNTI_TYPE)
2796 pdcchInfo = &dlInfo->dlMsgAlloc->dlMsgPdcchCfg;
2797 bwp = &dlInfo->dlMsgAlloc->bwp;
2798 fillDlMsgDlDciPdu(dlTtiReqPdu->pdu.pdcch_pdu.dlDci, pdcchInfo,\
2799 &dlInfo->dlMsgAlloc->dlMsgInfo);
2803 DU_LOG("\nLWR_MAC: Failed filling PDCCH Pdu");
2806 dlTtiReqPdu->pduType = PDCCH_PDU_TYPE;
2807 dlTtiReqPdu->pdu.pdcch_pdu.bwpSize = bwp->freqAlloc.numPrb;
2808 dlTtiReqPdu->pdu.pdcch_pdu.bwpStart = bwp->freqAlloc.startPrb;
2809 dlTtiReqPdu->pdu.pdcch_pdu.subCarrierSpacing = bwp->subcarrierSpacing;
2810 dlTtiReqPdu->pdu.pdcch_pdu.cyclicPrefix = bwp->cyclicPrefix;
2811 dlTtiReqPdu->pdu.pdcch_pdu.startSymbolIndex = pdcchInfo->coresetCfg.startSymbolIndex;
2812 dlTtiReqPdu->pdu.pdcch_pdu.durationSymbols = pdcchInfo->coresetCfg.durationSymbols;
2813 memcpy(dlTtiReqPdu->pdu.pdcch_pdu.freqDomainResource, pdcchInfo->coresetCfg.freqDomainResource, 6);
2814 dlTtiReqPdu->pdu.pdcch_pdu.cceRegMappingType = pdcchInfo->coresetCfg.cceRegMappingType;
2815 dlTtiReqPdu->pdu.pdcch_pdu.regBundleSize = pdcchInfo->coresetCfg.regBundleSize;
2816 dlTtiReqPdu->pdu.pdcch_pdu.interleaverSize = pdcchInfo->coresetCfg.interleaverSize;
2817 dlTtiReqPdu->pdu.pdcch_pdu.shiftIndex = pdcchInfo->coresetCfg.shiftIndex;
2818 dlTtiReqPdu->pdu.pdcch_pdu.precoderGranularity = pdcchInfo->coresetCfg.precoderGranularity;
2819 dlTtiReqPdu->pdu.pdcch_pdu.numDlDci = pdcchInfo->numDlDci;
2820 dlTtiReqPdu->pdu.pdcch_pdu.coreSetType = coreSetType;
2822 /* Calculating PDU length. Considering only one dl dci pdu for now */
2823 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
2829 /*******************************************************************
2831 * @brief fills PDSCH PDU required for DL TTI info in MAC
2835 * Function : fillPdschPdu
2838 * -Fills the Pdsch PDU info
2841 * @params[in] Pointer to FAPI DL TTI Req
2842 * Pointer to PdschCfg
2843 * Pointer to msgLen of DL TTI Info
2846 ******************************************************************/
2848 void fillPdschPdu(fapi_dl_tti_req_pdu_t *dlTtiReqPdu, PdschCfg *pdschInfo,
2849 BwpCfg bwp, uint16_t pduIndex)
2853 if(dlTtiReqPdu != NULLP)
2855 dlTtiReqPdu->pduType = PDSCH_PDU_TYPE;
2856 memset(&dlTtiReqPdu->pdu.pdsch_pdu, 0, sizeof(fapi_dl_pdsch_pdu_t));
2857 dlTtiReqPdu->pdu.pdsch_pdu.pduBitMap = pdschInfo->pduBitmap;
2858 dlTtiReqPdu->pdu.pdsch_pdu.rnti = pdschInfo->rnti;
2859 dlTtiReqPdu->pdu.pdsch_pdu.pdu_index = pduIndex;
2860 dlTtiReqPdu->pdu.pdsch_pdu.bwpSize = bwp.freqAlloc.numPrb;
2861 dlTtiReqPdu->pdu.pdsch_pdu.bwpStart = bwp.freqAlloc.startPrb;
2862 dlTtiReqPdu->pdu.pdsch_pdu.subCarrierSpacing = bwp.subcarrierSpacing;
2863 dlTtiReqPdu->pdu.pdsch_pdu.cyclicPrefix = bwp.cyclicPrefix;
2864 dlTtiReqPdu->pdu.pdsch_pdu.nrOfCodeWords = pdschInfo->numCodewords;
2865 for(idx = 0; idx < MAX_CODEWORDS ; idx++)
2867 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].targetCodeRate = pdschInfo->codeword[idx].targetCodeRate;
2868 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].qamModOrder = pdschInfo->codeword[idx].qamModOrder;
2869 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsIndex = pdschInfo->codeword[idx].mcsIndex;
2870 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].mcsTable = pdschInfo->codeword[idx].mcsTable;
2871 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].rvIndex = pdschInfo->codeword[idx].rvIndex;
2872 dlTtiReqPdu->pdu.pdsch_pdu.cwInfo[idx].tbSize = pdschInfo->codeword[idx].tbSize;
2874 dlTtiReqPdu->pdu.pdsch_pdu.dataScramblingId = pdschInfo->dataScramblingId;
2875 dlTtiReqPdu->pdu.pdsch_pdu.nrOfLayers = pdschInfo->numLayers;
2876 dlTtiReqPdu->pdu.pdsch_pdu.transmissionScheme = pdschInfo->transmissionScheme;
2877 dlTtiReqPdu->pdu.pdsch_pdu.refPoint = pdschInfo->refPoint;
2878 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsSymbPos = pdschInfo->dmrs.dlDmrsSymbPos;
2879 dlTtiReqPdu->pdu.pdsch_pdu.dmrsConfigType = pdschInfo->dmrs.dmrsConfigType;
2880 dlTtiReqPdu->pdu.pdsch_pdu.dlDmrsScramblingId = pdschInfo->dmrs.dlDmrsScramblingId;
2881 dlTtiReqPdu->pdu.pdsch_pdu.scid = pdschInfo->dmrs.scid;
2882 dlTtiReqPdu->pdu.pdsch_pdu.numDmrsCdmGrpsNoData = pdschInfo->dmrs.numDmrsCdmGrpsNoData;
2883 dlTtiReqPdu->pdu.pdsch_pdu.dmrsPorts = pdschInfo->dmrs.dmrsPorts;
2884 dlTtiReqPdu->pdu.pdsch_pdu.resourceAlloc = pdschInfo->pdschFreqAlloc.resourceAllocType;
2885 /* since we are using type-1, hence rbBitmap excluded */
2886 dlTtiReqPdu->pdu.pdsch_pdu.rbStart = pdschInfo->pdschFreqAlloc.freqAlloc.startPrb;
2887 dlTtiReqPdu->pdu.pdsch_pdu.rbSize = pdschInfo->pdschFreqAlloc.freqAlloc.numPrb;
2888 dlTtiReqPdu->pdu.pdsch_pdu.vrbToPrbMapping = pdschInfo->pdschFreqAlloc.vrbPrbMapping;
2889 dlTtiReqPdu->pdu.pdsch_pdu.startSymbIndex = pdschInfo->pdschTimeAlloc.timeAlloc.startSymb;
2890 dlTtiReqPdu->pdu.pdsch_pdu.nrOfSymbols = pdschInfo->pdschTimeAlloc.timeAlloc.numSymb;
2891 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.numPrgs = pdschInfo->beamPdschInfo.numPrgs;
2892 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.prgSize = pdschInfo->beamPdschInfo.prgSize;
2893 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.digBfInterfaces = pdschInfo->beamPdschInfo.digBfInterfaces;
2894 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
2895 pmIdx = pdschInfo->beamPdschInfo.prg[0].pmIdx;
2896 dlTtiReqPdu->pdu.pdsch_pdu.preCodingAndBeamforming.pmi_bfi[0]. \
2897 beamIdx[0].beamidx = pdschInfo->beamPdschInfo.prg[0].beamIdx[0];
2898 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffset = pdschInfo->txPdschPower.powerControlOffset;
2899 dlTtiReqPdu->pdu.pdsch_pdu.powerControlOffsetSS = pdschInfo->txPdschPower.powerControlOffsetSS;
2900 dlTtiReqPdu->pdu.pdsch_pdu.mappingType = pdschInfo->dmrs.mappingType;
2901 dlTtiReqPdu->pdu.pdsch_pdu.nrOfDmrsSymbols = pdschInfo->dmrs.nrOfDmrsSymbols;
2902 dlTtiReqPdu->pdu.pdsch_pdu.dmrsAddPos = pdschInfo->dmrs.dmrsAddPos;
2904 dlTtiReqPdu->pduSize = sizeof(fapi_dl_pdsch_pdu_t);
2908 /***********************************************************************
2910 * @brief calculates the total size to be allocated for DL TTI Req
2914 * Function : calcDlTtiReqPduCount
2917 * -calculates the total pdu count to be allocated for DL TTI Req
2919 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
2922 * ********************************************************************/
2923 uint8_t calcDlTtiReqPduCount(DlSchedInfo *dlInfo)
2928 if(dlInfo->isBroadcastPres)
2930 if(dlInfo->brdcstAlloc.ssbTrans)
2932 for(idx = 0; idx < dlInfo->brdcstAlloc.ssbIdxSupported; idx++)
2934 /* SSB PDU is filled */
2938 if(dlInfo->brdcstAlloc.sib1Trans)
2940 /* PDCCH and PDSCH PDU is filled */
2944 if(dlInfo->rarAlloc != NULLP)
2946 /* PDCCH and PDSCH PDU is filled */
2949 if(dlInfo->dlMsgAlloc != NULLP)
2951 /* PDCCH and PDSCH PDU is filled */
2957 /***********************************************************************
2959 * @brief calculates the total size to be allocated for DL TTI Req
2963 * Function : calcTxDataReqPduCount
2966 * -calculates the total pdu count to be allocated for DL TTI Req
2968 * @params[in] DlBrdcstAlloc *cellBroadcastInfo
2971 * ********************************************************************/
2972 uint8_t calcTxDataReqPduCount(DlSchedInfo *dlInfo)
2976 if(dlInfo->isBroadcastPres && dlInfo->brdcstAlloc.sib1Trans)
2980 if(dlInfo->rarAlloc != NULLP)
2984 if(dlInfo->dlMsgAlloc != NULLP)
2990 /***********************************************************************
2992 * @brief fills the SIB1 TX-DATA request message
2996 * Function : fillSib1TxDataReq
2999 * - fills the SIB1 TX-DATA request message
3001 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3002 * @params[in] macCellCfg consist of SIB1 pdu
3003 * @params[in] uint32_t *msgLen
3004 * @params[in] uint16_t pduIndex
3007 * ********************************************************************/
3008 uint8_t fillSib1TxDataReq(fapi_tx_pdu_desc_t *pduDesc,MacCellCfg *macCellCfg,
3011 uint32_t pduLen = 0;
3012 uint8_t *sib1TxdataValue = NULLP;
3014 pduDesc[pduIndex].pdu_index = pduIndex;
3015 pduDesc[pduIndex].num_tlvs = 1;
3018 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3019 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3020 pduDesc[pduIndex].tlvs[0].tl.length = macCellCfg->sib1Cfg.sib1PduLen;
3021 LWR_MAC_ALLOC(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
3022 if(sib1TxdataValue == NULLP)
3026 memcpy(sib1TxdataValue,macCellCfg->sib1Cfg.sib1Pdu,
3027 macCellCfg->sib1Cfg.sib1PduLen);
3028 pduDesc[pduIndex].tlvs[0].value = sib1TxdataValue;
3030 /* The total length of the PDU description and PDU data */
3031 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3032 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3033 pduDesc[pduIndex].pdu_length = pduLen;
3035 #ifndef INTEL_WLS_MEM
3036 MAC_FREE(sib1TxdataValue,macCellCfg->sib1Cfg.sib1PduLen);
3042 /***********************************************************************
3044 * @brief fills the RAR TX-DATA request message
3048 * Function : fillRarTxDataReq
3051 * - fills the RAR TX-DATA request message
3053 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3054 * @params[in] RarInfo *rarInfo
3055 * @params[in] uint32_t *msgLen
3056 * @params[in] uint16_t pduIndex
3059 * ********************************************************************/
3060 uint8_t fillRarTxDataReq(fapi_tx_pdu_desc_t *pduDesc, RarInfo *rarInfo,
3063 uint32_t pduLen = 0;
3064 uint8_t *rarTxdataValue = NULLP;
3066 pduDesc[pduIndex].pdu_index = pduIndex;
3067 pduDesc[pduIndex].num_tlvs = 1;
3070 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3071 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3072 pduDesc[pduIndex].tlvs[0].tl.length = rarInfo->rarPduLen;
3073 LWR_MAC_ALLOC(rarTxdataValue,rarInfo->rarPduLen);
3074 if(rarTxdataValue == NULLP)
3078 memcpy(rarTxdataValue,rarInfo->rarPdu,rarInfo->rarPduLen);
3079 pduDesc[pduIndex].tlvs[0].value = rarTxdataValue;
3081 /* The total length of the PDU description and PDU data */
3082 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3083 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3084 pduDesc[pduIndex].pdu_length = pduLen;
3086 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3087 * But since we did not implement WLS, this has to be done here
3089 #ifndef INTEL_WLS_MEM
3090 MAC_FREE(rarTxdataValue,rarInfo->rarPduLen);
3096 /***********************************************************************
3098 * @brief fills the DL dedicated Msg TX-DATA request message
3102 * Function : fillDlMsgTxDataReq
3105 * - fills the Dl Dedicated Msg TX-DATA request message
3107 * @params[in] fapi_tx_pdu_desc_t *pduDesc
3108 * @params[in] DlMsgInfo *dlMsgInfo
3109 * @params[in] uint32_t *msgLen
3110 * @params[in] uint16_t pduIndex
3113 * ********************************************************************/
3114 uint8_t fillDlMsgTxDataReq(fapi_tx_pdu_desc_t *pduDesc, DlMsgInfo *dlMsgInfo,
3117 uint32_t pduLen = 0;
3118 uint8_t *dedMsgTxDataValue = NULLP;
3120 pduDesc[pduIndex].pdu_index = pduIndex;
3121 pduDesc[pduIndex].num_tlvs = 1;
3124 /* as of now, memory is allocated from SSI, later WLS memory needs to be taken */
3125 pduDesc[pduIndex].tlvs[0].tl.tag = 1; /* pointer to be sent */
3126 pduDesc[pduIndex].tlvs[0].tl.length = dlMsgInfo->dlMsgPduLen;
3127 LWR_MAC_ALLOC(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3128 if(dedMsgTxDataValue == NULLP)
3132 memcpy(dedMsgTxDataValue, dlMsgInfo->dlMsgPdu, dlMsgInfo->dlMsgPduLen);
3133 pduDesc[pduIndex].tlvs[0].value = dedMsgTxDataValue;
3135 /* The total length of the PDU description and PDU data */
3136 pduLen += 8; /* size of PDU length 2 bytes, PDU index 2 bytes, numTLV 4 bytes */
3137 pduLen += sizeof(fapi_uint8_ptr_tlv_t); /* only 1 TLV is present */
3138 pduDesc[pduIndex].pdu_length = pduLen;
3140 /* TODO: The pointer value which was stored, needs to be free-ed at PHY *
3141 * But since we did not implement WLS, this has to be done here
3143 #ifndef INTEL_WLS_MEM
3144 MAC_FREE(dedMsgTxDataValue, dlMsgInfo->dlMsgPduLen);
3152 /*******************************************************************
3154 * @brief Sends DL TTI Request to PHY
3158 * Function : fillDlTtiReq
3161 * -Sends FAPI DL TTI req to PHY
3163 * @params[in] timing info
3164 * @return ROK - success
3167 * ****************************************************************/
3168 uint16_t fillDlTtiReq(SlotIndInfo currTimingInfo)
3173 uint8_t numPduEncoded = 0;
3175 uint16_t pduIndex = 0;
3176 uint32_t msgLen = 0;
3178 fapi_dl_tti_req_t *dlTtiReq = NULLP;
3179 SlotIndInfo dlTtiReqTimingInfo;
3181 MacDlSlot *currDlSlot = NULLP;
3182 MacCellCfg macCellCfg;
3183 memset(&macCellCfg, 0, sizeof(MacCellCfg));
3186 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3188 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3189 /* consider phy delay */
3190 ADD_DELTA_TO_TIME(currTimingInfo,dlTtiReqTimingInfo,PHY_DELTA);
3192 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3194 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[dlTtiReqTimingInfo.slot];
3195 nPdu = calcDlTtiReqPduCount(&currDlSlot->dlInfo);
3196 LWR_MAC_ALLOC(dlTtiReq, sizeof(fapi_dl_tti_req_t));
3197 if(dlTtiReq != NULLP)
3199 memset(dlTtiReq, 0, sizeof(fapi_dl_tti_req_t));
3200 dlTtiReq->sfn = dlTtiReqTimingInfo.sfn;
3201 dlTtiReq->slot = dlTtiReqTimingInfo.slot;
3202 dlTtiReq->nPdus = calcDlTtiReqPduCount(&currDlSlot->dlInfo); /* get total Pdus */
3203 nPdu = dlTtiReq->nPdus;
3204 dlTtiReq->nGroup = 0;
3206 if(dlTtiReq->nPdus > 0)
3208 if(currDlSlot->dlInfo.isBroadcastPres)
3210 if(currDlSlot->dlInfo.brdcstAlloc.ssbTrans)
3212 if(dlTtiReq->pdus != NULLP)
3214 for(idx = 0; idx < currDlSlot->dlInfo.brdcstAlloc.ssbIdxSupported; idx++)
3216 fillSsbPdu(&dlTtiReq->pdus[numPduEncoded], &macCellCfg,\
3217 currDlSlot, idx, dlTtiReq->sfn);
3221 printf("\033[1;31m");
3222 DU_LOG("\nLWR_MAC: MIB sent..");
3225 if(currDlSlot->dlInfo.brdcstAlloc.sib1Trans)
3227 /* Filling SIB1 param */
3228 if(numPduEncoded != nPdu)
3230 rntiType = SI_RNTI_TYPE;
3231 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded],&currDlSlot->dlInfo,\
3232 rntiType, CORESET_TYPE0);
3234 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3235 &currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.sib1PdschCfg,
3236 currDlSlot->dlInfo.brdcstAlloc.sib1Alloc.bwp,
3241 printf("\033[1;34m");
3242 DU_LOG("\nLWR_MAC: SIB1 sent...");
3246 if(currDlSlot->dlInfo.rarAlloc != NULLP)
3248 /* Filling RAR param */
3249 rntiType = RA_RNTI_TYPE;
3250 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3251 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3253 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3254 &currDlSlot->dlInfo.rarAlloc->rarPdschCfg,
3255 currDlSlot->dlInfo.rarAlloc->bwp,
3260 printf("\033[1;32m");
3261 DU_LOG("\nLWR_MAC: RAR sent...");
3264 if(currDlSlot->dlInfo.dlMsgAlloc != NULLP)
3266 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.dlMsgPdu != NULLP)
3268 /* Filling Msg4 param */
3269 printf("\033[1;32m");
3270 if(currDlSlot->dlInfo.dlMsgAlloc->dlMsgInfo.isMsg4Pdu)
3272 rntiType = TC_RNTI_TYPE;
3273 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3274 &currDlSlot->dlInfo, rntiType, CORESET_TYPE0);
3275 DU_LOG("\nLWR_MAC: MSG4 sent...");
3279 /* Filling other DL msg params */
3280 rntiType = C_RNTI_TYPE;
3281 fillPdcchPdu(&dlTtiReq->pdus[numPduEncoded], \
3282 &currDlSlot->dlInfo, rntiType, CORESET_TYPE1);
3283 DU_LOG("\nLWR_MAC: DL MSG sent...");
3288 fillPdschPdu(&dlTtiReq->pdus[numPduEncoded],
3289 &currDlSlot->dlInfo.dlMsgAlloc->dlMsgPdschCfg,
3290 currDlSlot->dlInfo.dlMsgAlloc->bwp,
3297 MAC_FREE(currDlSlot->dlInfo.dlMsgAlloc, sizeof(DlMsgAlloc));
3298 currDlSlot->dlInfo.dlMsgAlloc = NULLP;
3302 msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
3303 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
3304 #ifdef ODU_SLOT_IND_DEBUG_LOG
3305 DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3307 LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), \
3310 /* send Tx-DATA req message */
3311 sendTxDataReq(currTimingInfo, &currDlSlot->dlInfo);
3315 msgLen = sizeof(fapi_dl_tti_req_t) - sizeof(fapi_msg_t);
3316 fillMsgHeader(&dlTtiReq->header, FAPI_DL_TTI_REQUEST, msgLen);
3317 #ifdef ODU_SLOT_IND_DEBUG_LOG
3318 DU_LOG("\nLWR_MAC: Sending DL TTI Request");
3320 LwrMacSendToPhy(dlTtiReq->header.msg_id, sizeof(fapi_dl_tti_req_t), (void *)dlTtiReq);
3322 memset(currDlSlot, 0, sizeof(MacDlSlot));
3327 DU_LOG("\nLWR_MAC: Failed to allocate memory for DL TTI Request");
3328 memset(currDlSlot, 0, sizeof(MacDlSlot));
3334 lwr_mac_procInvalidEvt(&currTimingInfo);
3341 /*******************************************************************
3343 * @brief Sends TX data Request to PHY
3347 * Function : sendTxDataReq
3350 * -Sends FAPI TX data req to PHY
3352 * @params[in] timing info
3353 * @return ROK - success
3356 * ****************************************************************/
3357 uint16_t sendTxDataReq(SlotIndInfo currTimingInfo, DlSchedInfo *dlInfo)
3362 uint32_t msgLen = 0;
3363 uint16_t pduIndex = 0;
3364 uint32_t txDataReqMsgSize = 0;
3365 fapi_tx_data_req_t *txDataReq = NULLP;
3367 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3369 /* send TX_Data request message */
3370 nPdu = calcTxDataReqPduCount(dlInfo);
3373 txDataReqMsgSize = sizeof(fapi_tx_data_req_t);
3374 if(dlInfo->brdcstAlloc.sib1Trans)
3376 txDataReqMsgSize += macCb.macCell[cellIdx]->macCellCfg.sib1Cfg.sib1PduLen;
3378 if(dlInfo->rarAlloc != NULLP)
3380 txDataReqMsgSize += dlInfo->rarAlloc->rarInfo.rarPduLen;
3382 if(dlInfo->dlMsgAlloc != NULLP)
3384 txDataReqMsgSize += dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen;
3387 LWR_MAC_ALLOC(txDataReq, txDataReqMsgSize);
3388 if(txDataReq == NULLP)
3390 DU_LOG("\nLWR_MAC: Failed to allocate memory for TX data Request");
3394 memset(txDataReq, 0, txDataReqMsgSize);
3395 txDataReq->sfn = currTimingInfo.sfn;
3396 txDataReq->slot = currTimingInfo.slot;
3397 if(dlInfo->brdcstAlloc.sib1Trans)
3399 fillSib1TxDataReq(txDataReq->pdu_desc,
3400 &macCb.macCell[cellIdx]->macCellCfg, pduIndex);
3402 txDataReq->num_pdus++;
3404 if(dlInfo->rarAlloc != NULLP)
3406 fillRarTxDataReq(txDataReq->pdu_desc, &dlInfo->rarAlloc->rarInfo, pduIndex);
3408 txDataReq->num_pdus++;
3410 MAC_FREE(dlInfo->rarAlloc,sizeof(RarAlloc));
3411 dlInfo->rarAlloc = NULLP;
3413 if(dlInfo->dlMsgAlloc != NULLP)
3415 fillDlMsgTxDataReq(txDataReq->pdu_desc, \
3416 &dlInfo->dlMsgAlloc->dlMsgInfo, pduIndex);
3418 txDataReq->num_pdus++;
3420 MAC_FREE(dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu,\
3421 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPduLen);
3422 dlInfo->dlMsgAlloc->dlMsgInfo.dlMsgPdu = NULLP;
3423 MAC_FREE(dlInfo->dlMsgAlloc, sizeof(DlMsgAlloc));
3424 dlInfo->dlMsgAlloc = NULLP;
3427 msgLen = txDataReqMsgSize - sizeof(fapi_msg_t);
3428 fillMsgHeader(&txDataReq->header, FAPI_TX_DATA_REQUEST, msgLen);
3429 DU_LOG("\nLWR_MAC: Sending TX DATA Request");
3430 LwrMacSendToPhy(txDataReq->header.msg_id, txDataReqMsgSize, \
3437 /***********************************************************************
3439 * @brief calculates the total size to be allocated for UL TTI Req
3443 * Function : getnPdus
3446 * -calculates the total pdu count to be allocated for UL TTI Req
3448 * @params[in] Pointer to fapi Ul TTI Req
3449 * Pointer to CurrUlSlot
3451 * ********************************************************************/
3453 uint8_t getnPdus(fapi_ul_tti_req_t *ulTtiReq, MacUlSlot *currUlSlot)
3455 uint8_t pduCount = 0;
3457 if(ulTtiReq && currUlSlot)
3459 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3462 ulTtiReq->rachPresent++;
3464 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3469 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH_UCI)
3474 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3479 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_SRS)
3488 /***********************************************************************
3490 * @brief Set the value of zero correlation config in PRACH PDU
3494 * Function : setNumCs
3497 * -Set the value of zero correlation config in PRACH PDU
3499 * @params[in] Pointer to zero correlation config
3500 * Pointer to MacCellCfg
3501 * ********************************************************************/
3503 void setNumCs(uint16_t *numCs, MacCellCfg *macCellCfg)
3507 if(macCellCfg != NULLP)
3509 idx = macCellCfg->prachCfg.fdm[0].zeroCorrZoneCfg;
3510 *numCs = UnrestrictedSetNcsTable[idx];
3515 /***********************************************************************
3517 * @brief Fills the PRACH PDU in UL TTI Request
3521 * Function : fillPrachPdu
3524 * -Fills the PRACH PDU in UL TTI Request
3526 * @params[in] Pointer to Prach Pdu
3527 * Pointer to CurrUlSlot
3528 * Pointer to macCellCfg
3530 * ********************************************************************/
3533 void fillPrachPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3535 if(ulTtiReqPdu != NULLP)
3537 ulTtiReqPdu->pduType = PRACH_PDU_TYPE;
3538 ulTtiReqPdu->pdu.prach_pdu.physCellId = macCellCfg->phyCellId;
3539 ulTtiReqPdu->pdu.prach_pdu.numPrachOcas = \
3540 currUlSlot->ulInfo.prachSchInfo.numPrachOcas;
3541 ulTtiReqPdu->pdu.prach_pdu.prachFormat = \
3542 currUlSlot->ulInfo.prachSchInfo.prachFormat;
3543 ulTtiReqPdu->pdu.prach_pdu.numRa = currUlSlot->ulInfo.prachSchInfo.numRa;
3544 ulTtiReqPdu->pdu.prach_pdu.prachStartSymbol = \
3545 currUlSlot->ulInfo.prachSchInfo.prachStartSymb;
3546 setNumCs(&ulTtiReqPdu->pdu.prach_pdu.numCs, macCellCfg);
3547 ulTtiReqPdu->pdu.prach_pdu.beamforming.numPrgs = 0;
3548 ulTtiReqPdu->pdu.prach_pdu.beamforming.prgSize = 0;
3549 ulTtiReqPdu->pdu.prach_pdu.beamforming.digBfInterface = 0;
3550 ulTtiReqPdu->pdu.prach_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3551 ulTtiReqPdu->pduSize = sizeof(fapi_ul_prach_pdu_t);
3555 void fillPuschPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg, MacUlSlot *currUlSlot)
3557 if(ulTtiReqPdu != NULLP)
3559 ulTtiReqPdu->pduType = PUSCH_PDU_TYPE;
3560 memset(&ulTtiReqPdu->pdu.pusch_pdu, 0, sizeof(fapi_ul_pusch_pdu_t));
3561 ulTtiReqPdu->pdu.pusch_pdu.pduBitMap = 1;
3562 ulTtiReqPdu->pdu.pusch_pdu.rnti = currUlSlot->ulInfo.crnti;
3563 /* TODO : Fill handle in raCb when scheduling pusch and access here */
3564 ulTtiReqPdu->pdu.pusch_pdu.handle = 100;
3565 ulTtiReqPdu->pdu.pusch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3566 ulTtiReqPdu->pdu.pusch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3567 ulTtiReqPdu->pdu.pusch_pdu.subCarrierSpacing = \
3568 macCellCfg->initialUlBwp.bwp.scs;
3569 ulTtiReqPdu->pdu.pusch_pdu.cyclicPrefix = \
3570 macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3571 ulTtiReqPdu->pdu.pusch_pdu.targetCodeRate = 308;
3572 ulTtiReqPdu->pdu.pusch_pdu.qamModOrder = 2;
3573 ulTtiReqPdu->pdu.pusch_pdu.mcsIndex = \
3574 currUlSlot->ulInfo.schPuschInfo.tbInfo.mcs;
3575 ulTtiReqPdu->pdu.pusch_pdu.mcsTable = 0;
3576 ulTtiReqPdu->pdu.pusch_pdu.transformPrecoding = 1;
3577 ulTtiReqPdu->pdu.pusch_pdu.dataScramblingId = currUlSlot->ulInfo.cellId;
3578 ulTtiReqPdu->pdu.pusch_pdu.nrOfLayers = 1;
3579 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsSymbPos = 4;
3580 ulTtiReqPdu->pdu.pusch_pdu.dmrsConfigType = 0;
3581 ulTtiReqPdu->pdu.pusch_pdu.ulDmrsScramblingId = currUlSlot->ulInfo.cellId;
3582 ulTtiReqPdu->pdu.pusch_pdu.scid = 0;
3583 ulTtiReqPdu->pdu.pusch_pdu.numDmrsCdmGrpsNoData = 1;
3584 ulTtiReqPdu->pdu.pusch_pdu.dmrsPorts = 0;
3585 ulTtiReqPdu->pdu.pusch_pdu.resourceAlloc = \
3586 currUlSlot->ulInfo.schPuschInfo.resAllocType;
3587 ulTtiReqPdu->pdu.pusch_pdu.rbStart = \
3588 currUlSlot->ulInfo.schPuschInfo.fdAlloc.startPrb;
3589 ulTtiReqPdu->pdu.pusch_pdu.rbSize = \
3590 currUlSlot->ulInfo.schPuschInfo.fdAlloc.numPrb;
3591 ulTtiReqPdu->pdu.pusch_pdu.vrbToPrbMapping = 0;
3592 ulTtiReqPdu->pdu.pusch_pdu.frequencyHopping = 0;
3593 ulTtiReqPdu->pdu.pusch_pdu.txDirectCurrentLocation = 0;
3594 ulTtiReqPdu->pdu.pusch_pdu.uplinkFrequencyShift7p5khz = 0;
3595 ulTtiReqPdu->pdu.pusch_pdu.startSymbIndex = \
3596 currUlSlot->ulInfo.schPuschInfo.tdAlloc.startSymb;
3597 ulTtiReqPdu->pdu.pusch_pdu.nrOfSymbols = \
3598 currUlSlot->ulInfo.schPuschInfo.tdAlloc.numSymb;
3599 ulTtiReqPdu->pdu.pusch_pdu.mappingType = \
3600 currUlSlot->ulInfo.schPuschInfo.dmrsMappingType;
3601 ulTtiReqPdu->pdu.pusch_pdu.nrOfDmrsSymbols = \
3602 currUlSlot->ulInfo.schPuschInfo.nrOfDmrsSymbols;
3603 ulTtiReqPdu->pdu.pusch_pdu.dmrsAddPos = \
3604 currUlSlot->ulInfo.schPuschInfo.dmrsAddPos;
3605 ulTtiReqPdu->pdu.pusch_pdu.puschData.rvIndex = \
3606 currUlSlot->ulInfo.schPuschInfo.tbInfo.rv;
3607 ulTtiReqPdu->pdu.pusch_pdu.puschData.harqProcessId = \
3608 currUlSlot->ulInfo.schPuschInfo.harqProcId;
3609 ulTtiReqPdu->pdu.pusch_pdu.puschData.newDataIndicator = \
3610 currUlSlot->ulInfo.schPuschInfo.tbInfo.ndi;
3611 ulTtiReqPdu->pdu.pusch_pdu.puschData.tbSize = \
3612 currUlSlot->ulInfo.schPuschInfo.tbInfo.tbSize;
3613 /* numCb is 0 for new transmission */
3614 ulTtiReqPdu->pdu.pusch_pdu.puschData.numCb = 0;
3616 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pusch_pdu_t);
3620 void fillPucchPdu(fapi_ul_tti_req_pdu_t *ulTtiReqPdu, MacCellCfg *macCellCfg,\
3621 MacUlSlot *currUlSlot)
3623 if(ulTtiReqPdu != NULLP)
3625 ulTtiReqPdu->pduType = PUCCH_PDU_TYPE;
3626 memset(&ulTtiReqPdu->pdu.pucch_pdu, 0, sizeof(fapi_ul_pucch_pdu_t));
3627 ulTtiReqPdu->pdu.pucch_pdu.rnti = currUlSlot->ulInfo.schPucchInfo.rnti;
3628 /* TODO : Fill handle in raCb when scheduling pucch and access here */
3629 ulTtiReqPdu->pdu.pucch_pdu.handle = 100;
3630 ulTtiReqPdu->pdu.pucch_pdu.bwpSize = macCellCfg->initialUlBwp.bwp.numPrb;
3631 ulTtiReqPdu->pdu.pucch_pdu.bwpStart = macCellCfg->initialUlBwp.bwp.firstPrb;
3632 ulTtiReqPdu->pdu.pucch_pdu.subCarrierSpacing = macCellCfg->initialUlBwp.bwp.scs;
3633 ulTtiReqPdu->pdu.pucch_pdu.cyclicPrefix = macCellCfg->initialUlBwp.bwp.cyclicPrefix;
3634 ulTtiReqPdu->pdu.pucch_pdu.formatType = currUlSlot->ulInfo.schPucchInfo.pucchFormat; /* Supporting PUCCH Format 0 */
3635 ulTtiReqPdu->pdu.pucch_pdu.multiSlotTxIndicator = 0; /* No Multi Slot transmission */
3636 ulTtiReqPdu->pdu.pucch_pdu.pi2Bpsk = 0; /* Disabled */
3637 ulTtiReqPdu->pdu.pucch_pdu.prbStart = currUlSlot->ulInfo.schPucchInfo.fdAlloc.startPrb;
3638 ulTtiReqPdu->pdu.pucch_pdu.prbSize = currUlSlot->ulInfo.schPucchInfo.fdAlloc.numPrb;
3639 ulTtiReqPdu->pdu.pucch_pdu.startSymbolIndex = currUlSlot->ulInfo.schPucchInfo.tdAlloc.startSymb;
3640 ulTtiReqPdu->pdu.pucch_pdu.nrOfSymbols = currUlSlot->ulInfo.schPucchInfo.tdAlloc.numSymb;
3641 ulTtiReqPdu->pdu.pucch_pdu.freqHopFlag = 0; /* Disabled */
3642 ulTtiReqPdu->pdu.pucch_pdu.secondHopPrb = 0;
3643 ulTtiReqPdu->pdu.pucch_pdu.groupHopFlag = 0;
3644 ulTtiReqPdu->pdu.pucch_pdu.sequenceHopFlag = 0;
3645 ulTtiReqPdu->pdu.pucch_pdu.hoppingId = 0;
3646 ulTtiReqPdu->pdu.pucch_pdu.initialCyclicShift = 0;
3647 ulTtiReqPdu->pdu.pucch_pdu.dataScramblingId = 0; /* Valid for Format 2, 3, 4 */
3648 ulTtiReqPdu->pdu.pucch_pdu.timeDomainOccIdx = 0; /* Valid for Format 1 */
3649 ulTtiReqPdu->pdu.pucch_pdu.preDftOccIdx = 0; /* Valid for Format 4 */
3650 ulTtiReqPdu->pdu.pucch_pdu.preDftOccLen = 0; /* Valid for Format 4 */
3651 ulTtiReqPdu->pdu.pucch_pdu.addDmrsFlag = 0; /* Valid for Format 3, 4 */
3652 ulTtiReqPdu->pdu.pucch_pdu.dmrsScramblingId = 0; /* Valid for Format 2 */
3653 ulTtiReqPdu->pdu.pucch_pdu.dmrsCyclicShift = 0; /* Valid for Format 4 */
3654 ulTtiReqPdu->pdu.pucch_pdu.srFlag = currUlSlot->ulInfo.schPucchInfo.srFlag;
3655 ulTtiReqPdu->pdu.pucch_pdu.bitLenHarq = currUlSlot->ulInfo.schPucchInfo.numHarqBits;
3656 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart1 = 0; /* Valid for Format 2, 3, 4 */
3657 ulTtiReqPdu->pdu.pucch_pdu.bitLenCsiPart2 = 0; /* Valid for Format 2, 3, 4 */
3658 ulTtiReqPdu->pdu.pucch_pdu.beamforming.numPrgs = 0; /* Not Supported */
3659 ulTtiReqPdu->pdu.pucch_pdu.beamforming.prgSize = 0;
3660 ulTtiReqPdu->pdu.pucch_pdu.beamforming.digBfInterface = 0;
3661 ulTtiReqPdu->pdu.pucch_pdu.beamforming.rx_bfi[0].beamIdx[0].beamidx = 0;
3663 ulTtiReqPdu->pduSize = sizeof(fapi_ul_pucch_pdu_t);
3669 /*******************************************************************
3671 * @brief Sends UL TTI Request to PHY
3675 * Function : fillUlTtiReq
3678 * -Sends FAPI Param req to PHY
3680 * @params[in] Pointer to CmLteTimingInfo
3681 * @return ROK - success
3684 ******************************************************************/
3685 uint16_t fillUlTtiReq(SlotIndInfo currTimingInfo)
3689 uint8_t pduIdx = -1;
3690 uint32_t msgLen = 0;
3691 uint32_t msgSize = 0;
3693 fapi_ul_tti_req_t *ulTtiReq = NULLP;
3694 SlotIndInfo ulTtiReqTimingInfo;
3696 MacUlSlot *currUlSlot = NULLP;
3697 MacCellCfg macCellCfg;
3699 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3701 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3702 macCellCfg = macCb.macCell[cellIdx]->macCellCfg;
3705 ADD_DELTA_TO_TIME(currTimingInfo,ulTtiReqTimingInfo,PHY_DELTA);
3707 currUlSlot = &macCb.macCell[cellIdx]->ulSlot[ulTtiReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3708 msgSize = sizeof(fapi_ul_tti_req_t);
3709 LWR_MAC_ALLOC(ulTtiReq, msgSize);
3711 if(ulTtiReq != NULLP)
3713 memset(ulTtiReq, 0, msgSize);
3714 ulTtiReq->sfn = ulTtiReqTimingInfo.sfn;
3715 ulTtiReq->slot = ulTtiReqTimingInfo.slot;
3716 ulTtiReq->nPdus = getnPdus(ulTtiReq, currUlSlot);
3717 ulTtiReq->nGroup = 0;
3718 if(ulTtiReq->nPdus > 0)
3720 /* Fill Prach Pdu */
3721 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PRACH)
3724 fillPrachPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3727 /* Fill PUSCH PDU */
3728 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_PUSCH)
3731 fillPuschPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3733 /* Fill PUCCH PDU */
3734 if(currUlSlot->ulInfo.dataType & SCH_DATATYPE_UCI)
3737 fillPucchPdu(&ulTtiReq->pdus[pduIdx], &macCellCfg, currUlSlot);
3740 msgLen = sizeof(fapi_ul_tti_req_t) - sizeof(fapi_msg_t);
3741 fillMsgHeader(&ulTtiReq->header, FAPI_UL_TTI_REQUEST, msgLen);
3742 #ifdef ODU_SLOT_IND_DEBUG_LOG
3743 DU_LOG("\nLWR_MAC: Sending UL TTI Request");
3745 LwrMacSendToPhy(ulTtiReq->header.msg_id, msgSize, (void *)ulTtiReq);
3747 memset(currUlSlot, 0, sizeof(MacUlSlot));
3752 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL TTI Request");
3753 memset(currUlSlot, 0, sizeof(MacUlSlot));
3759 lwr_mac_procInvalidEvt(&currTimingInfo);
3766 /*******************************************************************
3768 * @brief fills bsr Ul DCI PDU required for UL DCI Request to PHY
3772 * Function : fillUlDciPdu
3775 * -Fills the Ul DCI PDU, spec Ref:38.212, Table 7.3.1-1
3777 * @params[in] Pointer to fapi_dl_dci_t
3778 * Pointer to DciInfo
3781 ******************************************************************/
3782 void fillUlDciPdu(fapi_dl_dci_t *ulDciPtr, DciInfo *schDciInfo)
3784 if(ulDciPtr != NULLP)
3790 uint8_t coreset1Size = 0;
3791 uint16_t rbStart = 0;
3793 uint8_t dciFormatId = 0;
3794 uint32_t freqDomResAssign;
3795 uint8_t timeDomResAssign;
3796 uint8_t freqHopFlag;
3797 uint8_t modNCodScheme;
3799 uint8_t redundancyVer = 0;
3800 uint8_t harqProcessNum = 0;
3801 uint8_t puschTpc = 0;
3802 uint8_t ul_SlInd = 0;
3804 /* Size(in bits) of each field in DCI format 0_0 */
3805 uint8_t dciFormatIdSize = 1;
3806 uint8_t freqDomResAssignSize = 0;
3807 uint8_t timeDomResAssignSize = 4;
3808 uint8_t freqHopFlagSize = 1;
3809 uint8_t modNCodSchemeSize = 5;
3810 uint8_t ndiSize = 1;
3811 uint8_t redundancyVerSize = 2;
3812 uint8_t harqProcessNumSize = 4;
3813 uint8_t puschTpcSize = 2;
3814 uint8_t ul_SlIndSize = 1;
3816 ulDciPtr->rnti = schDciInfo->dciInfo.rnti;
3817 ulDciPtr->scramblingId = schDciInfo->dciInfo.scramblingId;
3818 ulDciPtr->scramblingRnti = schDciInfo->dciInfo.scramblingRnti;
3819 ulDciPtr->cceIndex = schDciInfo->dciInfo.cceIndex;
3820 ulDciPtr->aggregationLevel = schDciInfo->dciInfo.aggregLevel;
3821 ulDciPtr->pc_and_bform.numPrgs = schDciInfo->dciInfo.beamPdcchInfo.numPrgs;
3822 ulDciPtr->pc_and_bform.prgSize = schDciInfo->dciInfo.beamPdcchInfo.prgSize;
3823 ulDciPtr->pc_and_bform.digBfInterfaces = schDciInfo->dciInfo.beamPdcchInfo.digBfInterfaces;
3824 ulDciPtr->pc_and_bform.pmi_bfi[0].pmIdx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].pmIdx;
3825 ulDciPtr->pc_and_bform.pmi_bfi[0].beamIdx[0].beamidx = schDciInfo->dciInfo.beamPdcchInfo.prg[0].beamIdx[0];
3826 ulDciPtr->beta_pdcch_1_0 = schDciInfo->dciInfo.txPdcchPower.powerValue;
3827 ulDciPtr->powerControlOffsetSS = schDciInfo->dciInfo.txPdcchPower.powerControlOffsetSS;
3829 /* Calculating freq domain resource allocation field value and size
3830 * coreset1Size = Size of coreset 1
3831 * RBStart = Starting Virtual Rsource block
3832 * RBLen = length of contiguously allocted RBs
3833 * Spec 38.214 Sec 5.1.2.2.2
3835 if(schDciInfo->formatType == FORMAT0_0)
3837 coreset1Size = schDciInfo->coresetCfg.coreSetSize;
3838 rbLen = schDciInfo->format.format0_0.freqAlloc.numPrb;
3839 rbStart = schDciInfo->format.format0_0.freqAlloc.startPrb;
3841 if((rbLen >=1) && (rbLen <= coreset1Size - rbStart))
3843 if((rbLen - 1) <= floor(coreset1Size / 2))
3844 freqDomResAssign = (coreset1Size * (rbLen-1)) + rbStart;
3846 freqDomResAssign = (coreset1Size * (coreset1Size - rbLen + 1)) \
3847 + (coreset1Size - 1 - rbStart);
3849 freqDomResAssignSize = ceil(log2(coreset1Size * (coreset1Size + 1) / 2));
3851 /* Fetching DCI field values */
3852 dciFormatId = schDciInfo->formatType; /* DCI indentifier for UL DCI */
3853 timeDomResAssign = schDciInfo->format.format0_0.rowIndex;
3854 freqHopFlag = schDciInfo->format.format0_0.freqHopFlag;
3855 modNCodScheme = schDciInfo->format.format0_0.mcs;
3856 ndi = schDciInfo->format.format0_0.ndi;
3857 redundancyVer = schDciInfo->format.format0_0.rv;
3858 harqProcessNum = schDciInfo->format.format0_0.harqProcId;
3859 puschTpc = schDciInfo->format.format0_0.tpcCmd;
3860 ul_SlInd = schDciInfo->format.format0_0.sUlCfgd;
3862 /* Reversing bits in each DCI field */
3863 dciFormatId = reverseBits(dciFormatId, dciFormatIdSize);
3864 freqDomResAssign = reverseBits(freqDomResAssign, freqDomResAssignSize);
3865 timeDomResAssign = reverseBits(timeDomResAssign, timeDomResAssignSize);
3866 modNCodScheme = reverseBits(modNCodScheme, modNCodSchemeSize);
3867 redundancyVer = reverseBits(redundancyVer, redundancyVerSize);
3868 harqProcessNum = reverseBits(harqProcessNum, harqProcessNumSize);
3869 puschTpc = reverseBits(puschTpc, puschTpcSize);
3870 ul_SlInd = reverseBits(ul_SlInd, ul_SlIndSize);
3872 /* Calulating total number of bytes in buffer */
3873 ulDciPtr->payloadSizeBits = (dciFormatIdSize + freqDomResAssignSize\
3874 + timeDomResAssignSize + freqHopFlagSize + modNCodSchemeSize + ndi \
3875 + redundancyVerSize + harqProcessNumSize + puschTpcSize + ul_SlIndSize);
3877 numBytes = ulDciPtr->payloadSizeBits / 8;
3878 if(ulDciPtr->payloadSizeBits % 8)
3881 if(numBytes > FAPI_DCI_PAYLOAD_BYTE_LEN)
3883 DU_LOG("\nLWR_MAC : Total bytes for DCI is more than expected");
3887 /* Initialize buffer */
3888 for(bytePos = 0; bytePos < numBytes; bytePos++)
3889 ulDciPtr->payload[bytePos] = 0;
3891 bytePos = numBytes - 1;
3894 /* Packing DCI format fields */
3895 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3896 dciFormatId, dciFormatIdSize);
3897 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3898 freqDomResAssign, freqDomResAssignSize);
3899 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3900 timeDomResAssign, timeDomResAssignSize);
3901 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3902 freqHopFlag, freqHopFlagSize);
3903 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3904 modNCodScheme, modNCodSchemeSize);
3905 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3907 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3908 redundancyVer, redundancyVerSize);
3909 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3910 harqProcessNum, harqProcessNumSize);
3911 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3912 puschTpc, puschTpcSize);
3913 fillDlDciPayload(ulDciPtr->payload, &bytePos, &bitPos,\
3914 ul_SlInd, ul_SlIndSize);
3916 } /* fillUlDciPdu */
3918 /*******************************************************************
3920 * @brief fills PDCCH PDU required for UL DCI REQ to PHY
3924 * Function : fillUlDciPdcchPdu
3927 * -Fills the Pdcch PDU info
3929 * @params[in] Pointer to FAPI DL TTI Req
3930 * Pointer to PdcchCfg
3933 ******************************************************************/
3934 uint8_t fillUlDciPdcchPdu(fapi_dci_pdu_t *ulDciReqPdu, DlSchedInfo *dlInfo, uint8_t coreSetType)
3936 if(ulDciReqPdu != NULLP)
3938 memset(&ulDciReqPdu->pdcchPduConfig, 0, sizeof(fapi_dl_pdcch_pdu_t));
3939 fillUlDciPdu(ulDciReqPdu->pdcchPduConfig.dlDci, dlInfo->ulGrant);
3940 ulDciReqPdu->pduType = PDCCH_PDU_TYPE;
3941 ulDciReqPdu->pdcchPduConfig.bwpSize = dlInfo->ulGrant->bwpCfg.freqAlloc.numPrb;
3942 ulDciReqPdu->pdcchPduConfig.bwpStart = dlInfo->ulGrant->bwpCfg.freqAlloc.startPrb;
3943 ulDciReqPdu->pdcchPduConfig.subCarrierSpacing = dlInfo->ulGrant->bwpCfg.subcarrierSpacing;
3944 ulDciReqPdu->pdcchPduConfig.cyclicPrefix = dlInfo->ulGrant->bwpCfg.cyclicPrefix;
3945 ulDciReqPdu->pdcchPduConfig.startSymbolIndex = dlInfo->ulGrant->coresetCfg.startSymbolIndex;
3946 ulDciReqPdu->pdcchPduConfig.durationSymbols = dlInfo->ulGrant->coresetCfg.durationSymbols;
3947 memcpy(ulDciReqPdu->pdcchPduConfig.freqDomainResource, dlInfo->ulGrant->coresetCfg.freqDomainResource, 6);
3948 ulDciReqPdu->pdcchPduConfig.cceRegMappingType = dlInfo->ulGrant->coresetCfg.cceRegMappingType;
3949 ulDciReqPdu->pdcchPduConfig.regBundleSize = dlInfo->ulGrant->coresetCfg.regBundleSize;
3950 ulDciReqPdu->pdcchPduConfig.interleaverSize = dlInfo->ulGrant->coresetCfg.interleaverSize;
3951 ulDciReqPdu->pdcchPduConfig.shiftIndex = dlInfo->ulGrant->coresetCfg.shiftIndex;
3952 ulDciReqPdu->pdcchPduConfig.precoderGranularity = dlInfo->ulGrant->coresetCfg.precoderGranularity;
3953 ulDciReqPdu->pdcchPduConfig.numDlDci = 1;
3954 ulDciReqPdu->pdcchPduConfig.coreSetType = coreSetType;
3956 /* Calculating PDU length. Considering only one Ul dci pdu for now */
3957 ulDciReqPdu->pduSize = sizeof(fapi_dl_pdcch_pdu_t);
3962 /*******************************************************************
3964 * @brief Sends UL DCI Request to PHY
3968 * Function : fillUlDciReq
3971 * -Sends FAPI Ul Dci req to PHY
3973 * @params[in] Pointer to CmLteTimingInfo
3974 * @return ROK - success
3977 ******************************************************************/
3978 uint16_t fillUlDciReq(SlotIndInfo currTimingInfo)
3982 uint8_t numPduEncoded = 0;
3983 uint32_t msgLen = 0;
3984 uint32_t msgSize = 0;
3986 fapi_ul_dci_req_t *ulDciReq = NULLP;
3987 SlotIndInfo ulDciReqTimingInfo;
3989 MacDlSlot *currDlSlot = NULLP;
3991 if(lwrMacCb.phyState == PHY_STATE_RUNNING)
3993 GET_CELL_IDX(currTimingInfo.cellId, cellIdx);
3994 memcpy(&ulDciReqTimingInfo, &currTimingInfo, sizeof(SlotIndInfo));
3995 currDlSlot = &macCb.macCell[cellIdx]->dlSlot[ulDciReqTimingInfo.slot % MAX_SLOT_SUPPORTED];
3997 if(currDlSlot->dlInfo.ulGrant != NULLP)
3999 msgSize = sizeof(fapi_ul_dci_req_t);
4000 LWR_MAC_ALLOC(ulDciReq, msgSize);
4001 if(ulDciReq != NULLP)
4003 memset(ulDciReq, 0, msgSize);
4004 ulDciReq->sfn = ulDciReqTimingInfo.sfn;
4005 ulDciReq->slot = ulDciReqTimingInfo.slot;
4006 ulDciReq->numPdus = 1; // No. of PDCCH PDUs
4007 if(ulDciReq->numPdus > 0)
4009 /* Fill PDCCH configuration Pdu */
4010 fillUlDciPdcchPdu(&ulDciReq->pdus[numPduEncoded], &currDlSlot->dlInfo, CORESET_TYPE1);
4012 /* free UL GRANT at SCH */
4013 MAC_FREE(currDlSlot->dlInfo.ulGrant, sizeof(DciInfo));
4014 currDlSlot->dlInfo.ulGrant = NULLP;
4015 /* send UL DCI to PHY */
4016 msgLen = sizeof(fapi_ul_dci_req_t) - sizeof(fapi_msg_t);
4017 fillMsgHeader(&ulDciReq->header, FAPI_UL_DCI_REQUEST, msgLen);
4018 LwrMacSendToPhy(ulDciReq->header.msg_id, sizeof(fapi_ul_dci_req_t), (void *)ulDciReq);
4024 DU_LOG("\nLWR_MAC: Failed to allocate memory for UL DCI Request");
4025 memset(currDlSlot, 0, sizeof(MacDlSlot));
4032 lwr_mac_procInvalidEvt(&currTimingInfo);
4038 lwrMacFsmHdlr fapiEvtHdlr[MAX_STATE][MAX_EVENT] =
4041 /* PHY_STATE_IDLE */
4042 lwr_mac_procParamReqEvt,
4043 lwr_mac_procParamRspEvt,
4044 lwr_mac_procConfigReqEvt,
4045 lwr_mac_procConfigRspEvt,
4046 lwr_mac_procInvalidEvt,
4047 lwr_mac_procInvalidEvt,
4050 /* PHY_STATE_CONFIGURED */
4051 lwr_mac_procParamReqEvt,
4052 lwr_mac_procParamRspEvt,
4053 lwr_mac_procConfigReqEvt,
4054 lwr_mac_procConfigRspEvt,
4055 lwr_mac_procStartReqEvt,
4056 lwr_mac_procInvalidEvt,
4059 /* PHY_STATE_RUNNING */
4060 lwr_mac_procInvalidEvt,
4061 lwr_mac_procInvalidEvt,
4062 lwr_mac_procConfigReqEvt,
4063 lwr_mac_procConfigRspEvt,
4064 lwr_mac_procInvalidEvt,
4065 lwr_mac_procStopReqEvt,
4069 /*******************************************************************
4071 * @brief Sends message to LWR_MAC Fsm Event Handler
4075 * Function : sendToLowerMac
4078 * -Sends message to LowerMac
4080 * @params[in] Message Type
4086 ******************************************************************/
4087 void sendToLowerMac(uint16_t msgType, uint32_t msgLen, void *msg)
4089 lwrMacCb.event = msgType;
4090 fapiEvtHdlr[lwrMacCb.phyState][lwrMacCb.event](msg);
4092 /**********************************************************************
4094 **********************************************************************/